blob: f7926dc7fa78921468c9d10820fc3c9734f31d52 [file] [log] [blame]
Bryan Wu194de562007-05-06 14:50:30 -07001/*
2 * File: drivers/serial/bfin_5xx.c
3 * Based on: Based on drivers/serial/sa1100.c
4 * Author: Aubrey Li <aubrey.li@analog.com>
5 *
6 * Created:
7 * Description: Driver for blackfin 5xx serial ports
8 *
Bryan Wu194de562007-05-06 14:50:30 -07009 * Modified:
10 * Copyright 2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31#define SUPPORT_SYSRQ
32#endif
33
34#include <linux/module.h>
35#include <linux/ioport.h>
36#include <linux/init.h>
37#include <linux/console.h>
38#include <linux/sysrq.h>
39#include <linux/platform_device.h>
40#include <linux/tty.h>
41#include <linux/tty_flip.h>
42#include <linux/serial_core.h>
43
Sonic Zhang474f1a62007-06-29 16:35:17 +080044#ifdef CONFIG_KGDB_UART
45#include <linux/kgdb.h>
46#include <asm/irq_regs.h>
47#endif
48
Bryan Wu194de562007-05-06 14:50:30 -070049#include <asm/gpio.h>
50#include <asm/mach/bfin_serial_5xx.h>
51
52#ifdef CONFIG_SERIAL_BFIN_DMA
53#include <linux/dma-mapping.h>
54#include <asm/io.h>
55#include <asm/irq.h>
56#include <asm/cacheflush.h>
57#endif
58
59/* UART name and device definitions */
60#define BFIN_SERIAL_NAME "ttyBF"
61#define BFIN_SERIAL_MAJOR 204
62#define BFIN_SERIAL_MINOR 64
63
64/*
65 * Setup for console. Argument comes from the menuconfig
66 */
67#define DMA_RX_XCOUNT 512
68#define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
69
70#define DMA_RX_FLUSH_JIFFIES 5
71
72#ifdef CONFIG_SERIAL_BFIN_DMA
73static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
74#else
75static void bfin_serial_do_work(struct work_struct *work);
76static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
77static void local_put_char(struct bfin_serial_port *uart, char ch);
78#endif
79
80static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
81
82/*
83 * interrupts are disabled on entry
84 */
85static void bfin_serial_stop_tx(struct uart_port *port)
86{
87 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
88
89#ifdef CONFIG_SERIAL_BFIN_DMA
90 disable_dma(uart->tx_dma_channel);
91#else
92 unsigned short ier;
93
94 ier = UART_GET_IER(uart);
95 ier &= ~ETBEI;
96 UART_PUT_IER(uart, ier);
97#endif
98}
99
100/*
101 * port is locked and interrupts are disabled
102 */
103static void bfin_serial_start_tx(struct uart_port *port)
104{
105 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
106
107#ifdef CONFIG_SERIAL_BFIN_DMA
108 bfin_serial_dma_tx_chars(uart);
109#else
110 unsigned short ier;
111 ier = UART_GET_IER(uart);
112 ier |= ETBEI;
113 UART_PUT_IER(uart, ier);
114 bfin_serial_tx_chars(uart);
115#endif
116}
117
118/*
119 * Interrupts are enabled
120 */
121static void bfin_serial_stop_rx(struct uart_port *port)
122{
123 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
124 unsigned short ier;
125
126 ier = UART_GET_IER(uart);
Sonic Zhang474f1a62007-06-29 16:35:17 +0800127#ifdef CONFIG_KGDB_UART
128 if (uart->port.line != CONFIG_KGDB_UART_PORT)
129#endif
Bryan Wu194de562007-05-06 14:50:30 -0700130 ier &= ~ERBFI;
131 UART_PUT_IER(uart, ier);
132}
133
134/*
135 * Set the modem control timer to fire immediately.
136 */
137static void bfin_serial_enable_ms(struct uart_port *port)
138{
139}
140
Sonic Zhang474f1a62007-06-29 16:35:17 +0800141#ifdef CONFIG_KGDB_UART
142static int kgdb_entry_state;
143
144void kgdb_put_debug_char(int chr)
145{
146 struct bfin_serial_port *uart;
147
148 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
149 uart = &bfin_serial_ports[0];
150 else
151 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
152
153 while (!(UART_GET_LSR(uart) & THRE)) {
154 __builtin_bfin_ssync();
155 }
156 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
157 __builtin_bfin_ssync();
158 UART_PUT_CHAR(uart, (unsigned char)chr);
159 __builtin_bfin_ssync();
160}
161
162int kgdb_get_debug_char(void)
163{
164 struct bfin_serial_port *uart;
165 unsigned char chr;
166
167 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
168 uart = &bfin_serial_ports[0];
169 else
170 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
171
172 while(!(UART_GET_LSR(uart) & DR)) {
173 __builtin_bfin_ssync();
174 }
175 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
176 __builtin_bfin_ssync();
177 chr = UART_GET_CHAR(uart);
178 __builtin_bfin_ssync();
179
180 return chr;
181}
182#endif
183
Bryan Wu194de562007-05-06 14:50:30 -0700184#ifdef CONFIG_SERIAL_BFIN_PIO
185static void local_put_char(struct bfin_serial_port *uart, char ch)
186{
187 unsigned short status;
188 int flags = 0;
189
190 spin_lock_irqsave(&uart->port.lock, flags);
191
192 do {
193 status = UART_GET_LSR(uart);
194 } while (!(status & THRE));
195
196 UART_PUT_CHAR(uart, ch);
197 SSYNC();
198
199 spin_unlock_irqrestore(&uart->port.lock, flags);
200}
201
202static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
203{
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800204 struct tty_struct *tty = uart->port.info->tty;
Bryan Wu194de562007-05-06 14:50:30 -0700205 unsigned int status, ch, flg;
Sonic Zhang474f1a62007-06-29 16:35:17 +0800206#ifdef CONFIG_KGDB_UART
207 struct pt_regs *regs = get_irq_regs();
208#endif
Bryan Wu194de562007-05-06 14:50:30 -0700209#ifdef BF533_FAMILY
210 static int in_break = 0;
211#endif
212
213 status = UART_GET_LSR(uart);
214 ch = UART_GET_CHAR(uart);
215 uart->port.icount.rx++;
216
Sonic Zhang474f1a62007-06-29 16:35:17 +0800217#ifdef CONFIG_KGDB_UART
218 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
219 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
220 kgdb_breakkey_pressed(regs);
221 return;
222 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
223 kgdb_entry_state = 1;
224 } else if (kgdb_entry_state == 1 && ch == 'q') {
225 kgdb_entry_state = 0;
226 kgdb_breakkey_pressed(regs);
227 return;
228 } else if (ch == 0x3) {/* Ctrl + C */
229 kgdb_entry_state = 0;
230 kgdb_breakkey_pressed(regs);
231 return;
232 } else {
233 kgdb_entry_state = 0;
234 }
235 }
236#endif
237
Bryan Wu194de562007-05-06 14:50:30 -0700238#ifdef BF533_FAMILY
239 /* The BF533 family of processors have a nice misbehavior where
240 * they continuously generate characters for a "single" break.
241 * We have to basically ignore this flood until the "next" valid
242 * character comes across. All other Blackfin families operate
243 * properly though.
244 */
245 if (in_break) {
246 if (ch != 0) {
247 in_break = 0;
248 ch = UART_GET_CHAR(uart);
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800249 if (bfin_revid() < 5)
250 return;
251 } else
252 return;
Bryan Wu194de562007-05-06 14:50:30 -0700253 }
254#endif
255
256 if (status & BI) {
257#ifdef BF533_FAMILY
258 in_break = 1;
259#endif
260 uart->port.icount.brk++;
261 if (uart_handle_break(&uart->port))
262 goto ignore_char;
Mike Frysinger98089012007-06-11 15:31:30 +0800263 status &= ~(PE | FE);
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800264 }
265 if (status & PE)
Bryan Wu194de562007-05-06 14:50:30 -0700266 uart->port.icount.parity++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800267 if (status & OE)
Bryan Wu194de562007-05-06 14:50:30 -0700268 uart->port.icount.overrun++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800269 if (status & FE)
Bryan Wu194de562007-05-06 14:50:30 -0700270 uart->port.icount.frame++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800271
272 status &= uart->port.read_status_mask;
273
274 if (status & BI)
275 flg = TTY_BREAK;
276 else if (status & PE)
277 flg = TTY_PARITY;
278 else if (status & FE)
279 flg = TTY_FRAME;
280 else
Bryan Wu194de562007-05-06 14:50:30 -0700281 flg = TTY_NORMAL;
282
283 if (uart_handle_sysrq_char(&uart->port, ch))
284 goto ignore_char;
Bryan Wu194de562007-05-06 14:50:30 -0700285
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800286 uart_insert_char(&uart->port, status, OE, ch, flg);
287
288 ignore_char:
289 tty_flip_buffer_push(tty);
Bryan Wu194de562007-05-06 14:50:30 -0700290}
291
292static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
293{
294 struct circ_buf *xmit = &uart->port.info->xmit;
295
296 if (uart->port.x_char) {
297 UART_PUT_CHAR(uart, uart->port.x_char);
298 uart->port.icount.tx++;
299 uart->port.x_char = 0;
300 return;
301 }
302 /*
303 * Check the modem control lines before
304 * transmitting anything.
305 */
306 bfin_serial_mctrl_check(uart);
307
308 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
309 bfin_serial_stop_tx(&uart->port);
310 return;
311 }
312
313 local_put_char(uart, xmit->buf[xmit->tail]);
314 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
315 uart->port.icount.tx++;
316
317 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
318 uart_write_wakeup(&uart->port);
319
320 if (uart_circ_empty(xmit))
321 bfin_serial_stop_tx(&uart->port);
322}
323
Aubrey Li5c4e4722007-05-21 18:09:38 +0800324static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
325{
326 struct bfin_serial_port *uart = dev_id;
327
328 spin_lock(&uart->port.lock);
329 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
330 bfin_serial_rx_chars(uart);
331 spin_unlock(&uart->port.lock);
332 return IRQ_HANDLED;
333}
334
335static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
Bryan Wu194de562007-05-06 14:50:30 -0700336{
337 struct bfin_serial_port *uart = dev_id;
Bryan Wu194de562007-05-06 14:50:30 -0700338
339 spin_lock(&uart->port.lock);
Aubrey Li5c4e4722007-05-21 18:09:38 +0800340 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
341 bfin_serial_tx_chars(uart);
Bryan Wu194de562007-05-06 14:50:30 -0700342 spin_unlock(&uart->port.lock);
343 return IRQ_HANDLED;
344}
345
Aubrey Li5c4e4722007-05-21 18:09:38 +0800346
Bryan Wu194de562007-05-06 14:50:30 -0700347static void bfin_serial_do_work(struct work_struct *work)
348{
349 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
350
351 bfin_serial_mctrl_check(uart);
352}
353
354#endif
355
356#ifdef CONFIG_SERIAL_BFIN_DMA
357static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
358{
359 struct circ_buf *xmit = &uart->port.info->xmit;
360 unsigned short ier;
361 int flags = 0;
362
363 if (!uart->tx_done)
364 return;
365
366 uart->tx_done = 0;
367
368 if (uart->port.x_char) {
369 UART_PUT_CHAR(uart, uart->port.x_char);
370 uart->port.icount.tx++;
371 uart->port.x_char = 0;
372 uart->tx_done = 1;
373 return;
374 }
375 /*
376 * Check the modem control lines before
377 * transmitting anything.
378 */
379 bfin_serial_mctrl_check(uart);
380
381 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
382 bfin_serial_stop_tx(&uart->port);
383 uart->tx_done = 1;
384 return;
385 }
386
387 spin_lock_irqsave(&uart->port.lock, flags);
388 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
389 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
390 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
391 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
392 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
393 set_dma_config(uart->tx_dma_channel,
394 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
395 INTR_ON_BUF,
396 DIMENSION_LINEAR,
397 DATA_SIZE_8));
398 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
399 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
400 set_dma_x_modify(uart->tx_dma_channel, 1);
401 enable_dma(uart->tx_dma_channel);
402 ier = UART_GET_IER(uart);
403 ier |= ETBEI;
404 UART_PUT_IER(uart, ier);
405 spin_unlock_irqrestore(&uart->port.lock, flags);
406}
407
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800408static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
Bryan Wu194de562007-05-06 14:50:30 -0700409{
410 struct tty_struct *tty = uart->port.info->tty;
411 int i, flg, status;
412
413 status = UART_GET_LSR(uart);
414 uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
415
416 if (status & BI) {
417 uart->port.icount.brk++;
418 if (uart_handle_break(&uart->port))
419 goto dma_ignore_char;
Mike Frysinger98089012007-06-11 15:31:30 +0800420 status &= ~(PE | FE);
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800421 }
422 if (status & PE)
Bryan Wu194de562007-05-06 14:50:30 -0700423 uart->port.icount.parity++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800424 if (status & OE)
Bryan Wu194de562007-05-06 14:50:30 -0700425 uart->port.icount.overrun++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800426 if (status & FE)
Bryan Wu194de562007-05-06 14:50:30 -0700427 uart->port.icount.frame++;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800428
429 status &= uart->port.read_status_mask;
430
431 if (status & BI)
432 flg = TTY_BREAK;
433 else if (status & PE)
434 flg = TTY_PARITY;
435 else if (status & FE)
436 flg = TTY_FRAME;
437 else
Bryan Wu194de562007-05-06 14:50:30 -0700438 flg = TTY_NORMAL;
439
440 for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
441 if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
442 goto dma_ignore_char;
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800443 uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
Bryan Wu194de562007-05-06 14:50:30 -0700444 }
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800445
446 dma_ignore_char:
Bryan Wu194de562007-05-06 14:50:30 -0700447 tty_flip_buffer_push(tty);
448}
449
450void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
451{
452 int x_pos, pos;
453 int flags = 0;
454
455 bfin_serial_dma_tx_chars(uart);
456
457 spin_lock_irqsave(&uart->port.lock, flags);
458 x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
459 if (x_pos == DMA_RX_XCOUNT)
460 x_pos = 0;
461
462 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
463
464 if (pos>uart->rx_dma_buf.tail) {
465 uart->rx_dma_buf.tail = pos;
466 bfin_serial_dma_rx_chars(uart);
467 uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
468 }
469 spin_unlock_irqrestore(&uart->port.lock, flags);
470 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
471 add_timer(&(uart->rx_dma_timer));
472}
473
474static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
475{
476 struct bfin_serial_port *uart = dev_id;
477 struct circ_buf *xmit = &uart->port.info->xmit;
478 unsigned short ier;
479
480 spin_lock(&uart->port.lock);
481 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
482 clear_dma_irqstat(uart->tx_dma_channel);
483 disable_dma(uart->tx_dma_channel);
484 ier = UART_GET_IER(uart);
485 ier &= ~ETBEI;
486 UART_PUT_IER(uart, ier);
487 xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
488 uart->port.icount.tx+=uart->tx_count;
489
490 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
491 uart_write_wakeup(&uart->port);
492
493 if (uart_circ_empty(xmit))
494 bfin_serial_stop_tx(&uart->port);
495 uart->tx_done = 1;
496 }
497
498 spin_unlock(&uart->port.lock);
499 return IRQ_HANDLED;
500}
501
502static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
503{
504 struct bfin_serial_port *uart = dev_id;
505 unsigned short irqstat;
506
507 uart->rx_dma_nrows++;
508 if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
509 uart->rx_dma_nrows = 0;
510 uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
511 bfin_serial_dma_rx_chars(uart);
512 uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
513 }
514 spin_lock(&uart->port.lock);
515 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
516 clear_dma_irqstat(uart->rx_dma_channel);
517
518 spin_unlock(&uart->port.lock);
519 return IRQ_HANDLED;
520}
521#endif
522
523/*
524 * Return TIOCSER_TEMT when transmitter is not busy.
525 */
526static unsigned int bfin_serial_tx_empty(struct uart_port *port)
527{
528 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
529 unsigned short lsr;
530
531 lsr = UART_GET_LSR(uart);
532 if (lsr & TEMT)
533 return TIOCSER_TEMT;
534 else
535 return 0;
536}
537
538static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
539{
540#ifdef CONFIG_SERIAL_BFIN_CTSRTS
541 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
542 if (uart->cts_pin < 0)
543 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
544
545 if (gpio_get_value(uart->cts_pin))
546 return TIOCM_DSR | TIOCM_CAR;
547 else
548#endif
549 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
550}
551
552static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
553{
554#ifdef CONFIG_SERIAL_BFIN_CTSRTS
555 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
556 if (uart->rts_pin < 0)
557 return;
558
559 if (mctrl & TIOCM_RTS)
560 gpio_set_value(uart->rts_pin, 0);
561 else
562 gpio_set_value(uart->rts_pin, 1);
563#endif
564}
565
566/*
567 * Handle any change of modem status signal since we were last called.
568 */
569static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
570{
571#ifdef CONFIG_SERIAL_BFIN_CTSRTS
572 unsigned int status;
573# ifdef CONFIG_SERIAL_BFIN_DMA
574 struct uart_info *info = uart->port.info;
575 struct tty_struct *tty = info->tty;
576
577 status = bfin_serial_get_mctrl(&uart->port);
578 if (!(status & TIOCM_CTS)) {
579 tty->hw_stopped = 1;
580 } else {
581 tty->hw_stopped = 0;
582 }
583# else
584 status = bfin_serial_get_mctrl(&uart->port);
585 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
586 if (!(status & TIOCM_CTS))
587 schedule_work(&uart->cts_workqueue);
588# endif
589#endif
590}
591
592/*
593 * Interrupts are always disabled.
594 */
595static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
596{
Mike Frysingercf686762007-06-11 16:12:49 +0800597 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
598 u16 lcr = UART_GET_LCR(uart);
599 if (break_state)
600 lcr |= SB;
601 else
602 lcr &= ~SB;
603 UART_PUT_LCR(uart, lcr);
604 SSYNC();
Bryan Wu194de562007-05-06 14:50:30 -0700605}
606
607static int bfin_serial_startup(struct uart_port *port)
608{
609 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
610
611#ifdef CONFIG_SERIAL_BFIN_DMA
612 dma_addr_t dma_handle;
613
614 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
615 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
616 return -EBUSY;
617 }
618
619 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
620 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
621 free_dma(uart->rx_dma_channel);
622 return -EBUSY;
623 }
624
625 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
626 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
627
628 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
629 uart->rx_dma_buf.head = 0;
630 uart->rx_dma_buf.tail = 0;
631 uart->rx_dma_nrows = 0;
632
633 set_dma_config(uart->rx_dma_channel,
634 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
635 INTR_ON_ROW, DIMENSION_2D,
636 DATA_SIZE_8));
637 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
638 set_dma_x_modify(uart->rx_dma_channel, 1);
639 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
640 set_dma_y_modify(uart->rx_dma_channel, 1);
641 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
642 enable_dma(uart->rx_dma_channel);
643
644 uart->rx_dma_timer.data = (unsigned long)(uart);
645 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
646 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
647 add_timer(&(uart->rx_dma_timer));
648#else
Sonic Zhang474f1a62007-06-29 16:35:17 +0800649# ifdef CONFIG_KGDB_UART
650 if (uart->port.line != CONFIG_KGDB_UART_PORT && request_irq
651# else
Bryan Wu194de562007-05-06 14:50:30 -0700652 if (request_irq
Sonic Zhang474f1a62007-06-29 16:35:17 +0800653# endif
Aubrey Li5c4e4722007-05-21 18:09:38 +0800654 (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
Bryan Wu194de562007-05-06 14:50:30 -0700655 "BFIN_UART_RX", uart)) {
656 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
657 return -EBUSY;
658 }
659
660 if (request_irq
Aubrey Li5c4e4722007-05-21 18:09:38 +0800661 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
Bryan Wu194de562007-05-06 14:50:30 -0700662 "BFIN_UART_TX", uart)) {
663 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
664 free_irq(uart->port.irq, uart);
665 return -EBUSY;
666 }
667#endif
668 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
669 return 0;
670}
671
672static void bfin_serial_shutdown(struct uart_port *port)
673{
674 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
675
676#ifdef CONFIG_SERIAL_BFIN_DMA
677 disable_dma(uart->tx_dma_channel);
678 free_dma(uart->tx_dma_channel);
679 disable_dma(uart->rx_dma_channel);
680 free_dma(uart->rx_dma_channel);
681 del_timer(&(uart->rx_dma_timer));
682#else
Sonic Zhang474f1a62007-06-29 16:35:17 +0800683#ifdef CONFIG_KGDB_UART
684 if (uart->port.line != CONFIG_KGDB_UART_PORT)
685#endif
Bryan Wu194de562007-05-06 14:50:30 -0700686 free_irq(uart->port.irq, uart);
687 free_irq(uart->port.irq+1, uart);
688#endif
689}
690
691static void
692bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
693 struct ktermios *old)
694{
695 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
696 unsigned long flags;
697 unsigned int baud, quot;
698 unsigned short val, ier, lsr, lcr = 0;
699
700 switch (termios->c_cflag & CSIZE) {
701 case CS8:
702 lcr = WLS(8);
703 break;
704 case CS7:
705 lcr = WLS(7);
706 break;
707 case CS6:
708 lcr = WLS(6);
709 break;
710 case CS5:
711 lcr = WLS(5);
712 break;
713 default:
714 printk(KERN_ERR "%s: word lengh not supported\n",
715 __FUNCTION__);
716 }
717
718 if (termios->c_cflag & CSTOPB)
719 lcr |= STB;
Mike Frysinger19aa6382007-06-11 16:16:45 +0800720 if (termios->c_cflag & PARENB)
Bryan Wu194de562007-05-06 14:50:30 -0700721 lcr |= PEN;
Mike Frysinger19aa6382007-06-11 16:16:45 +0800722 if (!(termios->c_cflag & PARODD))
723 lcr |= EPS;
724 if (termios->c_cflag & CMSPAR)
725 lcr |= STP;
Bryan Wu194de562007-05-06 14:50:30 -0700726
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800727 port->read_status_mask = OE;
728 if (termios->c_iflag & INPCK)
729 port->read_status_mask |= (FE | PE);
730 if (termios->c_iflag & (BRKINT | PARMRK))
731 port->read_status_mask |= BI;
Bryan Wu194de562007-05-06 14:50:30 -0700732
Mike Frysinger2ac5ee42007-05-21 18:09:39 +0800733 /*
734 * Characters to ignore
735 */
736 port->ignore_status_mask = 0;
737 if (termios->c_iflag & IGNPAR)
738 port->ignore_status_mask |= FE | PE;
739 if (termios->c_iflag & IGNBRK) {
740 port->ignore_status_mask |= BI;
741 /*
742 * If we're ignoring parity and break indicators,
743 * ignore overruns too (for real raw support).
744 */
745 if (termios->c_iflag & IGNPAR)
746 port->ignore_status_mask |= OE;
747 }
Bryan Wu194de562007-05-06 14:50:30 -0700748
749 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
750 quot = uart_get_divisor(port, baud);
751 spin_lock_irqsave(&uart->port.lock, flags);
752
753 do {
754 lsr = UART_GET_LSR(uart);
755 } while (!(lsr & TEMT));
756
757 /* Disable UART */
758 ier = UART_GET_IER(uart);
759 UART_PUT_IER(uart, 0);
760
761 /* Set DLAB in LCR to Access DLL and DLH */
762 val = UART_GET_LCR(uart);
763 val |= DLAB;
764 UART_PUT_LCR(uart, val);
765 SSYNC();
766
767 UART_PUT_DLL(uart, quot & 0xFF);
768 SSYNC();
769 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
770 SSYNC();
771
772 /* Clear DLAB in LCR to Access THR RBR IER */
773 val = UART_GET_LCR(uart);
774 val &= ~DLAB;
775 UART_PUT_LCR(uart, val);
776 SSYNC();
777
778 UART_PUT_LCR(uart, lcr);
779
780 /* Enable UART */
781 UART_PUT_IER(uart, ier);
782
783 val = UART_GET_GCTL(uart);
784 val |= UCEN;
785 UART_PUT_GCTL(uart, val);
786
787 spin_unlock_irqrestore(&uart->port.lock, flags);
788}
789
790static const char *bfin_serial_type(struct uart_port *port)
791{
792 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
793
794 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
795}
796
797/*
798 * Release the memory region(s) being used by 'port'.
799 */
800static void bfin_serial_release_port(struct uart_port *port)
801{
802}
803
804/*
805 * Request the memory region(s) being used by 'port'.
806 */
807static int bfin_serial_request_port(struct uart_port *port)
808{
809 return 0;
810}
811
812/*
813 * Configure/autoconfigure the port.
814 */
815static void bfin_serial_config_port(struct uart_port *port, int flags)
816{
817 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
818
819 if (flags & UART_CONFIG_TYPE &&
820 bfin_serial_request_port(&uart->port) == 0)
821 uart->port.type = PORT_BFIN;
822}
823
824/*
825 * Verify the new serial_struct (for TIOCSSERIAL).
826 * The only change we allow are to the flags and type, and
827 * even then only between PORT_BFIN and PORT_UNKNOWN
828 */
829static int
830bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
831{
832 return 0;
833}
834
835static struct uart_ops bfin_serial_pops = {
836 .tx_empty = bfin_serial_tx_empty,
837 .set_mctrl = bfin_serial_set_mctrl,
838 .get_mctrl = bfin_serial_get_mctrl,
839 .stop_tx = bfin_serial_stop_tx,
840 .start_tx = bfin_serial_start_tx,
841 .stop_rx = bfin_serial_stop_rx,
842 .enable_ms = bfin_serial_enable_ms,
843 .break_ctl = bfin_serial_break_ctl,
844 .startup = bfin_serial_startup,
845 .shutdown = bfin_serial_shutdown,
846 .set_termios = bfin_serial_set_termios,
847 .type = bfin_serial_type,
848 .release_port = bfin_serial_release_port,
849 .request_port = bfin_serial_request_port,
850 .config_port = bfin_serial_config_port,
851 .verify_port = bfin_serial_verify_port,
852};
853
854static void __init bfin_serial_init_ports(void)
855{
856 static int first = 1;
857 int i;
858
859 if (!first)
860 return;
861 first = 0;
862
863 for (i = 0; i < nr_ports; i++) {
864 bfin_serial_ports[i].port.uartclk = get_sclk();
865 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
866 bfin_serial_ports[i].port.line = i;
867 bfin_serial_ports[i].port.iotype = UPIO_MEM;
868 bfin_serial_ports[i].port.membase =
869 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
870 bfin_serial_ports[i].port.mapbase =
871 bfin_serial_resource[i].uart_base_addr;
872 bfin_serial_ports[i].port.irq =
873 bfin_serial_resource[i].uart_irq;
874 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
875#ifdef CONFIG_SERIAL_BFIN_DMA
876 bfin_serial_ports[i].tx_done = 1;
877 bfin_serial_ports[i].tx_count = 0;
878 bfin_serial_ports[i].tx_dma_channel =
879 bfin_serial_resource[i].uart_tx_dma_channel;
880 bfin_serial_ports[i].rx_dma_channel =
881 bfin_serial_resource[i].uart_rx_dma_channel;
882 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
883#else
884 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
885#endif
886#ifdef CONFIG_SERIAL_BFIN_CTSRTS
887 bfin_serial_ports[i].cts_pin =
888 bfin_serial_resource[i].uart_cts_pin;
889 bfin_serial_ports[i].rts_pin =
890 bfin_serial_resource[i].uart_rts_pin;
891#endif
892 bfin_serial_hw_init(&bfin_serial_ports[i]);
893
894 }
895}
896
897#ifdef CONFIG_SERIAL_BFIN_CONSOLE
898static void bfin_serial_console_putchar(struct uart_port *port, int ch)
899{
900 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
901 while (!(UART_GET_LSR(uart)))
902 barrier();
903 UART_PUT_CHAR(uart, ch);
904 SSYNC();
905}
906
907/*
908 * Interrupts are disabled on entering
909 */
910static void
911bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
912{
913 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
914 int flags = 0;
915
916 spin_lock_irqsave(&uart->port.lock, flags);
917 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
918 spin_unlock_irqrestore(&uart->port.lock, flags);
919
920}
921
922/*
923 * If the port was already initialised (eg, by a boot loader),
924 * try to determine the current setup.
925 */
926static void __init
927bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
928 int *parity, int *bits)
929{
930 unsigned short status;
931
932 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
933 if (status == (ERBFI | ETBEI)) {
934 /* ok, the port was enabled */
935 unsigned short lcr, val;
936 unsigned short dlh, dll;
937
938 lcr = UART_GET_LCR(uart);
939
940 *parity = 'n';
941 if (lcr & PEN) {
942 if (lcr & EPS)
943 *parity = 'e';
944 else
945 *parity = 'o';
946 }
947 switch (lcr & 0x03) {
948 case 0: *bits = 5; break;
949 case 1: *bits = 6; break;
950 case 2: *bits = 7; break;
951 case 3: *bits = 8; break;
952 }
953 /* Set DLAB in LCR to Access DLL and DLH */
954 val = UART_GET_LCR(uart);
955 val |= DLAB;
956 UART_PUT_LCR(uart, val);
957
958 dll = UART_GET_DLL(uart);
959 dlh = UART_GET_DLH(uart);
960
961 /* Clear DLAB in LCR to Access THR RBR IER */
962 val = UART_GET_LCR(uart);
963 val &= ~DLAB;
964 UART_PUT_LCR(uart, val);
965
966 *baud = get_sclk() / (16*(dll | dlh << 8));
967 }
968 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
969}
970
971static int __init
972bfin_serial_console_setup(struct console *co, char *options)
973{
974 struct bfin_serial_port *uart;
975 int baud = 57600;
976 int bits = 8;
977 int parity = 'n';
978#ifdef CONFIG_SERIAL_BFIN_CTSRTS
979 int flow = 'r';
980#else
981 int flow = 'n';
982#endif
983
984 /*
985 * Check whether an invalid uart number has been specified, and
986 * if so, search for the first available port that does have
987 * console support.
988 */
989 if (co->index == -1 || co->index >= nr_ports)
990 co->index = 0;
991 uart = &bfin_serial_ports[co->index];
992
993 if (options)
994 uart_parse_options(options, &baud, &parity, &bits, &flow);
995 else
996 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
997
998 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
999}
1000
1001static struct uart_driver bfin_serial_reg;
1002static struct console bfin_serial_console = {
1003 .name = BFIN_SERIAL_NAME,
1004 .write = bfin_serial_console_write,
1005 .device = uart_console_device,
1006 .setup = bfin_serial_console_setup,
1007 .flags = CON_PRINTBUFFER,
1008 .index = -1,
1009 .data = &bfin_serial_reg,
1010};
1011
1012static int __init bfin_serial_rs_console_init(void)
1013{
1014 bfin_serial_init_ports();
1015 register_console(&bfin_serial_console);
Sonic Zhang474f1a62007-06-29 16:35:17 +08001016#ifdef CONFIG_KGDB_UART
1017 kgdb_entry_state = 0;
1018 init_kgdb_uart();
1019#endif
Bryan Wu194de562007-05-06 14:50:30 -07001020 return 0;
1021}
1022console_initcall(bfin_serial_rs_console_init);
1023
1024#define BFIN_SERIAL_CONSOLE &bfin_serial_console
1025#else
1026#define BFIN_SERIAL_CONSOLE NULL
1027#endif
1028
1029static struct uart_driver bfin_serial_reg = {
1030 .owner = THIS_MODULE,
1031 .driver_name = "bfin-uart",
1032 .dev_name = BFIN_SERIAL_NAME,
1033 .major = BFIN_SERIAL_MAJOR,
1034 .minor = BFIN_SERIAL_MINOR,
1035 .nr = NR_PORTS,
1036 .cons = BFIN_SERIAL_CONSOLE,
1037};
1038
1039static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1040{
1041 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1042
1043 if (uart)
1044 uart_suspend_port(&bfin_serial_reg, &uart->port);
1045
1046 return 0;
1047}
1048
1049static int bfin_serial_resume(struct platform_device *dev)
1050{
1051 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1052
1053 if (uart)
1054 uart_resume_port(&bfin_serial_reg, &uart->port);
1055
1056 return 0;
1057}
1058
1059static int bfin_serial_probe(struct platform_device *dev)
1060{
1061 struct resource *res = dev->resource;
1062 int i;
1063
1064 for (i = 0; i < dev->num_resources; i++, res++)
1065 if (res->flags & IORESOURCE_MEM)
1066 break;
1067
1068 if (i < dev->num_resources) {
1069 for (i = 0; i < nr_ports; i++, res++) {
1070 if (bfin_serial_ports[i].port.mapbase != res->start)
1071 continue;
1072 bfin_serial_ports[i].port.dev = &dev->dev;
1073 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1074 platform_set_drvdata(dev, &bfin_serial_ports[i]);
1075 }
1076 }
1077
1078 return 0;
1079}
1080
1081static int bfin_serial_remove(struct platform_device *pdev)
1082{
1083 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1084
1085
1086#ifdef CONFIG_SERIAL_BFIN_CTSRTS
1087 gpio_free(uart->cts_pin);
1088 gpio_free(uart->rts_pin);
1089#endif
1090
1091 platform_set_drvdata(pdev, NULL);
1092
1093 if (uart)
1094 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1095
1096 return 0;
1097}
1098
1099static struct platform_driver bfin_serial_driver = {
1100 .probe = bfin_serial_probe,
1101 .remove = bfin_serial_remove,
1102 .suspend = bfin_serial_suspend,
1103 .resume = bfin_serial_resume,
1104 .driver = {
1105 .name = "bfin-uart",
1106 },
1107};
1108
1109static int __init bfin_serial_init(void)
1110{
1111 int ret;
Sonic Zhang474f1a62007-06-29 16:35:17 +08001112#ifdef CONFIG_KGDB_UART
1113 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1114 struct termios t;
1115#endif
Bryan Wu194de562007-05-06 14:50:30 -07001116
1117 pr_info("Serial: Blackfin serial driver\n");
1118
1119 bfin_serial_init_ports();
1120
1121 ret = uart_register_driver(&bfin_serial_reg);
1122 if (ret == 0) {
1123 ret = platform_driver_register(&bfin_serial_driver);
1124 if (ret) {
1125 pr_debug("uart register failed\n");
1126 uart_unregister_driver(&bfin_serial_reg);
1127 }
1128 }
Sonic Zhang474f1a62007-06-29 16:35:17 +08001129#ifdef CONFIG_KGDB_UART
1130 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1131 request_irq(uart->port.irq, bfin_serial_int,
1132 IRQF_DISABLED, "BFIN_UART_RX", uart);
1133 pr_info("Request irq for kgdb uart port\n");
1134 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1135 __builtin_bfin_ssync();
1136 t.c_cflag = CS8|B57600;
1137 t.c_iflag = 0;
1138 t.c_oflag = 0;
1139 t.c_lflag = ICANON;
1140 t.c_line = CONFIG_KGDB_UART_PORT;
1141 bfin_serial_set_termios(&uart->port, &t, &t);
1142 }
1143#endif
Bryan Wu194de562007-05-06 14:50:30 -07001144 return ret;
1145}
1146
1147static void __exit bfin_serial_exit(void)
1148{
1149 platform_driver_unregister(&bfin_serial_driver);
1150 uart_unregister_driver(&bfin_serial_reg);
1151}
1152
1153module_init(bfin_serial_init);
1154module_exit(bfin_serial_exit);
1155
1156MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1157MODULE_DESCRIPTION("Blackfin generic serial port driver");
1158MODULE_LICENSE("GPL");
1159MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);