Jean-Christop PLAGNIOL-VILLARD | 6d803ba | 2010-11-17 10:04:33 +0100 | [diff] [blame] | 1 | |
| 2 | config CLKDEV_LOOKUP |
| 3 | bool |
| 4 | select HAVE_CLK |
Kyungmin Park | aa3831c | 2011-07-18 16:34:54 +0900 | [diff] [blame] | 5 | |
Shawn Guo | 5c77f56 | 2011-12-20 14:46:38 +0800 | [diff] [blame] | 6 | config HAVE_CLK_PREPARE |
| 7 | bool |
| 8 | |
Kyungmin Park | aa3831c | 2011-07-18 16:34:54 +0900 | [diff] [blame] | 9 | config HAVE_MACH_CLKDEV |
| 10 | bool |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 11 | |
Arnd Bergmann | 8fb61e3 | 2012-03-17 21:10:51 +0000 | [diff] [blame] | 12 | config COMMON_CLK |
| 13 | bool |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 14 | select HAVE_CLK_PREPARE |
Rob Herring | 01033be | 2012-04-09 15:24:58 -0500 | [diff] [blame] | 15 | select CLKDEV_LOOKUP |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 16 | ---help--- |
| 17 | The common clock framework is a single definition of struct |
| 18 | clk, useful across many platforms, as well as an |
| 19 | implementation of the clock API in include/linux/clk.h. |
| 20 | Architectures utilizing the common struct clk should select |
Arnd Bergmann | 8fb61e3 | 2012-03-17 21:10:51 +0000 | [diff] [blame] | 21 | this option. |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 22 | |
Arnd Bergmann | 8fb61e3 | 2012-03-17 21:10:51 +0000 | [diff] [blame] | 23 | menu "Common Clock Framework" |
| 24 | depends on COMMON_CLK |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 25 | |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 26 | config COMMON_CLK_DEBUG |
| 27 | bool "DebugFS representation of clock tree" |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 28 | select DEBUG_FS |
| 29 | ---help--- |
| 30 | Creates a directory hierchy in debugfs for visualizing the clk |
| 31 | tree structure. Each directory contains read-only members |
| 32 | that export information specific to that clk node: clk_rate, |
| 33 | clk_flags, clk_prepare_count, clk_enable_count & |
| 34 | clk_notifier_count. |
| 35 | |
Mark Brown | f05259a | 2012-05-17 10:04:57 +0100 | [diff] [blame] | 36 | config COMMON_CLK_WM831X |
| 37 | tristate "Clock driver for WM831x/2x PMICs" |
| 38 | depends on MFD_WM831X |
| 39 | ---help--- |
| 40 | Supports the clocking subsystem of the WM831x/2x series of |
| 41 | PMICs from Wolfson Microlectronics. |
| 42 | |
Linus Walleij | f9a6aa4 | 2012-08-06 18:32:08 +0200 | [diff] [blame] | 43 | config COMMON_CLK_VERSATILE |
Linus Walleij | 672575e | 2012-08-30 19:39:00 +0200 | [diff] [blame] | 44 | bool "Clock driver for ARM Reference designs" |
Pawel Moll | bcd6f56 | 2012-09-18 15:17:48 +0100 | [diff] [blame] | 45 | depends on ARCH_INTEGRATOR || ARCH_REALVIEW || ARCH_VEXPRESS |
Linus Walleij | f9a6aa4 | 2012-08-06 18:32:08 +0200 | [diff] [blame] | 46 | ---help--- |
Pawel Moll | bcd6f56 | 2012-09-18 15:17:48 +0100 | [diff] [blame] | 47 | Supports clocking on ARM Reference designs: |
| 48 | - Integrator/AP and Integrator/CP |
| 49 | - RealView PB1176, EB, PB11MP and PBX |
| 50 | - Versatile Express |
Linus Walleij | f9a6aa4 | 2012-08-06 18:32:08 +0200 | [diff] [blame] | 51 | |
Jonghwa Lee | 73118e6 | 2012-08-28 17:54:28 +0900 | [diff] [blame] | 52 | config COMMON_CLK_MAX77686 |
| 53 | tristate "Clock driver for Maxim 77686 MFD" |
| 54 | depends on MFD_MAX77686 |
| 55 | ---help--- |
| 56 | This driver supports Maxim 77686 crystal oscillator clock. |
| 57 | |
Sebastian Hesselbarth | 9abd5f0 | 2013-04-11 21:42:29 +0200 | [diff] [blame] | 58 | config COMMON_CLK_SI5351 |
| 59 | tristate "Clock driver for SiLabs 5351A/B/C" |
| 60 | depends on I2C |
Sebastian Hesselbarth | 476ba5f | 2013-04-15 09:00:14 +0200 | [diff] [blame^] | 61 | depends on OF |
Sebastian Hesselbarth | 9abd5f0 | 2013-04-11 21:42:29 +0200 | [diff] [blame] | 62 | select REGMAP_I2C |
| 63 | select RATIONAL |
| 64 | ---help--- |
| 65 | This driver supports Silicon Labs 5351A/B/C programmable clock |
| 66 | generators. |
| 67 | |
Peter Ujfalusi | f9f8c04 | 2012-09-14 17:30:27 +0300 | [diff] [blame] | 68 | config CLK_TWL6040 |
| 69 | tristate "External McPDM functional clock from twl6040" |
| 70 | depends on TWL6040_CORE |
| 71 | ---help--- |
| 72 | Enable the external functional clock support on OMAP4+ platforms for |
| 73 | McPDM. McPDM module is using the external bit clock on the McPDM bus |
| 74 | as functional clock. |
| 75 | |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 76 | config COMMON_CLK_AXI_CLKGEN |
| 77 | tristate "AXI clkgen driver" |
| 78 | depends on ARCH_ZYNQ || MICROBLAZE |
| 79 | help |
| 80 | ---help--- |
| 81 | Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx |
| 82 | FPGAs. It is commonly used in Analog Devices' reference designs. |
| 83 | |
Arnd Bergmann | 8fb61e3 | 2012-03-17 21:10:51 +0000 | [diff] [blame] | 84 | endmenu |
Sebastian Hesselbarth | 97fa4cf | 2012-11-17 15:22:22 +0100 | [diff] [blame] | 85 | |
| 86 | source "drivers/clk/mvebu/Kconfig" |