dmitry pervushin | 1e3dd53 | 2009-04-22 23:52:45 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Freescale STMP378X SoC pin multiplexing |
| 3 | * |
| 4 | * Author: Vladislav Buzov <vbuzov@embeddedalley.com> |
| 5 | * |
| 6 | * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. |
| 7 | * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. |
| 8 | */ |
| 9 | |
| 10 | /* |
| 11 | * The code contained herein is licensed under the GNU General Public |
| 12 | * License. You may obtain a copy of the GNU General Public License |
| 13 | * Version 2 or later at the following locations: |
| 14 | * |
| 15 | * http://www.opensource.org/licenses/gpl-license.html |
| 16 | * http://www.gnu.org/copyleft/gpl.html |
| 17 | */ |
| 18 | #ifndef __ASM_ARCH_PINS_H |
| 19 | #define __ASM_ARCH_PINS_H |
| 20 | |
| 21 | /* |
| 22 | * Define all STMP378x pins, a pin name corresponds to a STMP378x hardware |
| 23 | * interface this pin belongs to. |
| 24 | */ |
| 25 | |
| 26 | /* Bank 0 */ |
| 27 | #define PINID_GPMI_D00 STMP3XXX_PINID(0, 0) |
| 28 | #define PINID_GPMI_D01 STMP3XXX_PINID(0, 1) |
| 29 | #define PINID_GPMI_D02 STMP3XXX_PINID(0, 2) |
| 30 | #define PINID_GPMI_D03 STMP3XXX_PINID(0, 3) |
| 31 | #define PINID_GPMI_D04 STMP3XXX_PINID(0, 4) |
| 32 | #define PINID_GPMI_D05 STMP3XXX_PINID(0, 5) |
| 33 | #define PINID_GPMI_D06 STMP3XXX_PINID(0, 6) |
| 34 | #define PINID_GPMI_D07 STMP3XXX_PINID(0, 7) |
| 35 | #define PINID_GPMI_D08 STMP3XXX_PINID(0, 8) |
| 36 | #define PINID_GPMI_D09 STMP3XXX_PINID(0, 9) |
| 37 | #define PINID_GPMI_D10 STMP3XXX_PINID(0, 10) |
| 38 | #define PINID_GPMI_D11 STMP3XXX_PINID(0, 11) |
| 39 | #define PINID_GPMI_D12 STMP3XXX_PINID(0, 12) |
| 40 | #define PINID_GPMI_D13 STMP3XXX_PINID(0, 13) |
| 41 | #define PINID_GPMI_D14 STMP3XXX_PINID(0, 14) |
| 42 | #define PINID_GPMI_D15 STMP3XXX_PINID(0, 15) |
| 43 | #define PINID_GPMI_CLE STMP3XXX_PINID(0, 16) |
| 44 | #define PINID_GPMI_ALE STMP3XXX_PINID(0, 17) |
| 45 | #define PINID_GMPI_CE2N STMP3XXX_PINID(0, 18) |
| 46 | #define PINID_GPMI_RDY0 STMP3XXX_PINID(0, 19) |
| 47 | #define PINID_GPMI_RDY1 STMP3XXX_PINID(0, 20) |
| 48 | #define PINID_GPMI_RDY2 STMP3XXX_PINID(0, 21) |
| 49 | #define PINID_GPMI_RDY3 STMP3XXX_PINID(0, 22) |
| 50 | #define PINID_GPMI_WPN STMP3XXX_PINID(0, 23) |
| 51 | #define PINID_GPMI_WRN STMP3XXX_PINID(0, 24) |
| 52 | #define PINID_GPMI_RDN STMP3XXX_PINID(0, 25) |
| 53 | #define PINID_AUART1_CTS STMP3XXX_PINID(0, 26) |
| 54 | #define PINID_AUART1_RTS STMP3XXX_PINID(0, 27) |
| 55 | #define PINID_AUART1_RX STMP3XXX_PINID(0, 28) |
| 56 | #define PINID_AUART1_TX STMP3XXX_PINID(0, 29) |
| 57 | #define PINID_I2C_SCL STMP3XXX_PINID(0, 30) |
| 58 | #define PINID_I2C_SDA STMP3XXX_PINID(0, 31) |
| 59 | |
| 60 | /* Bank 1 */ |
| 61 | #define PINID_LCD_D00 STMP3XXX_PINID(1, 0) |
| 62 | #define PINID_LCD_D01 STMP3XXX_PINID(1, 1) |
| 63 | #define PINID_LCD_D02 STMP3XXX_PINID(1, 2) |
| 64 | #define PINID_LCD_D03 STMP3XXX_PINID(1, 3) |
| 65 | #define PINID_LCD_D04 STMP3XXX_PINID(1, 4) |
| 66 | #define PINID_LCD_D05 STMP3XXX_PINID(1, 5) |
| 67 | #define PINID_LCD_D06 STMP3XXX_PINID(1, 6) |
| 68 | #define PINID_LCD_D07 STMP3XXX_PINID(1, 7) |
| 69 | #define PINID_LCD_D08 STMP3XXX_PINID(1, 8) |
| 70 | #define PINID_LCD_D09 STMP3XXX_PINID(1, 9) |
| 71 | #define PINID_LCD_D10 STMP3XXX_PINID(1, 10) |
| 72 | #define PINID_LCD_D11 STMP3XXX_PINID(1, 11) |
| 73 | #define PINID_LCD_D12 STMP3XXX_PINID(1, 12) |
| 74 | #define PINID_LCD_D13 STMP3XXX_PINID(1, 13) |
| 75 | #define PINID_LCD_D14 STMP3XXX_PINID(1, 14) |
| 76 | #define PINID_LCD_D15 STMP3XXX_PINID(1, 15) |
| 77 | #define PINID_LCD_D16 STMP3XXX_PINID(1, 16) |
| 78 | #define PINID_LCD_D17 STMP3XXX_PINID(1, 17) |
| 79 | #define PINID_LCD_RESET STMP3XXX_PINID(1, 18) |
| 80 | #define PINID_LCD_RS STMP3XXX_PINID(1, 19) |
| 81 | #define PINID_LCD_WR STMP3XXX_PINID(1, 20) |
| 82 | #define PINID_LCD_CS STMP3XXX_PINID(1, 21) |
| 83 | #define PINID_LCD_DOTCK STMP3XXX_PINID(1, 22) |
| 84 | #define PINID_LCD_ENABLE STMP3XXX_PINID(1, 23) |
| 85 | #define PINID_LCD_HSYNC STMP3XXX_PINID(1, 24) |
| 86 | #define PINID_LCD_VSYNC STMP3XXX_PINID(1, 25) |
| 87 | #define PINID_PWM0 STMP3XXX_PINID(1, 26) |
| 88 | #define PINID_PWM1 STMP3XXX_PINID(1, 27) |
| 89 | #define PINID_PWM2 STMP3XXX_PINID(1, 28) |
| 90 | #define PINID_PWM3 STMP3XXX_PINID(1, 29) |
| 91 | #define PINID_PWM4 STMP3XXX_PINID(1, 30) |
| 92 | |
| 93 | /* Bank 2 */ |
| 94 | #define PINID_SSP1_CMD STMP3XXX_PINID(2, 0) |
| 95 | #define PINID_SSP1_DETECT STMP3XXX_PINID(2, 1) |
| 96 | #define PINID_SSP1_DATA0 STMP3XXX_PINID(2, 2) |
| 97 | #define PINID_SSP1_DATA1 STMP3XXX_PINID(2, 3) |
| 98 | #define PINID_SSP1_DATA2 STMP3XXX_PINID(2, 4) |
| 99 | #define PINID_SSP1_DATA3 STMP3XXX_PINID(2, 5) |
| 100 | #define PINID_SSP1_SCK STMP3XXX_PINID(2, 6) |
| 101 | #define PINID_ROTARYA STMP3XXX_PINID(2, 7) |
| 102 | #define PINID_ROTARYB STMP3XXX_PINID(2, 8) |
| 103 | #define PINID_EMI_A00 STMP3XXX_PINID(2, 9) |
| 104 | #define PINID_EMI_A01 STMP3XXX_PINID(2, 10) |
| 105 | #define PINID_EMI_A02 STMP3XXX_PINID(2, 11) |
| 106 | #define PINID_EMI_A03 STMP3XXX_PINID(2, 12) |
| 107 | #define PINID_EMI_A04 STMP3XXX_PINID(2, 13) |
| 108 | #define PINID_EMI_A05 STMP3XXX_PINID(2, 14) |
| 109 | #define PINID_EMI_A06 STMP3XXX_PINID(2, 15) |
| 110 | #define PINID_EMI_A07 STMP3XXX_PINID(2, 16) |
| 111 | #define PINID_EMI_A08 STMP3XXX_PINID(2, 17) |
| 112 | #define PINID_EMI_A09 STMP3XXX_PINID(2, 18) |
| 113 | #define PINID_EMI_A10 STMP3XXX_PINID(2, 19) |
| 114 | #define PINID_EMI_A11 STMP3XXX_PINID(2, 20) |
| 115 | #define PINID_EMI_A12 STMP3XXX_PINID(2, 21) |
| 116 | #define PINID_EMI_BA0 STMP3XXX_PINID(2, 22) |
| 117 | #define PINID_EMI_BA1 STMP3XXX_PINID(2, 23) |
| 118 | #define PINID_EMI_CASN STMP3XXX_PINID(2, 24) |
| 119 | #define PINID_EMI_CE0N STMP3XXX_PINID(2, 25) |
| 120 | #define PINID_EMI_CE1N STMP3XXX_PINID(2, 26) |
| 121 | #define PINID_GPMI_CE1N STMP3XXX_PINID(2, 27) |
| 122 | #define PINID_GPMI_CE0N STMP3XXX_PINID(2, 28) |
| 123 | #define PINID_EMI_CKE STMP3XXX_PINID(2, 29) |
| 124 | #define PINID_EMI_RASN STMP3XXX_PINID(2, 30) |
| 125 | #define PINID_EMI_WEN STMP3XXX_PINID(2, 31) |
| 126 | |
| 127 | /* Bank 3 */ |
| 128 | #define PINID_EMI_D00 STMP3XXX_PINID(3, 0) |
| 129 | #define PINID_EMI_D01 STMP3XXX_PINID(3, 1) |
| 130 | #define PINID_EMI_D02 STMP3XXX_PINID(3, 2) |
| 131 | #define PINID_EMI_D03 STMP3XXX_PINID(3, 3) |
| 132 | #define PINID_EMI_D04 STMP3XXX_PINID(3, 4) |
| 133 | #define PINID_EMI_D05 STMP3XXX_PINID(3, 5) |
| 134 | #define PINID_EMI_D06 STMP3XXX_PINID(3, 6) |
| 135 | #define PINID_EMI_D07 STMP3XXX_PINID(3, 7) |
| 136 | #define PINID_EMI_D08 STMP3XXX_PINID(3, 8) |
| 137 | #define PINID_EMI_D09 STMP3XXX_PINID(3, 9) |
| 138 | #define PINID_EMI_D10 STMP3XXX_PINID(3, 10) |
| 139 | #define PINID_EMI_D11 STMP3XXX_PINID(3, 11) |
| 140 | #define PINID_EMI_D12 STMP3XXX_PINID(3, 12) |
| 141 | #define PINID_EMI_D13 STMP3XXX_PINID(3, 13) |
| 142 | #define PINID_EMI_D14 STMP3XXX_PINID(3, 14) |
| 143 | #define PINID_EMI_D15 STMP3XXX_PINID(3, 15) |
| 144 | #define PINID_EMI_DQM0 STMP3XXX_PINID(3, 16) |
| 145 | #define PINID_EMI_DQM1 STMP3XXX_PINID(3, 17) |
| 146 | #define PINID_EMI_DQS0 STMP3XXX_PINID(3, 18) |
| 147 | #define PINID_EMI_DQS1 STMP3XXX_PINID(3, 19) |
| 148 | #define PINID_EMI_CLK STMP3XXX_PINID(3, 20) |
| 149 | #define PINID_EMI_CLKN STMP3XXX_PINID(3, 21) |
| 150 | |
| 151 | #endif /* __ASM_ARCH_PINS_H */ |