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Sascha Hauer29693242012-03-15 10:04:35 +01001/*
2 * simple driver for PWM (Pulse Width Modulator) controller
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14#include <linux/slab.h>
15#include <linux/err.h>
16#include <linux/clk.h>
17#include <linux/io.h>
18#include <linux/pwm.h>
19#include <mach/hardware.h>
20
21
22/* i.MX1 and i.MX21 share the same PWM function block: */
23
24#define MX1_PWMC 0x00 /* PWM Control Register */
25#define MX1_PWMS 0x04 /* PWM Sample Register */
26#define MX1_PWMP 0x08 /* PWM Period Register */
27
Sascha Hauer66ad6a62012-08-28 11:39:25 +020028#define MX1_PWMC_EN (1 << 4)
Sascha Hauer29693242012-03-15 10:04:35 +010029
30/* i.MX27, i.MX31, i.MX35 share the same PWM function block: */
31
32#define MX3_PWMCR 0x00 /* PWM Control Register */
33#define MX3_PWMSAR 0x0C /* PWM Sample Register */
34#define MX3_PWMPR 0x10 /* PWM Period Register */
35#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
36#define MX3_PWMCR_DOZEEN (1 << 24)
37#define MX3_PWMCR_WAITEN (1 << 23)
38#define MX3_PWMCR_DBGEN (1 << 22)
39#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
40#define MX3_PWMCR_CLKSRC_IPG (1 << 16)
41#define MX3_PWMCR_EN (1 << 0)
42
43struct imx_chip {
44 struct clk *clk;
45
Sascha Hauer140827c2012-08-28 09:12:01 +020046 int enabled;
Sascha Hauer29693242012-03-15 10:04:35 +010047 void __iomem *mmio_base;
48
49 struct pwm_chip chip;
Sascha Hauer19e73332012-07-03 17:28:14 +020050
51 int (*config)(struct pwm_chip *chip,
52 struct pwm_device *pwm, int duty_ns, int period_ns);
Sascha Hauer66ad6a62012-08-28 11:39:25 +020053 void (*set_enable)(struct pwm_chip *chip, bool enable);
Sascha Hauer29693242012-03-15 10:04:35 +010054};
55
56#define to_imx_chip(chip) container_of(chip, struct imx_chip, chip)
57
Sascha Hauer19e73332012-07-03 17:28:14 +020058static int imx_pwm_config_v1(struct pwm_chip *chip,
59 struct pwm_device *pwm, int duty_ns, int period_ns)
60{
61 struct imx_chip *imx = to_imx_chip(chip);
62
63 /*
64 * The PWM subsystem allows for exact frequencies. However,
65 * I cannot connect a scope on my device to the PWM line and
66 * thus cannot provide the program the PWM controller
67 * exactly. Instead, I'm relying on the fact that the
68 * Bootloader (u-boot or WinCE+haret) has programmed the PWM
69 * function group already. So I'll just modify the PWM sample
70 * register to follow the ratio of duty_ns vs. period_ns
71 * accordingly.
72 *
73 * This is good enough for programming the brightness of
74 * the LCD backlight.
75 *
76 * The real implementation would divide PERCLK[0] first by
77 * both the prescaler (/1 .. /128) and then by CLKSEL
78 * (/2 .. /16).
79 */
80 u32 max = readl(imx->mmio_base + MX1_PWMP);
81 u32 p = max * duty_ns / period_ns;
82 writel(max - p, imx->mmio_base + MX1_PWMS);
83
84 return 0;
85}
86
Sascha Hauer66ad6a62012-08-28 11:39:25 +020087static void imx_pwm_set_enable_v1(struct pwm_chip *chip, bool enable)
88{
89 struct imx_chip *imx = to_imx_chip(chip);
90 u32 val;
91
92 val = readl(imx->mmio_base + MX1_PWMC);
93
94 if (enable)
95 val |= MX1_PWMC_EN;
96 else
97 val &= ~MX1_PWMC_EN;
98
99 writel(val, imx->mmio_base + MX1_PWMC);
100}
101
Sascha Hauer19e73332012-07-03 17:28:14 +0200102static int imx_pwm_config_v2(struct pwm_chip *chip,
103 struct pwm_device *pwm, int duty_ns, int period_ns)
104{
105 struct imx_chip *imx = to_imx_chip(chip);
106 unsigned long long c;
107 unsigned long period_cycles, duty_cycles, prescale;
108 u32 cr;
109
110 c = clk_get_rate(imx->clk);
111 c = c * period_ns;
112 do_div(c, 1000000000);
113 period_cycles = c;
114
115 prescale = period_cycles / 0x10000 + 1;
116
117 period_cycles /= prescale;
118 c = (unsigned long long)period_cycles * duty_ns;
119 do_div(c, period_ns);
120 duty_cycles = c;
121
122 /*
123 * according to imx pwm RM, the real period value should be
124 * PERIOD value in PWMPR plus 2.
125 */
126 if (period_cycles > 2)
127 period_cycles -= 2;
128 else
129 period_cycles = 0;
130
131 writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
132 writel(period_cycles, imx->mmio_base + MX3_PWMPR);
133
134 cr = MX3_PWMCR_PRESCALER(prescale) |
135 MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
Sascha Hauer66ad6a62012-08-28 11:39:25 +0200136 MX3_PWMCR_DBGEN;
137
138 if (imx->enabled)
139 cr |= MX3_PWMCR_EN;
Sascha Hauer19e73332012-07-03 17:28:14 +0200140
141 if (cpu_is_mx25())
142 cr |= MX3_PWMCR_CLKSRC_IPG;
143 else
144 cr |= MX3_PWMCR_CLKSRC_IPG_HIGH;
145
146 writel(cr, imx->mmio_base + MX3_PWMCR);
147
148 return 0;
149}
150
Sascha Hauer66ad6a62012-08-28 11:39:25 +0200151static void imx_pwm_set_enable_v2(struct pwm_chip *chip, bool enable)
152{
153 struct imx_chip *imx = to_imx_chip(chip);
154 u32 val;
155
156 val = readl(imx->mmio_base + MX3_PWMCR);
157
158 if (enable)
159 val |= MX3_PWMCR_EN;
160 else
161 val &= ~MX3_PWMCR_EN;
162
163 writel(val, imx->mmio_base + MX3_PWMCR);
164}
165
Sascha Hauer29693242012-03-15 10:04:35 +0100166static int imx_pwm_config(struct pwm_chip *chip,
167 struct pwm_device *pwm, int duty_ns, int period_ns)
168{
169 struct imx_chip *imx = to_imx_chip(chip);
170
Sascha Hauer19e73332012-07-03 17:28:14 +0200171 return imx->config(chip, pwm, duty_ns, period_ns);
Sascha Hauer29693242012-03-15 10:04:35 +0100172}
173
174static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
175{
176 struct imx_chip *imx = to_imx_chip(chip);
Sascha Hauer140827c2012-08-28 09:12:01 +0200177 int ret;
Sascha Hauer29693242012-03-15 10:04:35 +0100178
Sascha Hauer140827c2012-08-28 09:12:01 +0200179 ret = clk_prepare_enable(imx->clk);
180 if (ret)
181 return ret;
182
Sascha Hauer66ad6a62012-08-28 11:39:25 +0200183 imx->set_enable(chip, true);
184
Sascha Hauer140827c2012-08-28 09:12:01 +0200185 imx->enabled = 1;
186
187 return 0;
Sascha Hauer29693242012-03-15 10:04:35 +0100188}
189
190static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
191{
192 struct imx_chip *imx = to_imx_chip(chip);
193
Sascha Hauer66ad6a62012-08-28 11:39:25 +0200194 imx->set_enable(chip, false);
Sascha Hauer29693242012-03-15 10:04:35 +0100195
Sascha Hauer140827c2012-08-28 09:12:01 +0200196 clk_disable_unprepare(imx->clk);
197 imx->enabled = 0;
Sascha Hauer29693242012-03-15 10:04:35 +0100198}
199
200static struct pwm_ops imx_pwm_ops = {
201 .enable = imx_pwm_enable,
202 .disable = imx_pwm_disable,
203 .config = imx_pwm_config,
204 .owner = THIS_MODULE,
205};
206
207static int __devinit imx_pwm_probe(struct platform_device *pdev)
208{
209 struct imx_chip *imx;
210 struct resource *r;
211 int ret = 0;
212
Axel Lina9970e32012-07-01 08:27:23 +0800213 imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
Sascha Hauer29693242012-03-15 10:04:35 +0100214 if (imx == NULL) {
215 dev_err(&pdev->dev, "failed to allocate memory\n");
216 return -ENOMEM;
217 }
218
Axel Lina9970e32012-07-01 08:27:23 +0800219 imx->clk = devm_clk_get(&pdev->dev, "pwm");
Sascha Hauer29693242012-03-15 10:04:35 +0100220
Axel Lina9970e32012-07-01 08:27:23 +0800221 if (IS_ERR(imx->clk))
222 return PTR_ERR(imx->clk);
Sascha Hauer29693242012-03-15 10:04:35 +0100223
224 imx->chip.ops = &imx_pwm_ops;
225 imx->chip.dev = &pdev->dev;
226 imx->chip.base = -1;
227 imx->chip.npwm = 1;
228
Sascha Hauer29693242012-03-15 10:04:35 +0100229 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
230 if (r == NULL) {
231 dev_err(&pdev->dev, "no memory resource defined\n");
Axel Lina9970e32012-07-01 08:27:23 +0800232 return -ENODEV;
Sascha Hauer29693242012-03-15 10:04:35 +0100233 }
234
Axel Lina9970e32012-07-01 08:27:23 +0800235 imx->mmio_base = devm_request_and_ioremap(&pdev->dev, r);
236 if (imx->mmio_base == NULL)
237 return -EADDRNOTAVAIL;
Sascha Hauer29693242012-03-15 10:04:35 +0100238
Sascha Hauer66ad6a62012-08-28 11:39:25 +0200239 if (cpu_is_mx1() || cpu_is_mx21()) {
Sascha Hauer19e73332012-07-03 17:28:14 +0200240 imx->config = imx_pwm_config_v1;
Sascha Hauer66ad6a62012-08-28 11:39:25 +0200241 imx->set_enable = imx_pwm_set_enable_v1;
242 } else {
Sascha Hauer19e73332012-07-03 17:28:14 +0200243 imx->config = imx_pwm_config_v2;
Sascha Hauer66ad6a62012-08-28 11:39:25 +0200244 imx->set_enable = imx_pwm_set_enable_v2;
245 }
Sascha Hauer19e73332012-07-03 17:28:14 +0200246
Sascha Hauer29693242012-03-15 10:04:35 +0100247 ret = pwmchip_add(&imx->chip);
248 if (ret < 0)
Axel Lina9970e32012-07-01 08:27:23 +0800249 return ret;
Sascha Hauer29693242012-03-15 10:04:35 +0100250
251 platform_set_drvdata(pdev, imx);
252 return 0;
Sascha Hauer29693242012-03-15 10:04:35 +0100253}
254
255static int __devexit imx_pwm_remove(struct platform_device *pdev)
256{
257 struct imx_chip *imx;
Sascha Hauer29693242012-03-15 10:04:35 +0100258
259 imx = platform_get_drvdata(pdev);
260 if (imx == NULL)
261 return -ENODEV;
262
Axel Lina9970e32012-07-01 08:27:23 +0800263 return pwmchip_remove(&imx->chip);
Sascha Hauer29693242012-03-15 10:04:35 +0100264}
265
266static struct platform_driver imx_pwm_driver = {
267 .driver = {
268 .name = "mxc_pwm",
269 },
270 .probe = imx_pwm_probe,
271 .remove = __devexit_p(imx_pwm_remove),
272};
273
Sascha Hauer208d0382012-08-28 08:27:40 +0200274module_platform_driver(imx_pwm_driver);
Sascha Hauer29693242012-03-15 10:04:35 +0100275
276MODULE_LICENSE("GPL v2");
277MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");