Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-mmp/pxa910.c |
| 3 | * |
| 4 | * Code specific to PXA910 |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 10 | #include <linux/module.h> |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/list.h> |
| 14 | #include <linux/io.h> |
Haojian Zhuang | 0f102b6 | 2013-06-03 10:02:59 +0800 | [diff] [blame] | 15 | #include <linux/irq.h> |
| 16 | #include <linux/irqchip/mmp.h> |
Haojian Zhuang | 157d264 | 2011-10-17 20:37:52 +0800 | [diff] [blame] | 17 | #include <linux/platform_device.h> |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 18 | |
Haojian Zhuang | a03d8b1 | 2012-08-04 23:57:38 +0800 | [diff] [blame] | 19 | #include <asm/hardware/cache-tauros2.h> |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 20 | #include <asm/mach/time.h> |
| 21 | #include <mach/addr-map.h> |
| 22 | #include <mach/regs-apbc.h> |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 23 | #include <mach/cputype.h> |
| 24 | #include <mach/irqs.h> |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 25 | #include <mach/dma.h> |
| 26 | #include <mach/mfp.h> |
| 27 | #include <mach/devices.h> |
Haojian Zhuang | 0f102b6 | 2013-06-03 10:02:59 +0800 | [diff] [blame] | 28 | #include <mach/pm-pxa910.h> |
Haojian Zhuang | c052d13 | 2013-04-21 13:21:48 +0800 | [diff] [blame] | 29 | #include <mach/pxa910.h> |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 30 | |
| 31 | #include "common.h" |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 32 | |
| 33 | #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) |
| 34 | |
| 35 | static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata = |
| 36 | { |
| 37 | MFP_ADDR_X(GPIO0, GPIO54, 0xdc), |
| 38 | MFP_ADDR_X(GPIO67, GPIO98, 0x1b8), |
| 39 | MFP_ADDR_X(GPIO100, GPIO109, 0x238), |
| 40 | |
| 41 | MFP_ADDR(GPIO123, 0xcc), |
| 42 | MFP_ADDR(GPIO124, 0xd0), |
| 43 | |
| 44 | MFP_ADDR(DF_IO0, 0x40), |
| 45 | MFP_ADDR(DF_IO1, 0x3c), |
| 46 | MFP_ADDR(DF_IO2, 0x38), |
| 47 | MFP_ADDR(DF_IO3, 0x34), |
| 48 | MFP_ADDR(DF_IO4, 0x30), |
| 49 | MFP_ADDR(DF_IO5, 0x2c), |
| 50 | MFP_ADDR(DF_IO6, 0x28), |
| 51 | MFP_ADDR(DF_IO7, 0x24), |
| 52 | MFP_ADDR(DF_IO8, 0x20), |
| 53 | MFP_ADDR(DF_IO9, 0x1c), |
| 54 | MFP_ADDR(DF_IO10, 0x18), |
| 55 | MFP_ADDR(DF_IO11, 0x14), |
| 56 | MFP_ADDR(DF_IO12, 0x10), |
| 57 | MFP_ADDR(DF_IO13, 0xc), |
| 58 | MFP_ADDR(DF_IO14, 0x8), |
| 59 | MFP_ADDR(DF_IO15, 0x4), |
| 60 | |
| 61 | MFP_ADDR(DF_nCS0_SM_nCS2, 0x44), |
| 62 | MFP_ADDR(DF_nCS1_SM_nCS3, 0x48), |
| 63 | MFP_ADDR(SM_nCS0, 0x4c), |
| 64 | MFP_ADDR(SM_nCS1, 0x50), |
| 65 | MFP_ADDR(DF_WEn, 0x54), |
| 66 | MFP_ADDR(DF_REn, 0x58), |
| 67 | MFP_ADDR(DF_CLE_SM_OEn, 0x5c), |
| 68 | MFP_ADDR(DF_ALE_SM_WEn, 0x60), |
| 69 | MFP_ADDR(SM_SCLK, 0x64), |
| 70 | MFP_ADDR(DF_RDY0, 0x68), |
| 71 | MFP_ADDR(SM_BE0, 0x6c), |
| 72 | MFP_ADDR(SM_BE1, 0x70), |
| 73 | MFP_ADDR(SM_ADV, 0x74), |
| 74 | MFP_ADDR(DF_RDY1, 0x78), |
| 75 | MFP_ADDR(SM_ADVMUX, 0x7c), |
| 76 | MFP_ADDR(SM_RDY, 0x80), |
| 77 | |
| 78 | MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84), |
| 79 | |
| 80 | MFP_ADDR_END, |
| 81 | }; |
| 82 | |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 83 | void __init pxa910_init_irq(void) |
| 84 | { |
| 85 | icu_init_irq(); |
Haojian Zhuang | 0f102b6 | 2013-06-03 10:02:59 +0800 | [diff] [blame] | 86 | #ifdef CONFIG_PM |
| 87 | icu_irq_chip.irq_set_wake = pxa910_set_wake; |
| 88 | #endif |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 89 | } |
| 90 | |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 91 | static int __init pxa910_init(void) |
| 92 | { |
| 93 | if (cpu_is_pxa910()) { |
Haojian Zhuang | a03d8b1 | 2012-08-04 23:57:38 +0800 | [diff] [blame] | 94 | #ifdef CONFIG_CACHE_TAUROS2 |
| 95 | tauros2_init(0); |
| 96 | #endif |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 97 | mfp_init_base(MFPR_VIRT_BASE); |
| 98 | mfp_init_addr(pxa910_mfp_addr_map); |
| 99 | pxa_init_dma(IRQ_PXA910_DMA_INT0, 32); |
Chao Xie | 9e73d69 | 2012-08-27 10:54:01 +0800 | [diff] [blame] | 100 | pxa910_clk_init(); |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 101 | } |
| 102 | |
| 103 | return 0; |
| 104 | } |
| 105 | postcore_initcall(pxa910_init); |
| 106 | |
| 107 | /* system timer - clock enabled, 3.25MHz */ |
| 108 | #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) |
Chao Xie | 9e73d69 | 2012-08-27 10:54:01 +0800 | [diff] [blame] | 109 | #define APBC_TIMERS APBC_REG(0x34) |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 110 | |
Stephen Warren | 6bb27d7 | 2012-11-08 12:40:59 -0700 | [diff] [blame] | 111 | void __init pxa910_timer_init(void) |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 112 | { |
| 113 | /* reset and configure */ |
Chao Xie | 9e73d69 | 2012-08-27 10:54:01 +0800 | [diff] [blame] | 114 | __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); |
| 115 | __raw_writel(TIMER_CLK_RST, APBC_TIMERS); |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 116 | |
| 117 | timer_init(IRQ_PXA910_AP1_TIMER1); |
| 118 | } |
| 119 | |
Eric Miao | 14c6b5e | 2009-03-20 12:50:22 +0800 | [diff] [blame] | 120 | /* on-chip devices */ |
| 121 | |
| 122 | /* NOTE: there are totally 3 UARTs on PXA910: |
| 123 | * |
| 124 | * UART1 - Slow UART (can be used both by AP and CP) |
| 125 | * UART2/3 - Fast UART |
| 126 | * |
| 127 | * To be backward compatible with the legacy FFUART/BTUART/STUART sequence, |
| 128 | * they are re-ordered as: |
| 129 | * |
| 130 | * pxa910_device_uart1 - UART2 as FFUART |
| 131 | * pxa910_device_uart2 - UART3 as BTUART |
| 132 | * |
| 133 | * UART1 is not used by AP for the moment. |
| 134 | */ |
| 135 | PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22); |
| 136 | PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24); |
Eric Miao | 1a77920 | 2009-04-13 15:34:54 +0800 | [diff] [blame] | 137 | PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); |
| 138 | PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); |
Eric Miao | a27ba76 | 2009-04-13 18:29:52 +0800 | [diff] [blame] | 139 | PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10); |
| 140 | PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10); |
| 141 | PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); |
| 142 | PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); |
Haojian Zhuang | a0f266c | 2009-10-13 15:24:55 +0800 | [diff] [blame] | 143 | PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); |
Zhou Zhu | 333893c | 2013-02-21 16:42:20 -0800 | [diff] [blame] | 144 | PXA910_DEVICE(disp, "mmp-disp", 0, LCD, 0xd420b000, 0x1ec); |
| 145 | PXA910_DEVICE(fb, "mmp-fb", -1, NONE, 0, 0); |
| 146 | PXA910_DEVICE(panel, "tpo-hvga", -1, NONE, 0, 0); |
Haojian Zhuang | 157d264 | 2011-10-17 20:37:52 +0800 | [diff] [blame] | 147 | |
| 148 | struct resource pxa910_resource_gpio[] = { |
| 149 | { |
| 150 | .start = 0xd4019000, |
| 151 | .end = 0xd4019fff, |
| 152 | .flags = IORESOURCE_MEM, |
| 153 | }, { |
| 154 | .start = IRQ_PXA910_AP_GPIO, |
| 155 | .end = IRQ_PXA910_AP_GPIO, |
Haojian Zhuang | 93413c3 | 2012-02-27 10:37:02 +0800 | [diff] [blame] | 156 | .name = "gpio_mux", |
Haojian Zhuang | 157d264 | 2011-10-17 20:37:52 +0800 | [diff] [blame] | 157 | .flags = IORESOURCE_IRQ, |
| 158 | }, |
| 159 | }; |
| 160 | |
| 161 | struct platform_device pxa910_device_gpio = { |
Haojian Zhuang | 2cab029 | 2013-04-07 16:44:33 +0800 | [diff] [blame] | 162 | .name = "mmp-gpio", |
Haojian Zhuang | 157d264 | 2011-10-17 20:37:52 +0800 | [diff] [blame] | 163 | .id = -1, |
| 164 | .num_resources = ARRAY_SIZE(pxa910_resource_gpio), |
| 165 | .resource = pxa910_resource_gpio, |
| 166 | }; |
Haojian Zhuang | 4128e27 | 2012-02-23 23:37:33 +0800 | [diff] [blame] | 167 | |
| 168 | static struct resource pxa910_resource_rtc[] = { |
| 169 | { |
| 170 | .start = 0xd4010000, |
| 171 | .end = 0xd401003f, |
| 172 | .flags = IORESOURCE_MEM, |
| 173 | }, { |
| 174 | .start = IRQ_PXA910_RTC_INT, |
| 175 | .end = IRQ_PXA910_RTC_INT, |
| 176 | .name = "rtc 1Hz", |
| 177 | .flags = IORESOURCE_IRQ, |
| 178 | }, { |
| 179 | .start = IRQ_PXA910_RTC_ALARM, |
| 180 | .end = IRQ_PXA910_RTC_ALARM, |
| 181 | .name = "rtc alarm", |
| 182 | .flags = IORESOURCE_IRQ, |
| 183 | }, |
| 184 | }; |
| 185 | |
| 186 | struct platform_device pxa910_device_rtc = { |
| 187 | .name = "sa1100-rtc", |
| 188 | .id = -1, |
| 189 | .num_resources = ARRAY_SIZE(pxa910_resource_rtc), |
| 190 | .resource = pxa910_resource_rtc, |
| 191 | }; |