Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* $Id: system.h,v 1.86 2001/10/30 04:57:10 davem Exp $ */ |
| 2 | #include <linux/config.h> |
| 3 | |
| 4 | #ifndef __SPARC_SYSTEM_H |
| 5 | #define __SPARC_SYSTEM_H |
| 6 | |
| 7 | #include <linux/config.h> |
| 8 | #include <linux/kernel.h> |
| 9 | #include <linux/threads.h> /* NR_CPUS */ |
| 10 | #include <linux/thread_info.h> |
| 11 | |
| 12 | #include <asm/segment.h> |
| 13 | #include <asm/page.h> |
| 14 | #include <asm/psr.h> |
| 15 | #include <asm/ptrace.h> |
| 16 | #include <asm/btfixup.h> |
| 17 | |
| 18 | #ifndef __ASSEMBLY__ |
| 19 | |
| 20 | /* |
| 21 | * Sparc (general) CPU types |
| 22 | */ |
| 23 | enum sparc_cpu { |
| 24 | sun4 = 0x00, |
| 25 | sun4c = 0x01, |
| 26 | sun4m = 0x02, |
| 27 | sun4d = 0x03, |
| 28 | sun4e = 0x04, |
| 29 | sun4u = 0x05, /* V8 ploos ploos */ |
| 30 | sun_unknown = 0x06, |
| 31 | ap1000 = 0x07, /* almost a sun4m */ |
| 32 | }; |
| 33 | |
| 34 | /* Really, userland should not be looking at any of this... */ |
| 35 | #ifdef __KERNEL__ |
| 36 | |
| 37 | extern enum sparc_cpu sparc_cpu_model; |
| 38 | |
| 39 | #ifndef CONFIG_SUN4 |
| 40 | #define ARCH_SUN4C_SUN4 (sparc_cpu_model==sun4c) |
| 41 | #define ARCH_SUN4 0 |
| 42 | #else |
| 43 | #define ARCH_SUN4C_SUN4 1 |
| 44 | #define ARCH_SUN4 1 |
| 45 | #endif |
| 46 | |
| 47 | #define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */ |
| 48 | |
| 49 | extern struct thread_info *current_set[NR_CPUS]; |
| 50 | |
| 51 | extern unsigned long empty_bad_page; |
| 52 | extern unsigned long empty_bad_page_table; |
| 53 | extern unsigned long empty_zero_page; |
| 54 | |
| 55 | extern void sun_do_break(void); |
| 56 | extern int serial_console; |
| 57 | extern int stop_a_enabled; |
| 58 | |
| 59 | static __inline__ int con_is_present(void) |
| 60 | { |
| 61 | return serial_console ? 0 : 1; |
| 62 | } |
| 63 | |
| 64 | /* When a context switch happens we must flush all user windows so that |
| 65 | * the windows of the current process are flushed onto its stack. This |
| 66 | * way the windows are all clean for the next process and the stack |
| 67 | * frames are up to date. |
| 68 | */ |
| 69 | extern void flush_user_windows(void); |
| 70 | extern void kill_user_windows(void); |
| 71 | extern void synchronize_user_stack(void); |
| 72 | extern void fpsave(unsigned long *fpregs, unsigned long *fsr, |
| 73 | void *fpqueue, unsigned long *fpqdepth); |
| 74 | |
| 75 | #ifdef CONFIG_SMP |
| 76 | #define SWITCH_ENTER(prv) \ |
| 77 | do { \ |
| 78 | if (test_tsk_thread_flag(prv, TIF_USEDFPU)) { \ |
| 79 | put_psr(get_psr() | PSR_EF); \ |
| 80 | fpsave(&(prv)->thread.float_regs[0], &(prv)->thread.fsr, \ |
| 81 | &(prv)->thread.fpqueue[0], &(prv)->thread.fpqdepth); \ |
| 82 | clear_tsk_thread_flag(prv, TIF_USEDFPU); \ |
| 83 | (prv)->thread.kregs->psr &= ~PSR_EF; \ |
| 84 | } \ |
| 85 | } while(0) |
| 86 | |
| 87 | #define SWITCH_DO_LAZY_FPU(next) /* */ |
| 88 | #else |
| 89 | #define SWITCH_ENTER(prv) /* */ |
| 90 | #define SWITCH_DO_LAZY_FPU(nxt) \ |
| 91 | do { \ |
| 92 | if (last_task_used_math != (nxt)) \ |
| 93 | (nxt)->thread.kregs->psr&=~PSR_EF; \ |
| 94 | } while(0) |
| 95 | #endif |
| 96 | |
| 97 | /* |
| 98 | * Flush windows so that the VM switch which follows |
| 99 | * would not pull the stack from under us. |
| 100 | * |
| 101 | * SWITCH_ENTER and SWITH_DO_LAZY_FPU do not work yet (e.g. SMP does not work) |
| 102 | * XXX WTF is the above comment? Found in late teen 2.4.x. |
| 103 | */ |
Nick Piggin | 4866cde | 2005-06-25 14:57:23 -0700 | [diff] [blame^] | 104 | #define prepare_arch_switch(next) do { \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | __asm__ __volatile__( \ |
| 106 | ".globl\tflush_patch_switch\nflush_patch_switch:\n\t" \ |
| 107 | "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \ |
| 108 | "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \ |
| 109 | "save %sp, -0x40, %sp\n\t" \ |
| 110 | "restore; restore; restore; restore; restore; restore; restore"); \ |
| 111 | } while(0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | |
| 113 | /* Much care has gone into this code, do not touch it. |
| 114 | * |
| 115 | * We need to loadup regs l0/l1 for the newly forked child |
| 116 | * case because the trap return path relies on those registers |
| 117 | * holding certain values, gcc is told that they are clobbered. |
| 118 | * Gcc needs registers for 3 values in and 1 value out, so we |
| 119 | * clobber every non-fixed-usage register besides l2/l3/o4/o5. -DaveM |
| 120 | * |
| 121 | * Hey Dave, that do not touch sign is too much of an incentive |
| 122 | * - Anton & Pete |
| 123 | */ |
| 124 | #define switch_to(prev, next, last) do { \ |
| 125 | SWITCH_ENTER(prev); \ |
| 126 | SWITCH_DO_LAZY_FPU(next); \ |
| 127 | cpu_set(smp_processor_id(), next->active_mm->cpu_vm_mask); \ |
| 128 | __asm__ __volatile__( \ |
| 129 | "sethi %%hi(here - 0x8), %%o7\n\t" \ |
| 130 | "mov %%g6, %%g3\n\t" \ |
| 131 | "or %%o7, %%lo(here - 0x8), %%o7\n\t" \ |
| 132 | "rd %%psr, %%g4\n\t" \ |
| 133 | "std %%sp, [%%g6 + %4]\n\t" \ |
| 134 | "rd %%wim, %%g5\n\t" \ |
| 135 | "wr %%g4, 0x20, %%psr\n\t" \ |
| 136 | "nop\n\t" \ |
| 137 | "std %%g4, [%%g6 + %3]\n\t" \ |
| 138 | "ldd [%2 + %3], %%g4\n\t" \ |
| 139 | "mov %2, %%g6\n\t" \ |
| 140 | ".globl patchme_store_new_current\n" \ |
| 141 | "patchme_store_new_current:\n\t" \ |
| 142 | "st %2, [%1]\n\t" \ |
| 143 | "wr %%g4, 0x20, %%psr\n\t" \ |
| 144 | "nop\n\t" \ |
| 145 | "nop\n\t" \ |
| 146 | "nop\n\t" /* LEON needs all 3 nops: load to %sp depends on CWP. */ \ |
| 147 | "ldd [%%g6 + %4], %%sp\n\t" \ |
| 148 | "wr %%g5, 0x0, %%wim\n\t" \ |
| 149 | "ldd [%%sp + 0x00], %%l0\n\t" \ |
| 150 | "ldd [%%sp + 0x38], %%i6\n\t" \ |
| 151 | "wr %%g4, 0x0, %%psr\n\t" \ |
| 152 | "nop\n\t" \ |
| 153 | "nop\n\t" \ |
| 154 | "jmpl %%o7 + 0x8, %%g0\n\t" \ |
| 155 | " ld [%%g3 + %5], %0\n\t" \ |
| 156 | "here:\n" \ |
| 157 | : "=&r" (last) \ |
| 158 | : "r" (&(current_set[hard_smp_processor_id()])), \ |
| 159 | "r" ((next)->thread_info), \ |
| 160 | "i" (TI_KPSR), \ |
| 161 | "i" (TI_KSP), \ |
| 162 | "i" (TI_TASK) \ |
| 163 | : "g1", "g2", "g3", "g4", "g5", "g7", \ |
| 164 | "l0", "l1", "l3", "l4", "l5", "l6", "l7", \ |
| 165 | "i0", "i1", "i2", "i3", "i4", "i5", \ |
| 166 | "o0", "o1", "o2", "o3", "o7"); \ |
| 167 | } while(0) |
| 168 | |
| 169 | /* |
| 170 | * Changing the IRQ level on the Sparc. |
| 171 | */ |
| 172 | extern void local_irq_restore(unsigned long); |
| 173 | extern unsigned long __local_irq_save(void); |
| 174 | extern void local_irq_enable(void); |
| 175 | |
| 176 | static inline unsigned long getipl(void) |
| 177 | { |
| 178 | unsigned long retval; |
| 179 | |
| 180 | __asm__ __volatile__("rd %%psr, %0" : "=r" (retval)); |
| 181 | return retval; |
| 182 | } |
| 183 | |
| 184 | #define local_save_flags(flags) ((flags) = getipl()) |
| 185 | #define local_irq_save(flags) ((flags) = __local_irq_save()) |
| 186 | #define local_irq_disable() ((void) __local_irq_save()) |
| 187 | #define irqs_disabled() ((getipl() & PSR_PIL) != 0) |
| 188 | |
| 189 | /* XXX Change this if we ever use a PSO mode kernel. */ |
| 190 | #define mb() __asm__ __volatile__ ("" : : : "memory") |
| 191 | #define rmb() mb() |
| 192 | #define wmb() mb() |
| 193 | #define read_barrier_depends() do { } while(0) |
| 194 | #define set_mb(__var, __value) do { __var = __value; mb(); } while(0) |
| 195 | #define set_wmb(__var, __value) set_mb(__var, __value) |
| 196 | #define smp_mb() __asm__ __volatile__("":::"memory") |
| 197 | #define smp_rmb() __asm__ __volatile__("":::"memory") |
| 198 | #define smp_wmb() __asm__ __volatile__("":::"memory") |
| 199 | #define smp_read_barrier_depends() do { } while(0) |
| 200 | |
| 201 | #define nop() __asm__ __volatile__ ("nop") |
| 202 | |
| 203 | /* This has special calling conventions */ |
| 204 | #ifndef CONFIG_SMP |
| 205 | BTFIXUPDEF_CALL(void, ___xchg32, void) |
| 206 | #endif |
| 207 | |
| 208 | extern __inline__ unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val) |
| 209 | { |
| 210 | #ifdef CONFIG_SMP |
| 211 | __asm__ __volatile__("swap [%2], %0" |
| 212 | : "=&r" (val) |
| 213 | : "0" (val), "r" (m) |
| 214 | : "memory"); |
| 215 | return val; |
| 216 | #else |
| 217 | register unsigned long *ptr asm("g1"); |
| 218 | register unsigned long ret asm("g2"); |
| 219 | |
| 220 | ptr = (unsigned long *) m; |
| 221 | ret = val; |
| 222 | |
| 223 | /* Note: this is magic and the nop there is |
| 224 | really needed. */ |
| 225 | __asm__ __volatile__( |
| 226 | "mov %%o7, %%g4\n\t" |
| 227 | "call ___f____xchg32\n\t" |
| 228 | " nop\n\t" |
| 229 | : "=&r" (ret) |
| 230 | : "0" (ret), "r" (ptr) |
| 231 | : "g3", "g4", "g7", "memory", "cc"); |
| 232 | |
| 233 | return ret; |
| 234 | #endif |
| 235 | } |
| 236 | |
| 237 | #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) |
| 238 | #define tas(ptr) (xchg((ptr),1)) |
| 239 | |
| 240 | extern void __xchg_called_with_bad_pointer(void); |
| 241 | |
| 242 | static __inline__ unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size) |
| 243 | { |
| 244 | switch (size) { |
| 245 | case 4: |
| 246 | return xchg_u32(ptr, x); |
| 247 | }; |
| 248 | __xchg_called_with_bad_pointer(); |
| 249 | return x; |
| 250 | } |
| 251 | |
| 252 | extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn)); |
| 253 | |
| 254 | #endif /* __KERNEL__ */ |
| 255 | |
| 256 | #endif /* __ASSEMBLY__ */ |
| 257 | |
| 258 | #define arch_align_stack(x) (x) |
| 259 | |
| 260 | #endif /* !(__SPARC_SYSTEM_H) */ |