| Tero Kristo | ee20011 | 2014-02-25 09:21:39 +0200 | [diff] [blame] | 1 | OMAP PRCM bindings |
| 2 | |
| 3 | Power Reset and Clock Manager lists the device clocks and clockdomains under |
| 4 | a DT hierarchy. Each TI SoC can have multiple PRCM entities listed for it, |
| 5 | each describing one module and the clock hierarchy under it. see [1] for |
| 6 | documentation about the individual clock/clockdomain nodes. |
| 7 | |
| 8 | [1] Documentation/devicetree/bindings/clock/ti/* |
| 9 | |
| 10 | Required properties: |
| 11 | - compatible: Must be one of: |
| 12 | "ti,am3-prcm" |
| Tero Kristo | ee20011 | 2014-02-25 09:21:39 +0200 | [diff] [blame] | 13 | "ti,am4-prcm" |
| Tero Kristo | ee20011 | 2014-02-25 09:21:39 +0200 | [diff] [blame] | 14 | "ti,omap2-prcm" |
| Tero Kristo | ee20011 | 2014-02-25 09:21:39 +0200 | [diff] [blame] | 15 | "ti,omap3-prm" |
| 16 | "ti,omap3-cm" |
| Tero Kristo | ee20011 | 2014-02-25 09:21:39 +0200 | [diff] [blame] | 17 | "ti,omap4-cm1" |
| 18 | "ti,omap4-prm" |
| 19 | "ti,omap4-cm2" |
| 20 | "ti,omap4-scrm" |
| 21 | "ti,omap5-prm" |
| 22 | "ti,omap5-cm-core-aon" |
| 23 | "ti,omap5-scrm" |
| 24 | "ti,omap5-cm-core" |
| 25 | "ti,dra7-prm" |
| 26 | "ti,dra7-cm-core-aon" |
| 27 | "ti,dra7-cm-core" |
| Tero Kristo | e8e8f7e | 2015-02-25 15:09:21 +0200 | [diff] [blame] | 28 | "ti,dm814-prcm" |
| Tero Kristo | e8e8f7e | 2015-02-25 15:09:21 +0200 | [diff] [blame] | 29 | "ti,dm816-prcm" |
| Tero Kristo | ee20011 | 2014-02-25 09:21:39 +0200 | [diff] [blame] | 30 | - reg: Contains PRCM module register address range |
| 31 | (base address and length) |
| 32 | - clocks: clocks for this module |
| 33 | - clockdomains: clockdomains for this module |
| 34 | |
| 35 | Example: |
| 36 | |
| 37 | cm: cm@48004000 { |
| 38 | compatible = "ti,omap3-cm"; |
| 39 | reg = <0x48004000 0x4000>; |
| 40 | |
| 41 | cm_clocks: clocks { |
| 42 | #address-cells = <1>; |
| 43 | #size-cells = <0>; |
| 44 | }; |
| 45 | |
| 46 | cm_clockdomains: clockdomains { |
| 47 | }; |
| 48 | } |
| 49 | |
| 50 | &cm_clocks { |
| 51 | omap2_32k_fck: omap_32k_fck { |
| 52 | #clock-cells = <0>; |
| 53 | compatible = "fixed-clock"; |
| 54 | clock-frequency = <32768>; |
| 55 | }; |
| 56 | }; |
| 57 | |
| 58 | &cm_clockdomains { |
| 59 | core_l3_clkdm: core_l3_clkdm { |
| 60 | compatible = "ti,clockdomain"; |
| 61 | clocks = <&sdrc_ick>; |
| 62 | }; |
| 63 | }; |