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Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -07001/*
2 * Copyright (c) 2006, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Copyright (C) Ashok Raj <ashok.raj@intel.com>
18 * Copyright (C) Shaohua Li <shaohua.li@intel.com>
19 */
20
21#ifndef __DMAR_H__
22#define __DMAR_H__
23
24#include <linux/acpi.h>
25#include <linux/types.h>
Keshavamurthy, Anil Sba395922007-10-21 16:41:49 -070026#include <linux/msi.h>
Suresh Siddha1531a6a2009-03-16 17:04:57 -070027#include <linux/irqreturn.h>
Jiang Liu3a5670e2014-02-19 14:07:33 +080028#include <linux/rwsem.h>
Jiang Liu0e242612014-02-19 14:07:34 +080029#include <linux/rcupdate.h>
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -070030
Andrew Morton6eea69d2011-10-31 17:06:29 -070031struct acpi_dmar_header;
32
Suresh Siddha41750d32011-08-23 17:05:18 -070033/* DMAR Flags */
34#define DMAR_INTR_REMAP 0x1
35#define DMAR_X2APIC_OPT_OUT 0x2
36
Keshavamurthy, Anil Sba395922007-10-21 16:41:49 -070037struct intel_iommu;
Jiang Liu694835d2014-01-06 14:18:16 +080038
David Woodhouse832bd852014-03-07 15:08:36 +000039struct dmar_dev_scope {
40 struct device __rcu *dev;
41 u8 bus;
42 u8 devfn;
43};
44
Suresh Siddhad3f13812011-08-23 17:05:25 -070045#ifdef CONFIG_DMAR_TABLE
Suresh Siddha41750d32011-08-23 17:05:18 -070046extern struct acpi_table_header *dmar_tbl;
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -070047struct dmar_drhd_unit {
48 struct list_head list; /* list of drhd units */
Suresh Siddha1886e8a2008-07-10 11:16:37 -070049 struct acpi_dmar_header *hdr; /* ACPI header */
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -070050 u64 reg_base_addr; /* register base address*/
David Woodhouse832bd852014-03-07 15:08:36 +000051 struct dmar_dev_scope *devices;/* target device array */
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -070052 int devices_cnt; /* target device count */
David Woodhouse276dbf992009-04-04 01:45:37 +010053 u16 segment; /* PCI domain */
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -070054 u8 ignored:1; /* ignore drhd */
55 u8 include_all:1;
56 struct intel_iommu *iommu;
57};
58
Jiang Liu59ce0512014-02-19 14:07:35 +080059struct dmar_pci_notify_info {
60 struct pci_dev *dev;
61 unsigned long event;
62 int bus;
63 u16 seg;
64 u16 level;
65 struct acpi_dmar_pci_path path[];
66} __attribute__((packed));
67
Jiang Liu3a5670e2014-02-19 14:07:33 +080068extern struct rw_semaphore dmar_global_lock;
Suresh Siddha2ae21012008-07-10 11:16:43 -070069extern struct list_head dmar_drhd_units;
70
71#define for_each_drhd_unit(drhd) \
Jiang Liu0e242612014-02-19 14:07:34 +080072 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list)
Suresh Siddha2ae21012008-07-10 11:16:43 -070073
Jiang Liu7c919772014-01-06 14:18:18 +080074#define for_each_active_drhd_unit(drhd) \
Jiang Liu0e242612014-02-19 14:07:34 +080075 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
Jiang Liu7c919772014-01-06 14:18:18 +080076 if (drhd->ignored) {} else
77
David Woodhouse8f912ba2009-04-03 15:19:32 +010078#define for_each_active_iommu(i, drhd) \
Jiang Liu0e242612014-02-19 14:07:34 +080079 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
David Woodhouse8f912ba2009-04-03 15:19:32 +010080 if (i=drhd->iommu, drhd->ignored) {} else
81
82#define for_each_iommu(i, drhd) \
Jiang Liu0e242612014-02-19 14:07:34 +080083 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
David Woodhouse8f912ba2009-04-03 15:19:32 +010084 if (i=drhd->iommu, 0) {} else
85
Jiang Liu0e242612014-02-19 14:07:34 +080086static inline bool dmar_rcu_check(void)
87{
88 return rwsem_is_locked(&dmar_global_lock) ||
89 system_state == SYSTEM_BOOTING;
90}
91
92#define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check())
93
Jiang Liub683b232014-02-19 14:07:32 +080094#define for_each_dev_scope(a, c, p, d) \
David Woodhouse832bd852014-03-07 15:08:36 +000095 for ((p) = 0; ((d) = (p) < (c) ? dmar_rcu_dereference((a)[(p)].dev) : \
Jiang Liu0e242612014-02-19 14:07:34 +080096 NULL, (p) < (c)); (p)++)
Jiang Liub683b232014-02-19 14:07:32 +080097
98#define for_each_active_dev_scope(a, c, p, d) \
99 for_each_dev_scope((a), (c), (p), (d)) if (!(d)) { continue; } else
100
Suresh Siddha2ae21012008-07-10 11:16:43 -0700101extern int dmar_table_init(void);
Suresh Siddha2ae21012008-07-10 11:16:43 -0700102extern int dmar_dev_scope_init(void);
Jiang Liuada4d4b2014-01-06 14:18:09 +0800103extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
David Woodhouse832bd852014-03-07 15:08:36 +0000104 struct dmar_dev_scope **devices, u16 segment);
Jiang Liubb3a6b72014-02-19 14:07:24 +0800105extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt);
David Woodhouse832bd852014-03-07 15:08:36 +0000106extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt);
Jiang Liu59ce0512014-02-19 14:07:35 +0800107extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
108 void *start, void*end, u16 segment,
David Woodhouse832bd852014-03-07 15:08:36 +0000109 struct dmar_dev_scope *devices,
Jiang Liu59ce0512014-02-19 14:07:35 +0800110 int devices_cnt);
111extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info,
David Woodhouse832bd852014-03-07 15:08:36 +0000112 u16 segment, struct dmar_dev_scope *devices,
Jiang Liu59ce0512014-02-19 14:07:35 +0800113 int count);
Suresh Siddha2ae21012008-07-10 11:16:43 -0700114/* Intel IOMMU detection */
Konrad Rzeszutek Wilk480125b2010-08-26 13:57:57 -0400115extern int detect_intel_iommu(void);
Suresh Siddha9d783ba2009-03-16 17:04:55 -0700116extern int enable_drhd_fault_handling(void);
Suresh Siddha2ae21012008-07-10 11:16:43 -0700117
Jiang Liu8594d832014-07-11 14:19:32 +0800118#ifdef CONFIG_INTEL_IOMMU
119extern int iommu_detected, no_iommu;
120extern int intel_iommu_init(void);
121extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header);
122extern int dmar_parse_one_atsr(struct acpi_dmar_header *header);
123extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
124#else /* !CONFIG_INTEL_IOMMU: */
125static inline int intel_iommu_init(void) { return -ENODEV; }
126static inline int dmar_parse_one_rmrr(struct acpi_dmar_header *header)
Suresh Siddha2ae21012008-07-10 11:16:43 -0700127{
Jiang Liu8594d832014-07-11 14:19:32 +0800128 return 0;
Suresh Siddha2ae21012008-07-10 11:16:43 -0700129}
Jiang Liu8594d832014-07-11 14:19:32 +0800130static inline int dmar_parse_one_atsr(struct acpi_dmar_header *header)
Suresh Siddha29b61be2009-03-16 17:05:02 -0700131{
Jiang Liu8594d832014-07-11 14:19:32 +0800132 return 0;
Suresh Siddha29b61be2009-03-16 17:05:02 -0700133}
Jiang Liu8594d832014-07-11 14:19:32 +0800134static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
135{
136 return 0;
137}
138#endif /* CONFIG_INTEL_IOMMU */
139
140#endif /* CONFIG_DMAR_TABLE */
Suresh Siddha2ae21012008-07-10 11:16:43 -0700141
Suresh Siddha2ae21012008-07-10 11:16:43 -0700142struct irte {
143 union {
144 struct {
145 __u64 present : 1,
146 fpd : 1,
147 dst_mode : 1,
148 redir_hint : 1,
149 trigger_mode : 1,
150 dlvry_mode : 3,
151 avail : 4,
152 __reserved_1 : 4,
153 vector : 8,
154 __reserved_2 : 8,
155 dest_id : 32;
156 };
157 __u64 low;
158 };
159
160 union {
161 struct {
162 __u64 sid : 16,
163 sq : 2,
164 svt : 2,
165 __reserved_3 : 44;
166 };
167 __u64 high;
168 };
169};
Thomas Gleixner423f0852010-10-10 11:39:09 +0200170
Suresh Siddha41750d32011-08-23 17:05:18 -0700171enum {
172 IRQ_REMAP_XAPIC_MODE,
173 IRQ_REMAP_X2APIC_MODE,
174};
175
Suresh Siddha2ae21012008-07-10 11:16:43 -0700176/* Can't use the common MSI interrupt functions
177 * since DMAR is not a pci device
178 */
Thomas Gleixner5c2837f2010-09-28 17:15:11 +0200179struct irq_data;
180extern void dmar_msi_unmask(struct irq_data *data);
181extern void dmar_msi_mask(struct irq_data *data);
Suresh Siddha2ae21012008-07-10 11:16:43 -0700182extern void dmar_msi_read(int irq, struct msi_msg *msg);
183extern void dmar_msi_write(int irq, struct msi_msg *msg);
184extern int dmar_set_interrupt(struct intel_iommu *iommu);
Suresh Siddha1531a6a2009-03-16 17:04:57 -0700185extern irqreturn_t dmar_fault(int irq, void *dev_id);
Suresh Siddha2ae21012008-07-10 11:16:43 -0700186extern int arch_setup_dmar_msi(unsigned int irq);
187
Keshavamurthy, Anil S10e52472007-10-21 16:41:41 -0700188#endif /* __DMAR_H__ */