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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * arch/arm/mach-ixp4xx/ixdp425-setup.c
3 *
Krzysztof Hałasa9bf4d672009-11-16 15:24:41 +01004 * IXDP425/IXCDP1100 board-setup
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 *
6 * Copyright (C) 2003-2005 MontaVista Software, Inc.
7 *
8 * Author: Deepak Saxena <dsaxena@plexity.net>
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/device.h>
14#include <linux/serial.h>
15#include <linux/tty.h>
16#include <linux/serial_8250.h>
Michael-Luke Jones5a4a2382008-01-27 18:14:46 +010017#include <linux/i2c-gpio.h>
Vladimir Barinov4ad48b42007-05-16 20:39:02 +010018#include <linux/io.h>
19#include <linux/mtd/mtd.h>
20#include <linux/mtd/nand.h>
21#include <linux/mtd/partitions.h>
Russell King8029db12008-09-06 12:11:37 +010022#include <linux/delay.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#include <asm/types.h>
24#include <asm/setup.h>
25#include <asm/memory.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010026#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <asm/mach-types.h>
28#include <asm/irq.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/flash.h>
31
Krzysztof Hałasa9bf4d672009-11-16 15:24:41 +010032#define IXDP425_SDA_PIN 7
33#define IXDP425_SCL_PIN 6
34
35/* NAND Flash pins */
36#define IXDP425_NAND_NCE_PIN 12
37
38#define IXDP425_NAND_CMD_BYTE 0x01
39#define IXDP425_NAND_ADDR_BYTE 0x02
40
Linus Torvalds1da177e2005-04-16 15:20:36 -070041static struct flash_platform_data ixdp425_flash_data = {
42 .map_name = "cfi_probe",
43 .width = 2,
44};
45
46static struct resource ixdp425_flash_resource = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070047 .flags = IORESOURCE_MEM,
48};
49
50static struct platform_device ixdp425_flash = {
51 .name = "IXP4XX-Flash",
52 .id = 0,
53 .dev = {
54 .platform_data = &ixdp425_flash_data,
55 },
56 .num_resources = 1,
57 .resource = &ixdp425_flash_resource,
58};
59
Vladimir Barinov4ad48b42007-05-16 20:39:02 +010060#if defined(CONFIG_MTD_NAND_PLATFORM) || \
61 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
62
Vladimir Barinov4ad48b42007-05-16 20:39:02 +010063const char *part_probes[] = { "cmdlinepart", NULL };
64
65static struct mtd_partition ixdp425_partitions[] = {
66 {
67 .name = "ixp400 NAND FS 0",
68 .offset = 0,
69 .size = SZ_8M
70 }, {
71 .name = "ixp400 NAND FS 1",
72 .offset = MTDPART_OFS_APPEND,
73 .size = MTDPART_SIZ_FULL
74 },
75};
Vladimir Barinov4ad48b42007-05-16 20:39:02 +010076
77static void
78ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
79{
80 struct nand_chip *this = mtd->priv;
81 int offset = (int)this->priv;
82
83 if (ctrl & NAND_CTRL_CHANGE) {
84 if (ctrl & NAND_NCE) {
85 gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_LOW);
86 udelay(5);
87 } else
88 gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_HIGH);
89
90 offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
91 offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
92 this->priv = (void *)offset;
93 }
94
95 if (cmd != NAND_CMD_NONE)
96 writeb(cmd, this->IO_ADDR_W + offset);
97}
98
99static struct platform_nand_data ixdp425_flash_nand_data = {
100 .chip = {
Marek Vasutef077172010-08-12 02:14:54 +0100101 .nr_chips = 1,
Vladimir Barinov4ad48b42007-05-16 20:39:02 +0100102 .chip_delay = 30,
103 .options = NAND_NO_AUTOINCR,
Vladimir Barinov4ad48b42007-05-16 20:39:02 +0100104 .part_probe_types = part_probes,
105 .partitions = ixdp425_partitions,
106 .nr_partitions = ARRAY_SIZE(ixdp425_partitions),
Vladimir Barinov4ad48b42007-05-16 20:39:02 +0100107 },
108 .ctrl = {
109 .cmd_ctrl = ixdp425_flash_nand_cmd_ctrl
110 }
111};
112
113static struct resource ixdp425_flash_nand_resource = {
114 .flags = IORESOURCE_MEM,
115};
116
117static struct platform_device ixdp425_flash_nand = {
118 .name = "gen_nand",
119 .id = -1,
120 .dev = {
121 .platform_data = &ixdp425_flash_nand_data,
122 },
123 .num_resources = 1,
124 .resource = &ixdp425_flash_nand_resource,
125};
126#endif /* CONFIG_MTD_NAND_PLATFORM */
127
Michael-Luke Jones5a4a2382008-01-27 18:14:46 +0100128static struct i2c_gpio_platform_data ixdp425_i2c_gpio_data = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129 .sda_pin = IXDP425_SDA_PIN,
130 .scl_pin = IXDP425_SCL_PIN,
131};
132
Michael-Luke Jones5a4a2382008-01-27 18:14:46 +0100133static struct platform_device ixdp425_i2c_gpio = {
134 .name = "i2c-gpio",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135 .id = 0,
Michael-Luke Jones5a4a2382008-01-27 18:14:46 +0100136 .dev = {
137 .platform_data = &ixdp425_i2c_gpio_data,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139};
140
141static struct resource ixdp425_uart_resources[] = {
142 {
143 .start = IXP4XX_UART1_BASE_PHYS,
144 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
145 .flags = IORESOURCE_MEM
146 },
147 {
148 .start = IXP4XX_UART2_BASE_PHYS,
149 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
150 .flags = IORESOURCE_MEM
151 }
152};
153
154static struct plat_serial8250_port ixdp425_uart_data[] = {
155 {
156 .mapbase = IXP4XX_UART1_BASE_PHYS,
157 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
158 .irq = IRQ_IXP4XX_UART1,
Deepak Saxena8c741ed2005-08-03 19:58:21 +0100159 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160 .iotype = UPIO_MEM,
161 .regshift = 2,
162 .uartclk = IXP4XX_UART_XTAL,
163 },
164 {
165 .mapbase = IXP4XX_UART2_BASE_PHYS,
166 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Jeff Hansena35d6c92005-12-01 15:50:35 +0000167 .irq = IRQ_IXP4XX_UART2,
Deepak Saxena8c741ed2005-08-03 19:58:21 +0100168 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 .iotype = UPIO_MEM,
170 .regshift = 2,
171 .uartclk = IXP4XX_UART_XTAL,
Stefan Sorensenbcaafbe2005-07-06 23:06:04 +0100172 },
173 { },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174};
175
176static struct platform_device ixdp425_uart = {
177 .name = "serial8250",
Russell King6df29de2005-09-08 16:04:41 +0100178 .id = PLAT8250_DEV_PLATFORM,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 .dev.platform_data = ixdp425_uart_data,
180 .num_resources = 2,
181 .resource = ixdp425_uart_resources
182};
183
Rod Whitby78225912008-01-31 12:44:03 +0100184/* Built-in 10/100 Ethernet MAC interfaces */
185static struct eth_plat_info ixdp425_plat_eth[] = {
186 {
187 .phy = 0,
188 .rxq = 3,
189 .txreadyq = 20,
190 }, {
191 .phy = 1,
192 .rxq = 4,
193 .txreadyq = 21,
194 }
195};
196
197static struct platform_device ixdp425_eth[] = {
198 {
199 .name = "ixp4xx_eth",
200 .id = IXP4XX_ETH_NPEB,
201 .dev.platform_data = ixdp425_plat_eth,
202 }, {
203 .name = "ixp4xx_eth",
204 .id = IXP4XX_ETH_NPEC,
205 .dev.platform_data = ixdp425_plat_eth + 1,
206 }
207};
208
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209static struct platform_device *ixdp425_devices[] __initdata = {
Michael-Luke Jones5a4a2382008-01-27 18:14:46 +0100210 &ixdp425_i2c_gpio,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211 &ixdp425_flash,
Vladimir Barinov4ad48b42007-05-16 20:39:02 +0100212#if defined(CONFIG_MTD_NAND_PLATFORM) || \
213 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
214 &ixdp425_flash_nand,
215#endif
Rod Whitby78225912008-01-31 12:44:03 +0100216 &ixdp425_uart,
217 &ixdp425_eth[0],
218 &ixdp425_eth[1],
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219};
220
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221static void __init ixdp425_init(void)
222{
223 ixp4xx_sys_init();
224
Deepak Saxena54e269e2006-01-05 20:59:29 +0000225 ixdp425_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
226 ixdp425_flash_resource.end =
227 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228
Vladimir Barinov4ad48b42007-05-16 20:39:02 +0100229#if defined(CONFIG_MTD_NAND_PLATFORM) || \
230 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
231 ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3),
232 ixdp425_flash_nand_resource.end = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1;
233
234 gpio_line_config(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_OUT);
235
236 /* Configure expansion bus for NAND Flash */
237 *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
238 IXP4XX_EXP_BUS_STROBE_T(1) | /* extend by 1 clock */
239 IXP4XX_EXP_BUS_CYCLES(0) | /* Intel cycles */
240 IXP4XX_EXP_BUS_SIZE(0) | /* 512bytes addr space*/
241 IXP4XX_EXP_BUS_WR_EN |
242 IXP4XX_EXP_BUS_BYTE_EN; /* 8 bit data bus */
243#endif
244
Ruslan V. Sushko45fba082007-04-06 15:00:31 +0100245 if (cpu_is_ixp43x()) {
246 ixdp425_uart.num_resources = 1;
247 ixdp425_uart_data[1].flags = 0;
248 }
249
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250 platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
251}
252
Deepak Saxenab38708f2005-09-28 18:07:01 -0700253#ifdef CONFIG_ARCH_IXDP425
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
Russell Kinge9dea0c2005-07-03 17:38:58 +0100255 /* Maintainer: MontaVista Software, Inc. */
Deepak Saxenae605ecd2005-08-29 22:46:29 +0100256 .map_io = ixp4xx_map_io,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100257 .init_irq = ixp4xx_init_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258 .timer = &ixp4xx_timer,
Nicolas Pitree022c722011-07-05 22:38:13 -0400259 .atag_offset = 0x100,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100260 .init_machine = ixdp425_init,
Nicolas Pitre7553ee72011-07-05 22:28:09 -0400261#if defined(CONFIG_PCI)
262 .dma_zone_size = SZ_64M,
263#endif
Russell Kingd1b860f2011-11-05 12:10:55 +0000264 .restart = ixp4xx_restart,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265MACHINE_END
Deepak Saxenae0a20082005-09-18 21:11:56 +0100266#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267
Deepak Saxenae0a20082005-09-18 21:11:56 +0100268#ifdef CONFIG_MACH_IXDP465
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
Russell Kinge9dea0c2005-07-03 17:38:58 +0100270 /* Maintainer: MontaVista Software, Inc. */
Deepak Saxenae605ecd2005-08-29 22:46:29 +0100271 .map_io = ixp4xx_map_io,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100272 .init_irq = ixp4xx_init_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273 .timer = &ixp4xx_timer,
Nicolas Pitree022c722011-07-05 22:38:13 -0400274 .atag_offset = 0x100,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100275 .init_machine = ixdp425_init,
Nicolas Pitre7553ee72011-07-05 22:28:09 -0400276#if defined(CONFIG_PCI)
277 .dma_zone_size = SZ_64M,
278#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700279MACHINE_END
Deepak Saxenae0a20082005-09-18 21:11:56 +0100280#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281
Deepak Saxenae0a20082005-09-18 21:11:56 +0100282#ifdef CONFIG_ARCH_PRPMC1100
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
Russell Kinge9dea0c2005-07-03 17:38:58 +0100284 /* Maintainer: MontaVista Software, Inc. */
Deepak Saxenae605ecd2005-08-29 22:46:29 +0100285 .map_io = ixp4xx_map_io,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100286 .init_irq = ixp4xx_init_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287 .timer = &ixp4xx_timer,
Nicolas Pitree022c722011-07-05 22:38:13 -0400288 .atag_offset = 0x100,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100289 .init_machine = ixdp425_init,
Nicolas Pitre7553ee72011-07-05 22:28:09 -0400290#if defined(CONFIG_PCI)
291 .dma_zone_size = SZ_64M,
292#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700293MACHINE_END
Deepak Saxenae0a20082005-09-18 21:11:56 +0100294#endif
Ruslan V. Sushko45fba082007-04-06 15:00:31 +0100295
296#ifdef CONFIG_MACH_KIXRP435
297MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
298 /* Maintainer: MontaVista Software, Inc. */
Ruslan V. Sushko45fba082007-04-06 15:00:31 +0100299 .map_io = ixp4xx_map_io,
300 .init_irq = ixp4xx_init_irq,
301 .timer = &ixp4xx_timer,
Nicolas Pitree022c722011-07-05 22:38:13 -0400302 .atag_offset = 0x100,
Ruslan V. Sushko45fba082007-04-06 15:00:31 +0100303 .init_machine = ixdp425_init,
Nicolas Pitre7553ee72011-07-05 22:28:09 -0400304#if defined(CONFIG_PCI)
305 .dma_zone_size = SZ_64M,
306#endif
Ruslan V. Sushko45fba082007-04-06 15:00:31 +0100307MACHINE_END
308#endif