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Santosh Shilimkar367cd312009-04-28 20:51:52 +05301/*
2 * Secondary CPU startup routine source file.
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc.
5 *
6 * Author:
7 * Santosh Shilimkar <santosh.shilimkar@ti.com>
8 *
9 * Interface functions needed for the SMP. This file is based on arm
10 * realview smp platform.
11 * Copyright (c) 2003 ARM Limited.
12 *
13 * This program is free software,you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18#include <linux/linkage.h>
19#include <linux/init.h>
20
Santosh Shilimkar367cd312009-04-28 20:51:52 +053021/*
22 * OMAP4 specific entry point for secondary CPU to jump from ROM
23 * code. This routine also provides a holding flag into which
24 * secondary core is held until we're ready for it to initialise.
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080025 * The primary core will update this flag using a hardware
26 * register AuxCoreBoot0.
Santosh Shilimkar367cd312009-04-28 20:51:52 +053027 */
28ENTRY(omap_secondary_startup)
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080029hold: ldr r12,=0x103
30 dsb
Richard Woodruffdf571c4a2010-04-07 07:47:21 +000031 smc #0 @ read from AuxCoreBoot0
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080032 mov r0, r0, lsr #9
33 mrc p15, 0, r4, c0, c0, 5
34 and r4, r4, #0x0f
35 cmp r0, r4
Santosh Shilimkar367cd312009-04-28 20:51:52 +053036 bne hold
37
38 /*
Santosh Shilimkar942e2c92009-12-11 16:16:35 -080039 * we've been released from the wait loop,secondary_stack
Santosh Shilimkar367cd312009-04-28 20:51:52 +053040 * should now contain the SVC stack for this core
41 */
42 b secondary_startup
Dave Martinf96bdfa2011-03-04 15:33:54 +000043ENDPROC(omap_secondary_startup)
Santosh Shilimkar367cd312009-04-28 20:51:52 +053044