blob: 91553432711d0eb079110512f9246feafa7a2a4b [file] [log] [blame]
Andrew Lunnb2f427a2011-05-15 13:32:52 +02001/*
2 * arch/arm/plat-orion/mpp.c
3 *
4 * MPP functions for Marvell orion SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/mbus.h>
14#include <linux/io.h>
15#include <linux/gpio.h>
16#include <mach/hardware.h>
17#include <plat/mpp.h>
18
19/* Address of the ith MPP control register */
20static __init unsigned long mpp_ctrl_addr(unsigned int i,
21 unsigned long dev_bus)
22{
23 return dev_bus + (i) * 4;
24}
25
26
27void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask,
28 unsigned int mpp_max, unsigned int dev_bus)
29{
30 unsigned int mpp_nr_regs = (1 + mpp_max/8);
31 u32 mpp_ctrl[mpp_nr_regs];
32 int i;
33
Andrew Lunnb2f427a2011-05-15 13:32:52 +020034 printk(KERN_DEBUG "initial MPP regs:");
35 for (i = 0; i < mpp_nr_regs; i++) {
36 mpp_ctrl[i] = readl(mpp_ctrl_addr(i, dev_bus));
37 printk(" %08x", mpp_ctrl[i]);
38 }
39 printk("\n");
40
41 for ( ; *mpp_list; mpp_list++) {
42 unsigned int num = MPP_NUM(*mpp_list);
43 unsigned int sel = MPP_SEL(*mpp_list);
44 int shift, gpio_mode;
45
46 if (num > mpp_max) {
47 printk(KERN_ERR "orion_mpp_conf: invalid MPP "
48 "number (%u)\n", num);
49 continue;
50 }
Andrew Lunn3cff4842011-05-15 13:32:54 +020051 if (variant_mask & !(*mpp_list & variant_mask)) {
Andrew Lunnb2f427a2011-05-15 13:32:52 +020052 printk(KERN_WARNING
53 "orion_mpp_conf: requested MPP%u config "
54 "unavailable on this hardware\n", num);
55 continue;
56 }
57
58 shift = (num & 7) << 2;
59 mpp_ctrl[num / 8] &= ~(0xf << shift);
60 mpp_ctrl[num / 8] |= sel << shift;
61
62 gpio_mode = 0;
63 if (*mpp_list & MPP_INPUT_MASK)
64 gpio_mode |= GPIO_INPUT_OK;
65 if (*mpp_list & MPP_OUTPUT_MASK)
66 gpio_mode |= GPIO_OUTPUT_OK;
67 if (sel != 0)
68 gpio_mode = 0;
69 orion_gpio_set_valid(num, gpio_mode);
70 }
71
72 printk(KERN_DEBUG " final MPP regs:");
73 for (i = 0; i < mpp_nr_regs; i++) {
74 writel(mpp_ctrl[i], mpp_ctrl_addr(i, dev_bus));
75 printk(" %08x", mpp_ctrl[i]);
76 }
77 printk("\n");
78}