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gerrit-public.fairphone.software / kernel / msm-4.9 / 8f1e938db9230d9f828420adea96f691c722e473 / . / arch / arm / mach-s5pv210 / pm.c
blob: f149d278377b8f28f29a53f55ba303e450bd6a55 [file] [log] [blame]
Jongpill Leeea31fd42010-10-02 19:13:42 +0900[diff] [blame]1/* linux/arch/arm/mach-s5pv210/pm.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5PV210 - Power Management support
7 *
8 * Based on arch/arm/mach-s3c2410/pm.c
9 * Copyright (c) 2006 Simtec Electronics
10 * Ben Dooks <ben@simtec.co.uk>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17#include <linux/init.h>
18#include <linux/suspend.h>
Rafael J. Wysockibb072c32011-04-22 22:03:21 +0200[diff] [blame]19#include <linux/syscore_ops.h>
Jongpill Leeea31fd42010-10-02 19:13:42 +0900[diff] [blame]20#include <linux/io.h>
21
22#include <plat/cpu.h>
23#include <plat/pm.h>
24#include <plat/regs-timer.h>
25
26#include <mach/regs-irq.h>
27#include <mach/regs-clock.h>
28
29static struct sleep_save s5pv210_core_save[] = {
30 /* Clock source */
31 SAVE_ITEM(S5P_CLK_SRC0),
32 SAVE_ITEM(S5P_CLK_SRC1),
33 SAVE_ITEM(S5P_CLK_SRC2),
34 SAVE_ITEM(S5P_CLK_SRC3),
35 SAVE_ITEM(S5P_CLK_SRC4),
36 SAVE_ITEM(S5P_CLK_SRC5),
37 SAVE_ITEM(S5P_CLK_SRC6),
38
39 /* Clock source Mask */
40 SAVE_ITEM(S5P_CLK_SRC_MASK0),
41 SAVE_ITEM(S5P_CLK_SRC_MASK1),
42
43 /* Clock Divider */
44 SAVE_ITEM(S5P_CLK_DIV0),
45 SAVE_ITEM(S5P_CLK_DIV1),
46 SAVE_ITEM(S5P_CLK_DIV2),
47 SAVE_ITEM(S5P_CLK_DIV3),
48 SAVE_ITEM(S5P_CLK_DIV4),
49 SAVE_ITEM(S5P_CLK_DIV5),
50 SAVE_ITEM(S5P_CLK_DIV6),
51 SAVE_ITEM(S5P_CLK_DIV7),
52
53 /* Clock Main Gate */
54 SAVE_ITEM(S5P_CLKGATE_MAIN0),
55 SAVE_ITEM(S5P_CLKGATE_MAIN1),
56 SAVE_ITEM(S5P_CLKGATE_MAIN2),
57
58 /* Clock source Peri Gate */
59 SAVE_ITEM(S5P_CLKGATE_PERI0),
60 SAVE_ITEM(S5P_CLKGATE_PERI1),
61
62 /* Clock source SCLK Gate */
63 SAVE_ITEM(S5P_CLKGATE_SCLK0),
64 SAVE_ITEM(S5P_CLKGATE_SCLK1),
65
66 /* Clock IP Clock gate */
67 SAVE_ITEM(S5P_CLKGATE_IP0),
68 SAVE_ITEM(S5P_CLKGATE_IP1),
69 SAVE_ITEM(S5P_CLKGATE_IP2),
70 SAVE_ITEM(S5P_CLKGATE_IP3),
71 SAVE_ITEM(S5P_CLKGATE_IP4),
72
73 /* Clock Blcok and Bus gate */
74 SAVE_ITEM(S5P_CLKGATE_BLOCK),
75 SAVE_ITEM(S5P_CLKGATE_BUS0),
76
77 /* Clock ETC */
78 SAVE_ITEM(S5P_CLK_OUT),
79 SAVE_ITEM(S5P_MDNIE_SEL),
80
81 /* PWM Register */
82 SAVE_ITEM(S3C2410_TCFG0),
83 SAVE_ITEM(S3C2410_TCFG1),
84 SAVE_ITEM(S3C64XX_TINT_CSTAT),
85 SAVE_ITEM(S3C2410_TCON),
86 SAVE_ITEM(S3C2410_TCNTB(0)),
87 SAVE_ITEM(S3C2410_TCMPB(0)),
88 SAVE_ITEM(S3C2410_TCNTO(0)),
89};
90
Abhilash Kesavan7e1291d2011-08-13 10:34:56 +0900[diff] [blame]91static int s5pv210_cpu_suspend(unsigned long arg)
Jongpill Leeea31fd42010-10-02 19:13:42 +0900[diff] [blame]92{
93 unsigned long tmp;
94
95 /* issue the standby signal into the pm unit. Note, we
96 * issue a write-buffer drain just in case */
97
98 tmp = 0;
99
100 asm("b 1f\n\t"
101 ".align 5\n\t"
102 "1:\n\t"
103 "mcr p15, 0, %0, c7, c10, 5\n\t"
104 "mcr p15, 0, %0, c7, c10, 4\n\t"
105 "wfi" : : "r" (tmp));
106
107 /* we should never get past here */
108 panic("sleep resumed to originator?");
109}
110
111static void s5pv210_pm_prepare(void)
112{
113 unsigned int tmp;
114
115 /* ensure at least INFORM0 has the resume address */
116 __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);
117
118 tmp = __raw_readl(S5P_SLEEP_CFG);
119 tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
120 __raw_writel(tmp, S5P_SLEEP_CFG);
121
122 /* WFI for SLEEP mode configuration by SYSCON */
123 tmp = __raw_readl(S5P_PWR_CFG);
124 tmp &= S5P_CFG_WFI_CLEAN;
125 tmp |= S5P_CFG_WFI_SLEEP;
126 __raw_writel(tmp, S5P_PWR_CFG);
127
128 /* SYSCON interrupt handling disable */
129 tmp = __raw_readl(S5P_OTHERS);
130 tmp |= S5P_OTHER_SYSC_INTOFF;
131 __raw_writel(tmp, S5P_OTHERS);
132
133 s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
134}
135
136static int s5pv210_pm_add(struct sys_device *sysdev)
137{
138 pm_cpu_prep = s5pv210_pm_prepare;
139 pm_cpu_sleep = s5pv210_cpu_suspend;
140
141 return 0;
142}
143
Rafael J. Wysockibb072c32011-04-22 22:03:21 +0200[diff] [blame]144static struct sysdev_driver s5pv210_pm_driver = {
145 .add = s5pv210_pm_add,
146};
147
148static __init int s5pv210_pm_drvinit(void)
149{
150 return sysdev_driver_register(&s5pv210_sysclass, &s5pv210_pm_driver);
151}
152arch_initcall(s5pv210_pm_drvinit);
153
154static void s5pv210_pm_resume(void)
Jongpill Leeea31fd42010-10-02 19:13:42 +0900[diff] [blame]155{
156 u32 tmp;
157
158 tmp = __raw_readl(S5P_OTHERS);
159 tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\
160 S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART);
161 __raw_writel(tmp , S5P_OTHERS);
162
163 s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
Jongpill Leeea31fd42010-10-02 19:13:42 +0900[diff] [blame]164}
165
Rafael J. Wysockibb072c32011-04-22 22:03:21 +0200[diff] [blame]166static struct syscore_ops s5pv210_pm_syscore_ops = {
Jongpill Leeea31fd42010-10-02 19:13:42 +0900[diff] [blame]167 .resume = s5pv210_pm_resume,
168};
169
Rafael J. Wysockibb072c32011-04-22 22:03:21 +0200[diff] [blame]170static __init int s5pv210_pm_syscore_init(void)
Jongpill Leeea31fd42010-10-02 19:13:42 +0900[diff] [blame]171{
Rafael J. Wysockibb072c32011-04-22 22:03:21 +0200[diff] [blame]172 register_syscore_ops(&s5pv210_pm_syscore_ops);
173 return 0;
Jongpill Leeea31fd42010-10-02 19:13:42 +0900[diff] [blame]174}
Rafael J. Wysockibb072c32011-04-22 22:03:21 +0200[diff] [blame]175arch_initcall(s5pv210_pm_syscore_init);