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Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
36#include <linux/pci.h>
37#include <linux/libata.h>
38
39#include "libata.h"
40
41/**
Tejun Heo90088bb2006-10-09 11:10:26 +090042 * ata_irq_on - Enable interrupts on a port.
43 * @ap: Port on which interrupts are enabled.
44 *
45 * Enable interrupts on a legacy IDE device using MMIO or PIO,
46 * wait for idle, clear any pending interrupts.
47 *
48 * LOCKING:
49 * Inherited from caller.
50 */
51u8 ata_irq_on(struct ata_port *ap)
52{
53 struct ata_ioports *ioaddr = &ap->ioaddr;
54 u8 tmp;
55
56 ap->ctl &= ~ATA_NIEN;
57 ap->last_ctl = ap->ctl;
58
Tejun Heo0d5ff562007-02-01 15:06:36 +090059 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo90088bb2006-10-09 11:10:26 +090060 tmp = ata_wait_idle(ap);
61
62 ap->ops->irq_clear(ap);
63
64 return tmp;
65}
66
Akira Iguchi83625002007-01-26 16:27:32 +090067u8 ata_dummy_irq_on (struct ata_port *ap) { return 0; }
68
69/**
70 * ata_irq_ack - Acknowledge a device interrupt.
71 * @ap: Port on which interrupts are enabled.
72 *
73 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
74 * or BUSY+DRQ clear). Obtain dma status and port status from
75 * device. Clear the interrupt. Return port status.
76 *
77 * LOCKING:
78 */
79
80u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
81{
82 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
Alan Coxd92e74d2007-06-07 16:19:15 +010083 u8 host_stat = 0, post_stat = 0, status;
Akira Iguchi83625002007-01-26 16:27:32 +090084
85 status = ata_busy_wait(ap, bits, 1000);
86 if (status & bits)
87 if (ata_msg_err(ap))
88 printk(KERN_ERR "abnormal status 0x%X\n", status);
89
Alan Coxd92e74d2007-06-07 16:19:15 +010090 if (ap->ioaddr.bmdma_addr) {
91 /* get controller status; clear intr, err bits */
92 host_stat = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
93 iowrite8(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
94 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
Akira Iguchi83625002007-01-26 16:27:32 +090095
Alan Coxd92e74d2007-06-07 16:19:15 +010096 post_stat = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
97 }
Akira Iguchi83625002007-01-26 16:27:32 +090098 if (ata_msg_intr(ap))
99 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
100 __FUNCTION__,
101 host_stat, post_stat, status);
Akira Iguchi83625002007-01-26 16:27:32 +0900102 return status;
103}
104
105u8 ata_dummy_irq_ack(struct ata_port *ap, unsigned int chk_drq) { return 0; }
106
Tejun Heo90088bb2006-10-09 11:10:26 +0900107/**
Tejun Heo0d5ff562007-02-01 15:06:36 +0900108 * ata_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500109 * @ap: Port to which output is sent
110 * @tf: ATA taskfile register set
111 *
112 * Outputs ATA taskfile to standard ATA host controller.
113 *
114 * LOCKING:
115 * Inherited from caller.
116 */
117
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500118void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
119{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900120 struct ata_ioports *ioaddr = &ap->ioaddr;
121 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
122
123 if (tf->ctl != ap->last_ctl) {
124 iowrite8(tf->ctl, ioaddr->ctl_addr);
125 ap->last_ctl = tf->ctl;
126 ata_wait_idle(ap);
127 }
128
129 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
130 iowrite8(tf->hob_feature, ioaddr->feature_addr);
131 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
132 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
133 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
134 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
135 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
136 tf->hob_feature,
137 tf->hob_nsect,
138 tf->hob_lbal,
139 tf->hob_lbam,
140 tf->hob_lbah);
141 }
142
143 if (is_addr) {
144 iowrite8(tf->feature, ioaddr->feature_addr);
145 iowrite8(tf->nsect, ioaddr->nsect_addr);
146 iowrite8(tf->lbal, ioaddr->lbal_addr);
147 iowrite8(tf->lbam, ioaddr->lbam_addr);
148 iowrite8(tf->lbah, ioaddr->lbah_addr);
149 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
150 tf->feature,
151 tf->nsect,
152 tf->lbal,
153 tf->lbam,
154 tf->lbah);
155 }
156
157 if (tf->flags & ATA_TFLAG_DEVICE) {
158 iowrite8(tf->device, ioaddr->device_addr);
159 VPRINTK("device 0x%X\n", tf->device);
160 }
161
162 ata_wait_idle(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500163}
164
165/**
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500166 * ata_exec_command - issue ATA command to host controller
167 * @ap: port to which command is being issued
168 * @tf: ATA taskfile register set
169 *
Tejun Heo0d5ff562007-02-01 15:06:36 +0900170 * Issues ATA command, with proper synchronization with interrupt
171 * handler / other threads.
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500172 *
173 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400174 * spin_lock_irqsave(host lock)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500175 */
176void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
177{
Tejun Heo44877b42007-02-21 01:06:51 +0900178 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900179
180 iowrite8(tf->command, ap->ioaddr.command_addr);
181 ata_pause(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500182}
183
184/**
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500185 * ata_tf_read - input device's ATA taskfile shadow registers
186 * @ap: Port from which input is read
187 * @tf: ATA taskfile register set for storing input
188 *
189 * Reads ATA taskfile registers for currently-selected device
190 * into @tf.
191 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500192 * LOCKING:
193 * Inherited from caller.
194 */
195void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
196{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900197 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500198
Tejun Heo0d5ff562007-02-01 15:06:36 +0900199 tf->command = ata_check_status(ap);
200 tf->feature = ioread8(ioaddr->error_addr);
201 tf->nsect = ioread8(ioaddr->nsect_addr);
202 tf->lbal = ioread8(ioaddr->lbal_addr);
203 tf->lbam = ioread8(ioaddr->lbam_addr);
204 tf->lbah = ioread8(ioaddr->lbah_addr);
205 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500206
Tejun Heo0d5ff562007-02-01 15:06:36 +0900207 if (tf->flags & ATA_TFLAG_LBA48) {
208 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
209 tf->hob_feature = ioread8(ioaddr->error_addr);
210 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
211 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
212 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
213 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
Petr Vandrovecfe36cb52007-07-20 07:44:44 -0400214 iowrite8(tf->ctl, ioaddr->ctl_addr);
215 ap->last_ctl = tf->ctl;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900216 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500217}
218
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500219/**
220 * ata_check_status - Read device status reg & clear interrupt
221 * @ap: port where the device is
222 *
223 * Reads ATA taskfile status register for currently-selected device
224 * and return its value. This also clears pending interrupts
225 * from this device
226 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500227 * LOCKING:
228 * Inherited from caller.
229 */
230u8 ata_check_status(struct ata_port *ap)
231{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900232 return ioread8(ap->ioaddr.status_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500233}
234
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500235/**
236 * ata_altstatus - Read device alternate status reg
237 * @ap: port where the device is
238 *
239 * Reads ATA taskfile alternate status register for
240 * currently-selected device and return its value.
241 *
242 * Note: may NOT be used as the check_altstatus() entry in
243 * ata_port_operations.
244 *
245 * LOCKING:
246 * Inherited from caller.
247 */
248u8 ata_altstatus(struct ata_port *ap)
249{
250 if (ap->ops->check_altstatus)
251 return ap->ops->check_altstatus(ap);
252
Tejun Heo0d5ff562007-02-01 15:06:36 +0900253 return ioread8(ap->ioaddr.altstatus_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500254}
255
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500256/**
Tejun Heo0d5ff562007-02-01 15:06:36 +0900257 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500258 * @qc: Info associated with this ATA transaction.
259 *
260 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400261 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500262 */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900263void ata_bmdma_setup(struct ata_queued_cmd *qc)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500264{
265 struct ata_port *ap = qc->ap;
266 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
267 u8 dmactl;
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500268
269 /* load PRD table addr. */
270 mb(); /* make sure PRD table writes are visible to controller */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900271 iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500272
273 /* specify data direction, triple-check start bit is clear */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900274 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500275 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
276 if (!rw)
277 dmactl |= ATA_DMA_WR;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900278 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500279
280 /* issue r/w command */
281 ap->ops->exec_command(ap, &qc->tf);
282}
283
284/**
Tejun Heo0d5ff562007-02-01 15:06:36 +0900285 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500286 * @qc: Info associated with this ATA transaction.
287 *
288 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400289 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500290 */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900291void ata_bmdma_start (struct ata_queued_cmd *qc)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500292{
293 struct ata_port *ap = qc->ap;
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500294 u8 dmactl;
295
296 /* start host DMA transaction */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900297 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
298 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500299
300 /* Strictly, one may wish to issue a readb() here, to
301 * flush the mmio write. However, control also passes
302 * to the hardware at this point, and it will interrupt
303 * us when we are to resume control. So, in effect,
304 * we don't care when the mmio write flushes.
305 * Further, a read of the DMA status register _immediately_
306 * following the write may not be what certain flaky hardware
307 * is expected, so I think it is best to not add a readb()
308 * without first all the MMIO ATA cards/mobos.
309 * Or maybe I'm just being paranoid.
310 */
311}
312
313/**
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500314 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
315 * @ap: Port associated with this ATA transaction.
316 *
317 * Clear interrupt and error flags in DMA status register.
318 *
319 * May be used as the irq_clear() entry in ata_port_operations.
320 *
321 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400322 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500323 */
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500324void ata_bmdma_irq_clear(struct ata_port *ap)
325{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900326 void __iomem *mmio = ap->ioaddr.bmdma_addr;
327
328 if (!mmio)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500329 return;
330
Tejun Heo0d5ff562007-02-01 15:06:36 +0900331 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500332}
333
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500334/**
335 * ata_bmdma_status - Read PCI IDE BMDMA status
336 * @ap: Port associated with this ATA transaction.
337 *
338 * Read and return BMDMA status register.
339 *
340 * May be used as the bmdma_status() entry in ata_port_operations.
341 *
342 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400343 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500344 */
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500345u8 ata_bmdma_status(struct ata_port *ap)
346{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900347 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500348}
349
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500350/**
351 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
352 * @qc: Command we are ending DMA for
353 *
354 * Clears the ATA_DMA_START flag in the dma control register
355 *
356 * May be used as the bmdma_stop() entry in ata_port_operations.
357 *
358 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400359 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500360 */
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500361void ata_bmdma_stop(struct ata_queued_cmd *qc)
362{
363 struct ata_port *ap = qc->ap;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900364 void __iomem *mmio = ap->ioaddr.bmdma_addr;
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500365
Tejun Heo0d5ff562007-02-01 15:06:36 +0900366 /* clear start/stop bit */
367 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
368 mmio + ATA_DMA_CMD);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500369
370 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
371 ata_altstatus(ap); /* dummy read */
372}
373
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900374/**
375 * ata_bmdma_freeze - Freeze BMDMA controller port
376 * @ap: port to freeze
377 *
378 * Freeze BMDMA controller port.
379 *
380 * LOCKING:
381 * Inherited from caller.
382 */
383void ata_bmdma_freeze(struct ata_port *ap)
384{
385 struct ata_ioports *ioaddr = &ap->ioaddr;
386
387 ap->ctl |= ATA_NIEN;
388 ap->last_ctl = ap->ctl;
389
Tejun Heo0d5ff562007-02-01 15:06:36 +0900390 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +0900391
392 /* Under certain circumstances, some controllers raise IRQ on
393 * ATA_NIEN manipulation. Also, many controllers fail to mask
394 * previously pending IRQ on ATA_NIEN assertion. Clear it.
395 */
396 ata_chk_status(ap);
397
398 ap->ops->irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900399}
400
401/**
402 * ata_bmdma_thaw - Thaw BMDMA controller port
403 * @ap: port to thaw
404 *
405 * Thaw BMDMA controller port.
406 *
407 * LOCKING:
408 * Inherited from caller.
409 */
410void ata_bmdma_thaw(struct ata_port *ap)
411{
412 /* clear & re-enable interrupts */
413 ata_chk_status(ap);
414 ap->ops->irq_clear(ap);
Akira Iguchi83625002007-01-26 16:27:32 +0900415 ap->ops->irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900416}
417
418/**
419 * ata_bmdma_drive_eh - Perform EH with given methods for BMDMA controller
420 * @ap: port to handle error for
Tejun Heof5914a42006-05-31 18:27:48 +0900421 * @prereset: prereset method (can be NULL)
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900422 * @softreset: softreset method (can be NULL)
423 * @hardreset: hardreset method (can be NULL)
424 * @postreset: postreset method (can be NULL)
425 *
426 * Handle error for ATA BMDMA controller. It can handle both
427 * PATA and SATA controllers. Many controllers should be able to
428 * use this EH as-is or with some added handling before and
429 * after.
430 *
431 * This function is intended to be used for constructing
432 * ->error_handler callback by low level drivers.
433 *
434 * LOCKING:
435 * Kernel thread context (may sleep)
436 */
Tejun Heof5914a42006-05-31 18:27:48 +0900437void ata_bmdma_drive_eh(struct ata_port *ap, ata_prereset_fn_t prereset,
438 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
439 ata_postreset_fn_t postreset)
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900440{
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900441 struct ata_queued_cmd *qc;
442 unsigned long flags;
443 int thaw = 0;
444
445 qc = __ata_qc_from_tag(ap, ap->active_tag);
446 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
447 qc = NULL;
448
449 /* reset PIO HSM and stop DMA engine */
Jeff Garzikba6a1302006-06-22 23:46:10 -0400450 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900451
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900452 ap->hsm_task_state = HSM_ST_IDLE;
453
454 if (qc && (qc->tf.protocol == ATA_PROT_DMA ||
455 qc->tf.protocol == ATA_PROT_ATAPI_DMA)) {
456 u8 host_stat;
457
Robert Hancockfbbb2622006-10-27 19:08:41 -0700458 host_stat = ap->ops->bmdma_status(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900459
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900460 /* BMDMA controllers indicate host bus error by
461 * setting DMA_ERR bit and timing out. As it wasn't
462 * really a timeout event, adjust error mask and
463 * cancel frozen state.
464 */
Alan18d90de2007-01-24 11:42:38 +0000465 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900466 qc->err_mask = AC_ERR_HOST_BUS;
467 thaw = 1;
468 }
469
470 ap->ops->bmdma_stop(qc);
471 }
472
473 ata_altstatus(ap);
474 ata_chk_status(ap);
475 ap->ops->irq_clear(ap);
476
Jeff Garzikba6a1302006-06-22 23:46:10 -0400477 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900478
479 if (thaw)
480 ata_eh_thaw_port(ap);
481
482 /* PIO and DMA engines have been stopped, perform recovery */
Tejun Heof5914a42006-05-31 18:27:48 +0900483 ata_do_eh(ap, prereset, softreset, hardreset, postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900484}
485
486/**
487 * ata_bmdma_error_handler - Stock error handler for BMDMA controller
488 * @ap: port to handle error for
489 *
490 * Stock error handler for BMDMA controller.
491 *
492 * LOCKING:
493 * Kernel thread context (may sleep)
494 */
495void ata_bmdma_error_handler(struct ata_port *ap)
496{
497 ata_reset_fn_t hardreset;
498
499 hardreset = NULL;
500 if (sata_scr_valid(ap))
501 hardreset = sata_std_hardreset;
502
Tejun Heof5914a42006-05-31 18:27:48 +0900503 ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, hardreset,
504 ata_std_postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900505}
506
507/**
508 * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for
509 * BMDMA controller
510 * @qc: internal command to clean up
511 *
512 * LOCKING:
513 * Kernel thread context (may sleep)
514 */
515void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc)
516{
Alan61dd08c2007-01-25 15:09:05 +0000517 if (qc->ap->ioaddr.bmdma_addr)
518 ata_bmdma_stop(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900519}
520
Alan Coxd92e74d2007-06-07 16:19:15 +0100521/**
522 * ata_sff_port_start - Set port up for dma.
523 * @ap: Port to initialize
524 *
525 * Called just after data structures for each port are
526 * initialized. Allocates space for PRD table if the device
527 * is DMA capable SFF.
528 *
529 * May be used as the port_start() entry in ata_port_operations.
530 *
531 * LOCKING:
532 * Inherited from caller.
533 */
534
535int ata_sff_port_start(struct ata_port *ap)
536{
537 if (ap->ioaddr.bmdma_addr)
538 return ata_port_start(ap);
539 return 0;
540}
541
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500542#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +0000543
544static int ata_resources_present(struct pci_dev *pdev, int port)
545{
546 int i;
Jeff Garzika84471f2007-02-26 05:51:33 -0500547
Alan4112e162007-01-08 12:10:05 +0000548 /* Check the PCI resources for this channel are enabled */
549 port = port * 2;
550 for (i = 0; i < 2; i ++) {
551 if (pci_resource_start(pdev, port + i) == 0 ||
Tejun Heo55a6ade2007-03-09 19:43:35 +0900552 pci_resource_len(pdev, port + i) == 0)
553 return 0;
Alan4112e162007-01-08 12:10:05 +0000554 }
555 return 1;
556}
Jeff Garzika84471f2007-02-26 05:51:33 -0500557
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500558/**
Tejun Heo0f834de2007-04-17 23:44:07 +0900559 * ata_pci_init_bmdma - acquire PCI BMDMA resources and init ATA host
560 * @host: target ATA host
561 *
562 * Acquire PCI BMDMA resources and initialize @host accordingly.
563 *
564 * LOCKING:
565 * Inherited from calling layer (may sleep).
566 *
567 * RETURNS:
568 * 0 on success, -errno otherwise.
569 */
Tejun Heo1626aeb2007-05-04 12:43:58 +0200570int ata_pci_init_bmdma(struct ata_host *host)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500571{
Tejun Heo0f834de2007-04-17 23:44:07 +0900572 struct device *gdev = host->dev;
573 struct pci_dev *pdev = to_pci_dev(gdev);
574 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500575
Alan Cox6fdc99a2007-07-26 18:41:30 +0100576 /* No BAR4 allocation: No DMA */
577 if (pci_resource_start(pdev, 4) == 0)
578 return 0;
579
Tejun Heo0f834de2007-04-17 23:44:07 +0900580 /* TODO: If we get no DMA mask we should fall back to PIO */
581 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
582 if (rc)
583 return rc;
584 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
585 if (rc)
586 return rc;
587
588 /* request and iomap DMA region */
589 rc = pcim_iomap_regions(pdev, 1 << 4, DRV_NAME);
590 if (rc) {
591 dev_printk(KERN_ERR, gdev, "failed to request/iomap BAR4\n");
592 return -ENOMEM;
593 }
594 host->iomap = pcim_iomap_table(pdev);
595
Tejun Heo1626aeb2007-05-04 12:43:58 +0200596 for (i = 0; i < 2; i++) {
Tejun Heo0f834de2007-04-17 23:44:07 +0900597 struct ata_port *ap = host->ports[i];
Tejun Heo0f834de2007-04-17 23:44:07 +0900598 void __iomem *bmdma = host->iomap[4] + 8 * i;
599
600 if (ata_port_is_dummy(ap))
601 continue;
602
Tejun Heo21b0ad42007-04-17 23:44:07 +0900603 ap->ioaddr.bmdma_addr = bmdma;
Tejun Heo0f834de2007-04-17 23:44:07 +0900604 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
605 (ioread8(bmdma + 2) & 0x80))
606 host->flags |= ATA_HOST_SIMPLEX;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900607 }
608
Tejun Heo0f834de2007-04-17 23:44:07 +0900609 return 0;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500610}
611
Tejun Heod491b272007-04-17 23:44:07 +0900612/**
Tejun Heod583bc12007-07-04 18:02:07 +0900613 * ata_pci_init_sff_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +0900614 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +0900615 *
Tejun Heo1626aeb2007-05-04 12:43:58 +0200616 * Acquire native PCI ATA resources for @host and initialize the
617 * first two ports of @host accordingly. Ports marked dummy are
618 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +0900619 *
Tejun Heod583bc12007-07-04 18:02:07 +0900620 * Note that native PCI resources are valid even for legacy hosts
621 * as we fix up pdev resources array early in boot, so this
622 * function can be used for both native and legacy SFF hosts.
623 *
Tejun Heod491b272007-04-17 23:44:07 +0900624 * LOCKING:
625 * Inherited from calling layer (may sleep).
626 *
627 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +0200628 * 0 if at least one port is initialized, -ENODEV if no port is
629 * available.
Tejun Heod491b272007-04-17 23:44:07 +0900630 */
Tejun Heod583bc12007-07-04 18:02:07 +0900631int ata_pci_init_sff_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +0900632{
633 struct device *gdev = host->dev;
634 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +0200635 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +0900636 int i, rc;
637
Tejun Heod491b272007-04-17 23:44:07 +0900638 /* request, iomap BARs and init port addresses accordingly */
639 for (i = 0; i < 2; i++) {
640 struct ata_port *ap = host->ports[i];
641 int base = i * 2;
642 void __iomem * const *iomap;
643
Tejun Heo1626aeb2007-05-04 12:43:58 +0200644 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +0900645 continue;
646
Tejun Heo1626aeb2007-05-04 12:43:58 +0200647 /* Discard disabled ports. Some controllers show
648 * their unused channels this way. Disabled ports are
649 * made dummy.
650 */
651 if (!ata_resources_present(pdev, i)) {
652 ap->ops = &ata_dummy_port_ops;
653 continue;
654 }
655
Tejun Heod491b272007-04-17 23:44:07 +0900656 rc = pcim_iomap_regions(pdev, 0x3 << base, DRV_NAME);
657 if (rc) {
Tejun Heo1626aeb2007-05-04 12:43:58 +0200658 dev_printk(KERN_WARNING, gdev,
659 "failed to request/iomap BARs for port %d "
660 "(errno=%d)\n", i, rc);
Tejun Heod491b272007-04-17 23:44:07 +0900661 if (rc == -EBUSY)
662 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +0200663 ap->ops = &ata_dummy_port_ops;
664 continue;
Tejun Heod491b272007-04-17 23:44:07 +0900665 }
666 host->iomap = iomap = pcim_iomap_table(pdev);
667
668 ap->ioaddr.cmd_addr = iomap[base];
669 ap->ioaddr.altstatus_addr =
670 ap->ioaddr.ctl_addr = (void __iomem *)
671 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
672 ata_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +0200673
674 mask |= 1 << i;
675 }
676
677 if (!mask) {
678 dev_printk(KERN_ERR, gdev, "no available native port\n");
679 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +0900680 }
681
682 return 0;
683}
684
Tejun Heo21b0ad42007-04-17 23:44:07 +0900685/**
Tejun Heod583bc12007-07-04 18:02:07 +0900686 * ata_pci_prepare_sff_host - helper to prepare native PCI ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +0900687 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +0200688 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +0900689 * @r_host: out argument for the initialized ATA host
690 *
691 * Helper to allocate ATA host for @pdev, acquire all native PCI
692 * resources and initialize it accordingly in one go.
693 *
694 * LOCKING:
695 * Inherited from calling layer (may sleep).
696 *
697 * RETURNS:
698 * 0 on success, -errno otherwise.
699 */
Tejun Heod583bc12007-07-04 18:02:07 +0900700int ata_pci_prepare_sff_host(struct pci_dev *pdev,
701 const struct ata_port_info * const * ppi,
702 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +0900703{
704 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +0900705 int rc;
706
707 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
708 return -ENOMEM;
709
710 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
711 if (!host) {
712 dev_printk(KERN_ERR, &pdev->dev,
713 "failed to allocate ATA host\n");
714 rc = -ENOMEM;
715 goto err_out;
716 }
717
Tejun Heod583bc12007-07-04 18:02:07 +0900718 rc = ata_pci_init_sff_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +0900719 if (rc)
720 goto err_out;
721
722 /* init DMA related stuff */
723 rc = ata_pci_init_bmdma(host);
724 if (rc)
725 goto err_bmdma;
726
727 devres_remove_group(&pdev->dev, NULL);
728 *r_host = host;
729 return 0;
730
731 err_bmdma:
732 /* This is necessary because PCI and iomap resources are
733 * merged and releasing the top group won't release the
734 * acquired resources if some of those have been acquired
735 * before entering this function.
736 */
737 pcim_iounmap_regions(pdev, 0xf);
738 err_out:
739 devres_release_group(&pdev->dev, NULL);
740 return rc;
741}
742
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500743/**
744 * ata_pci_init_one - Initialize/register PCI IDE host controller
745 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +0200746 * @ppi: array of port_info, must be enough for two ports
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500747 *
748 * This is a helper function which can be called from a driver's
749 * xxx_init_one() probe function if the hardware uses traditional
750 * IDE taskfile registers.
751 *
752 * This function calls pci_enable_device(), reserves its register
753 * regions, sets the dma mask, enables bus master mode, and calls
754 * ata_device_add()
755 *
Alan Cox2ec7df02006-08-10 16:59:10 +0900756 * ASSUMPTION:
757 * Nobody makes a single channel controller that appears solely as
758 * the secondary legacy port on PCI.
759 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500760 * LOCKING:
761 * Inherited from PCI layer (may sleep).
762 *
763 * RETURNS:
764 * Zero on success, negative on errno-based value on error.
765 */
Tejun Heo1626aeb2007-05-04 12:43:58 +0200766int ata_pci_init_one(struct pci_dev *pdev,
767 const struct ata_port_info * const * ppi)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500768{
Tejun Heof0d36ef2007-01-20 16:00:28 +0900769 struct device *dev = &pdev->dev;
Tejun Heo1626aeb2007-05-04 12:43:58 +0200770 const struct ata_port_info *pi = NULL;
Tejun Heo0f834de2007-04-17 23:44:07 +0900771 struct ata_host *host = NULL;
Jeff Garzikc791c302006-09-28 03:40:11 -0400772 u8 mask;
Tejun Heo1626aeb2007-05-04 12:43:58 +0200773 int legacy_mode = 0;
774 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500775
776 DPRINTK("ENTER\n");
777
Tejun Heo1626aeb2007-05-04 12:43:58 +0200778 /* look up the first valid port_info */
779 for (i = 0; i < 2 && ppi[i]; i++) {
780 if (ppi[i]->port_ops != &ata_dummy_port_ops) {
781 pi = ppi[i];
782 break;
783 }
784 }
785
786 if (!pi) {
787 dev_printk(KERN_ERR, &pdev->dev,
788 "no valid port_info specified\n");
789 return -EINVAL;
790 }
791
Tejun Heof0d36ef2007-01-20 16:00:28 +0900792 if (!devres_open_group(dev, NULL, GFP_KERNEL))
793 return -ENOMEM;
794
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500795 /* FIXME: Really for ATA it isn't safe because the device may be
796 multi-purpose and we want to leave it alone if it was already
797 enabled. Secondly for shared use as Arjan says we want refcounting
798
799 Checking dev->is_enabled is insufficient as this is not set at
800 boot for the primary video which is BIOS enabled
Tejun Heod491b272007-04-17 23:44:07 +0900801 */
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500802
Tejun Heof0d36ef2007-01-20 16:00:28 +0900803 rc = pcim_enable_device(pdev);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500804 if (rc)
Tejun Heof0d36ef2007-01-20 16:00:28 +0900805 goto err_out;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500806
Jeff Garzikc791c302006-09-28 03:40:11 -0400807 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
808 u8 tmp8;
809
810 /* TODO: What if one channel is in native mode ... */
811 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
812 mask = (1 << 2) | (1 << 0);
813 if ((tmp8 & mask) != mask)
Tejun Heo1626aeb2007-05-04 12:43:58 +0200814 legacy_mode = 1;
Alan Cox8eb166b2006-10-16 16:24:50 +0100815#if defined(CONFIG_NO_ATA_LEGACY)
816 /* Some platforms with PCI limits cannot address compat
817 port space. In that case we punt if their firmware has
818 left a device in compatibility mode */
819 if (legacy_mode) {
820 printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
Tejun Heof0d36ef2007-01-20 16:00:28 +0900821 rc = -EOPNOTSUPP;
822 goto err_out;
Alan Cox8eb166b2006-10-16 16:24:50 +0100823 }
824#endif
Jeff Garzikc791c302006-09-28 03:40:11 -0400825 }
826
Tejun Heod583bc12007-07-04 18:02:07 +0900827 /* prepare host */
828 rc = ata_pci_prepare_sff_host(pdev, ppi, &host);
829 if (rc)
Tejun Heod491b272007-04-17 23:44:07 +0900830 goto err_out;
Tejun Heod491b272007-04-17 23:44:07 +0900831
Tejun Heod491b272007-04-17 23:44:07 +0900832 pci_set_master(pdev);
833
834 /* start host and request IRQ */
835 rc = ata_host_start(host);
836 if (rc)
837 goto err_out;
838
Tejun Heo40318262007-07-03 01:38:47 +0900839 if (!legacy_mode) {
Tejun Heo1626aeb2007-05-04 12:43:58 +0200840 rc = devm_request_irq(dev, pdev->irq, pi->port_ops->irq_handler,
Tejun Heod491b272007-04-17 23:44:07 +0900841 IRQF_SHARED, DRV_NAME, host);
Tejun Heod583bc12007-07-04 18:02:07 +0900842 if (rc)
843 goto err_out;
Tejun Heo40318262007-07-03 01:38:47 +0900844 host->irq = pdev->irq;
845 } else {
Tejun Heod583bc12007-07-04 18:02:07 +0900846 if (!ata_port_is_dummy(host->ports[0])) {
847 host->irq = ATA_PRIMARY_IRQ(pdev);
848 rc = devm_request_irq(dev, host->irq,
849 pi->port_ops->irq_handler,
850 IRQF_SHARED, DRV_NAME, host);
851 if (rc)
852 goto err_out;
853 }
Tejun Heo0f834de2007-04-17 23:44:07 +0900854
Tejun Heod583bc12007-07-04 18:02:07 +0900855 if (!ata_port_is_dummy(host->ports[1])) {
856 host->irq2 = ATA_SECONDARY_IRQ(pdev);
857 rc = devm_request_irq(dev, host->irq2,
858 pi->port_ops->irq_handler,
859 IRQF_SHARED, DRV_NAME, host);
860 if (rc)
861 goto err_out;
862 }
Jeff Garzikc791c302006-09-28 03:40:11 -0400863 }
Tejun Heod491b272007-04-17 23:44:07 +0900864
865 /* register */
Tejun Heo1626aeb2007-05-04 12:43:58 +0200866 rc = ata_host_register(host, pi->sht);
Tejun Heod491b272007-04-17 23:44:07 +0900867 if (rc)
868 goto err_out;
869
Tejun Heof0d36ef2007-01-20 16:00:28 +0900870 devres_remove_group(dev, NULL);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500871 return 0;
872
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500873err_out:
Tejun Heof0d36ef2007-01-20 16:00:28 +0900874 devres_release_group(dev, NULL);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500875 return rc;
876}
877
Alan Coxd33d44f2006-03-21 15:59:57 +0000878/**
879 * ata_pci_clear_simplex - attempt to kick device out of simplex
880 * @pdev: PCI device
881 *
882 * Some PCI ATA devices report simplex mode but in fact can be told to
Jeff Garzik2e9edbf2006-03-24 09:56:57 -0500883 * enter non simplex mode. This implements the neccessary logic to
Alan Coxd33d44f2006-03-21 15:59:57 +0000884 * perform the task on such devices. Calling it on other devices will
885 * have -undefined- behaviour.
886 */
887
888int ata_pci_clear_simplex(struct pci_dev *pdev)
889{
890 unsigned long bmdma = pci_resource_start(pdev, 4);
891 u8 simplex;
892
893 if (bmdma == 0)
894 return -ENOENT;
895
896 simplex = inb(bmdma + 0x02);
897 outb(simplex & 0x60, bmdma + 0x02);
898 simplex = inb(bmdma + 0x02);
899 if (simplex & 0x80)
900 return -EOPNOTSUPP;
901 return 0;
902}
903
Alan Coxa76b62c2007-03-09 09:34:07 -0500904unsigned long ata_pci_default_filter(struct ata_device *adev, unsigned long xfer_mask)
Alan Coxd33d44f2006-03-21 15:59:57 +0000905{
906 /* Filter out DMA modes if the device has been configured by
907 the BIOS as PIO only */
Jeff Garzik2e9edbf2006-03-24 09:56:57 -0500908
Alan Coxa76b62c2007-03-09 09:34:07 -0500909 if (adev->ap->ioaddr.bmdma_addr == 0)
Alan Coxd33d44f2006-03-21 15:59:57 +0000910 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
911 return xfer_mask;
912}
913
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500914#endif /* CONFIG_PCI */
915