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Ben Dooks21b23662008-10-31 16:14:34 +00001/* linux/arch/arm/plat-s3c/include/plat/gpio-cfg.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C Platform - GPIO pin configuration
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/* This file contains the necessary definitions to get the basic gpio
16 * pin configuration done such as setting a pin to input or output or
17 * changing the pull-{up,down} configurations.
18 */
19
20/* Note, this interface is being added to the s3c64xx arch first and will
21 * be added to the s3c24xx systems later.
22 */
23
24#ifndef __PLAT_GPIO_CFG_H
25#define __PLAT_GPIO_CFG_H __FILE__
26
27typedef unsigned int __bitwise__ s3c_gpio_pull_t;
Marek Szyprowski838c6d42010-05-18 12:23:36 +020028typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
Ben Dooks21b23662008-10-31 16:14:34 +000029
30/* forward declaration if gpio-core.h hasn't been included */
31struct s3c_gpio_chip;
32
33/**
34 * struct s3c_gpio_cfg GPIO configuration
35 * @cfg_eint: Configuration setting when used for external interrupt source
36 * @get_pull: Read the current pull configuration for the GPIO
37 * @set_pull: Set the current pull configuraiton for the GPIO
38 * @set_config: Set the current configuration for the GPIO
39 * @get_config: Read the current configuration for the GPIO
40 *
41 * Each chip can have more than one type of GPIO bank available and some
42 * have different capabilites even when they have the same control register
43 * layouts. Provide an point to vector control routine and provide any
44 * per-bank configuration information that other systems such as the
45 * external interrupt code will need.
Ben Dooks189e0442010-05-24 12:21:40 +090046 *
47 * @sa s3c_gpio_cfgpin
48 * @sa s3c_gpio_getcfg
49 * @sa s3c_gpio_setpull
50 * @sa s3c_gpio_getpull
Ben Dooks21b23662008-10-31 16:14:34 +000051 */
52struct s3c_gpio_cfg {
53 unsigned int cfg_eint;
54
55 s3c_gpio_pull_t (*get_pull)(struct s3c_gpio_chip *chip, unsigned offs);
56 int (*set_pull)(struct s3c_gpio_chip *chip, unsigned offs,
57 s3c_gpio_pull_t pull);
58
59 unsigned (*get_config)(struct s3c_gpio_chip *chip, unsigned offs);
60 int (*set_config)(struct s3c_gpio_chip *chip, unsigned offs,
61 unsigned config);
62};
63
64#define S3C_GPIO_SPECIAL_MARK (0xfffffff0)
65#define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x))
66
67/* Defines for generic pin configurations */
68#define S3C_GPIO_INPUT (S3C_GPIO_SPECIAL(0))
69#define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1))
70#define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x))
71
72#define s3c_gpio_is_cfg_special(_cfg) \
73 (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
74
75/**
76 * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
77 * @pin pin The pin number to configure.
Ben Dooks94143922010-05-24 12:11:43 +090078 * @to to The configuration for the pin's function.
Ben Dooks21b23662008-10-31 16:14:34 +000079 *
80 * Configure which function is actually connected to the external
81 * pin, such as an gpio input, output or some form of special function
82 * connected to an internal peripheral block.
Ben Dooks189e0442010-05-24 12:21:40 +090083 *
84 * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
85 * or S3C_GPIO_SFN() to indicate one of the possible values that the helper
86 * will then generate the correct bit mask and shift for the configuration.
87 *
88 * If a bank of GPIOs all needs to be set to special-function 2, then
89 * the following code will work:
90 *
91 * for (gpio = start; gpio < end; gpio++)
92 * s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
93 *
94 * The @to parameter can also be a specific value already shifted to the
95 * correct position in the control register, although these are discouraged
96 * in newer kernels and are only being kept for compatibility.
Ben Dooks21b23662008-10-31 16:14:34 +000097 */
98extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
99
Ben Dooks99338472010-05-06 10:50:42 +0900100/**
101 * s3c_gpio_getcfg - Read the current function for a GPIO pin
102 * @pin: The pin to read the configuration value for.
103 *
104 * Read the configuration state of the given @pin, returning a value that
105 * could be passed back to s3c_gpio_cfgpin().
106 *
107 * @sa s3c_gpio_cfgpin
108 */
109extern unsigned s3c_gpio_getcfg(unsigned int pin);
110
Ben Dooks21b23662008-10-31 16:14:34 +0000111/* Define values for the pull-{up,down} available for each gpio pin.
112 *
113 * These values control the state of the weak pull-{up,down} resistors
114 * available on most pins on the S3C series. Not all chips support both
115 * up or down settings, and it may be dependant on the chip that is being
116 * used to whether the particular mode is available.
117 */
118#define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00)
119#define S3C_GPIO_PULL_DOWN ((__force s3c_gpio_pull_t)0x01)
120#define S3C_GPIO_PULL_UP ((__force s3c_gpio_pull_t)0x02)
121
122/**
123 * s3c_gpio_setpull() - set the state of a gpio pin pull resistor
124 * @pin: The pin number to configure the pull resistor.
125 * @pull: The configuration for the pull resistor.
126 *
127 * This function sets the state of the pull-{up,down} resistor for the
128 * specified pin. It will return 0 if successfull, or a negative error
129 * code if the pin cannot support the requested pull setting.
Ben Dooks189e0442010-05-24 12:21:40 +0900130 *
131 * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
Ben Dooks21b23662008-10-31 16:14:34 +0000132*/
133extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
134
135/**
136 * s3c_gpio_getpull() - get the pull resistor state of a gpio pin
137 * @pin: The pin number to get the settings for
138 *
139 * Read the pull resistor value for the specified pin.
140*/
141extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
142
Marek Szyprowski838c6d42010-05-18 12:23:36 +0200143/* Define values for the drvstr available for each gpio pin.
144 *
145 * These values control the value of the output signal driver strength,
Kukjin Kim0770e522010-08-30 10:45:54 +0900146 * configurable on most pins on the S5P series.
Marek Szyprowski838c6d42010-05-18 12:23:36 +0200147 */
Kukjin Kim0770e522010-08-30 10:45:54 +0900148#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x0)
149#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x2)
150#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x1)
151#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x3)
Marek Szyprowski838c6d42010-05-18 12:23:36 +0200152
153/**
154 * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin
155 * @pin: The pin number to get the settings for
156 *
157 * Read the driver streght value for the specified pin.
158*/
159extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
160
161/**
162 * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin
163 * @pin: The pin number to configure the driver streght value
164 * @drvstr: The new value of the driver strength
165 *
166 * This function sets the driver strength value for the specified pin.
167 * It will return 0 if successfull, or a negative error code if the pin
168 * cannot support the requested setting.
169*/
170extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
171
Ben Dooks21b23662008-10-31 16:14:34 +0000172#endif /* __PLAT_GPIO_CFG_H */