Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 1 | /* |
| 2 | * nVidia Tegra device tree board support |
| 3 | * |
| 4 | * Copyright (C) 2010 Secret Lab Technologies, Ltd. |
| 5 | * Copyright (C) 2010 Google, Inc. |
| 6 | * |
| 7 | * This software is licensed under the terms of the GNU General Public |
| 8 | * License version 2, as published by the Free Software Foundation, and |
| 9 | * may be copied, distributed, and modified under those terms. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | */ |
| 17 | |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/serial_8250.h> |
| 22 | #include <linux/clk.h> |
| 23 | #include <linux/dma-mapping.h> |
| 24 | #include <linux/irqdomain.h> |
| 25 | #include <linux/of.h> |
| 26 | #include <linux/of_address.h> |
| 27 | #include <linux/of_fdt.h> |
| 28 | #include <linux/of_irq.h> |
| 29 | #include <linux/of_platform.h> |
| 30 | #include <linux/pda_power.h> |
| 31 | #include <linux/io.h> |
| 32 | #include <linux/i2c.h> |
| 33 | #include <linux/i2c-tegra.h> |
| 34 | |
| 35 | #include <asm/mach-types.h> |
| 36 | #include <asm/mach/arch.h> |
| 37 | #include <asm/mach/time.h> |
| 38 | #include <asm/setup.h> |
| 39 | |
| 40 | #include <mach/iomap.h> |
| 41 | #include <mach/irqs.h> |
| 42 | |
| 43 | #include "board.h" |
| 44 | #include "board-harmony.h" |
| 45 | #include "clock.h" |
| 46 | #include "devices.h" |
| 47 | |
| 48 | void harmony_pinmux_init(void); |
| 49 | void seaboard_pinmux_init(void); |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 50 | void ventana_pinmux_init(void); |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 51 | |
| 52 | struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { |
| 53 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), |
| 54 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL), |
| 55 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL), |
| 56 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL), |
| 57 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL), |
| 58 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL), |
| 59 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL), |
| 60 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL), |
| 61 | OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL), |
| 62 | OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.1", NULL), |
| 63 | OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL), |
| 64 | {} |
| 65 | }; |
| 66 | |
| 67 | static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { |
| 68 | /* name parent rate enabled */ |
| 69 | { "uartd", "pll_p", 216000000, true }, |
| 70 | { NULL, NULL, 0, 0}, |
| 71 | }; |
| 72 | |
| 73 | static struct of_device_id tegra_dt_match_table[] __initdata = { |
| 74 | { .compatible = "simple-bus", }, |
| 75 | {} |
| 76 | }; |
| 77 | |
| 78 | static struct of_device_id tegra_dt_gic_match[] __initdata = { |
| 79 | { .compatible = "nvidia,tegra20-gic", }, |
| 80 | {} |
| 81 | }; |
| 82 | |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 83 | static struct { |
| 84 | char *machine; |
| 85 | void (*init)(void); |
| 86 | } pinmux_configs[] = { |
| 87 | { "nvidia,harmony", harmony_pinmux_init }, |
| 88 | { "nvidia,seaboard", seaboard_pinmux_init }, |
| 89 | { "nvidia,ventana", ventana_pinmux_init }, |
| 90 | }; |
| 91 | |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 92 | static void __init tegra_dt_init(void) |
| 93 | { |
| 94 | struct device_node *node; |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 95 | int i; |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 96 | |
| 97 | node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match, |
| 98 | TEGRA_ARM_INT_DIST_BASE); |
| 99 | if (node) |
| 100 | irq_domain_add_simple(node, INT_GIC_BASE); |
| 101 | |
| 102 | tegra_clk_init_from_table(tegra_dt_clk_init_table); |
| 103 | |
Stephen Warren | 4b91b6f | 2011-10-25 02:01:27 +0000 | [diff] [blame^] | 104 | /* |
| 105 | * Finished with the static registrations now; fill in the missing |
| 106 | * devices |
| 107 | */ |
| 108 | of_platform_populate(NULL, tegra_dt_match_table, |
| 109 | tegra20_auxdata_lookup, NULL); |
| 110 | |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 111 | for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { |
| 112 | if (of_machine_is_compatible(pinmux_configs[i].machine)) { |
| 113 | pinmux_configs[i].init(); |
| 114 | break; |
| 115 | } |
| 116 | } |
| 117 | |
| 118 | WARN(i == ARRAY_SIZE(pinmux_configs), |
| 119 | "Unknown platform! Pinmuxing not initialized\n"); |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 120 | } |
| 121 | |
| 122 | static const char * tegra_dt_board_compat[] = { |
| 123 | "nvidia,harmony", |
| 124 | "nvidia,seaboard", |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 125 | "nvidia,ventana", |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 126 | NULL |
| 127 | }; |
| 128 | |
| 129 | DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)") |
| 130 | .map_io = tegra_map_common_io, |
| 131 | .init_early = tegra_init_early, |
| 132 | .init_irq = tegra_init_irq, |
| 133 | .timer = &tegra_timer, |
| 134 | .init_machine = tegra_dt_init, |
| 135 | .dt_compat = tegra_dt_board_compat, |
| 136 | MACHINE_END |