blob: 2f8535fc451e64745be644b6a685b6be414005ed [file] [log] [blame]
Alan Cox0d88a102006-01-18 17:44:10 -08001/*
2 * Intel D82875P Memory Controller kernel module
3 * (C) 2003 Linux Networx (http://lnxi.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
6 *
7 * Written by Thayne Harbaugh
8 * Contributors:
9 * Wang Zhenyu at intel.com
10 *
11 * $Id: edac_i82875p.c,v 1.5.2.11 2005/10/05 00:43:44 dsp_llnl Exp $
12 *
13 * Note: E7210 appears same as D82875P - zhenyu.z.wang at intel.com
14 */
15
Alan Cox0d88a102006-01-18 17:44:10 -080016#include <linux/module.h>
17#include <linux/init.h>
Alan Cox0d88a102006-01-18 17:44:10 -080018#include <linux/pci.h>
19#include <linux/pci_ids.h>
Hitoshi Mitakec3c52bc2008-04-29 01:03:18 -070020#include <linux/edac.h>
Douglas Thompson20bcb7a2007-07-19 01:49:47 -070021#include "edac_core.h"
Alan Cox0d88a102006-01-18 17:44:10 -080022
Michal Marek152ba392011-04-01 12:41:20 +020023#define I82875P_REVISION " Ver: 2.0.2"
Doug Thompson929a40e2006-07-01 04:35:45 -070024#define EDAC_MOD_STR "i82875p_edac"
Doug Thompson37f04582006-06-30 01:56:07 -070025
Dave Peterson537fba22006-03-26 01:38:40 -080026#define i82875p_printk(level, fmt, arg...) \
Dave Petersone7ecd892006-03-26 01:38:52 -080027 edac_printk(level, "i82875p", fmt, ##arg)
Dave Peterson537fba22006-03-26 01:38:40 -080028
29#define i82875p_mc_printk(mci, level, fmt, arg...) \
Dave Petersone7ecd892006-03-26 01:38:52 -080030 edac_mc_chipset_printk(mci, level, "i82875p", fmt, ##arg)
Dave Peterson537fba22006-03-26 01:38:40 -080031
Alan Cox0d88a102006-01-18 17:44:10 -080032#ifndef PCI_DEVICE_ID_INTEL_82875_0
33#define PCI_DEVICE_ID_INTEL_82875_0 0x2578
34#endif /* PCI_DEVICE_ID_INTEL_82875_0 */
35
36#ifndef PCI_DEVICE_ID_INTEL_82875_6
37#define PCI_DEVICE_ID_INTEL_82875_6 0x257e
38#endif /* PCI_DEVICE_ID_INTEL_82875_6 */
39
Alan Cox0d88a102006-01-18 17:44:10 -080040/* four csrows in dual channel, eight in single channel */
Mauro Carvalho Chehab0a8a9ac2012-04-16 15:10:43 -030041#define I82875P_NR_DIMMS 8
42#define I82875P_NR_CSROWS(nr_chans) (I82875P_NR_DIMMS / (nr_chans))
Alan Cox0d88a102006-01-18 17:44:10 -080043
Alan Cox0d88a102006-01-18 17:44:10 -080044/* Intel 82875p register addresses - device 0 function 0 - DRAM Controller */
45#define I82875P_EAP 0x58 /* Error Address Pointer (32b)
46 *
47 * 31:12 block address
48 * 11:0 reserved
49 */
50
51#define I82875P_DERRSYN 0x5c /* DRAM Error Syndrome (8b)
52 *
53 * 7:0 DRAM ECC Syndrome
54 */
55
56#define I82875P_DES 0x5d /* DRAM Error Status (8b)
57 *
58 * 7:1 reserved
59 * 0 Error channel 0/1
60 */
61
62#define I82875P_ERRSTS 0xc8 /* Error Status Register (16b)
63 *
64 * 15:10 reserved
65 * 9 non-DRAM lock error (ndlock)
66 * 8 Sftwr Generated SMI
67 * 7 ECC UE
68 * 6 reserved
69 * 5 MCH detects unimplemented cycle
70 * 4 AGP access outside GA
71 * 3 Invalid AGP access
72 * 2 Invalid GA translation table
73 * 1 Unsupported AGP command
74 * 0 ECC CE
75 */
76
77#define I82875P_ERRCMD 0xca /* Error Command (16b)
78 *
79 * 15:10 reserved
80 * 9 SERR on non-DRAM lock
81 * 8 SERR on ECC UE
82 * 7 SERR on ECC CE
83 * 6 target abort on high exception
84 * 5 detect unimplemented cyc
85 * 4 AGP access outside of GA
86 * 3 SERR on invalid AGP access
87 * 2 invalid translation table
88 * 1 SERR on unsupported AGP command
89 * 0 reserved
90 */
91
Alan Cox0d88a102006-01-18 17:44:10 -080092/* Intel 82875p register addresses - device 6 function 0 - DRAM Controller */
93#define I82875P_PCICMD6 0x04 /* PCI Command Register (16b)
94 *
95 * 15:10 reserved
96 * 9 fast back-to-back - ro 0
97 * 8 SERR enable - ro 0
98 * 7 addr/data stepping - ro 0
99 * 6 parity err enable - ro 0
100 * 5 VGA palette snoop - ro 0
101 * 4 mem wr & invalidate - ro 0
102 * 3 special cycle - ro 0
103 * 2 bus master - ro 0
104 * 1 mem access dev6 - 0(dis),1(en)
105 * 0 IO access dev3 - 0(dis),1(en)
106 */
107
108#define I82875P_BAR6 0x10 /* Mem Delays Base ADDR Reg (32b)
109 *
110 * 31:12 mem base addr [31:12]
111 * 11:4 address mask - ro 0
112 * 3 prefetchable - ro 0(non),1(pre)
113 * 2:1 mem type - ro 0
114 * 0 mem space - ro 0
115 */
116
117/* Intel 82875p MMIO register space - device 0 function 0 - MMR space */
118
119#define I82875P_DRB_SHIFT 26 /* 64MiB grain */
120#define I82875P_DRB 0x00 /* DRAM Row Boundary (8b x 8)
121 *
122 * 7 reserved
123 * 6:0 64MiB row boundary addr
124 */
125
126#define I82875P_DRA 0x10 /* DRAM Row Attribute (4b x 8)
127 *
128 * 7 reserved
129 * 6:4 row attr row 1
130 * 3 reserved
131 * 2:0 row attr row 0
132 *
133 * 000 = 4KiB
134 * 001 = 8KiB
135 * 010 = 16KiB
136 * 011 = 32KiB
137 */
138
139#define I82875P_DRC 0x68 /* DRAM Controller Mode (32b)
140 *
141 * 31:30 reserved
142 * 29 init complete
143 * 28:23 reserved
144 * 22:21 nr chan 00=1,01=2
145 * 20 reserved
146 * 19:18 Data Integ Mode 00=none,01=ecc
147 * 17:11 reserved
148 * 10:8 refresh mode
149 * 7 reserved
150 * 6:4 mode select
151 * 3:2 reserved
152 * 1:0 DRAM type 01=DDR
153 */
154
Alan Cox0d88a102006-01-18 17:44:10 -0800155enum i82875p_chips {
156 I82875P = 0,
157};
158
Alan Cox0d88a102006-01-18 17:44:10 -0800159struct i82875p_pvt {
160 struct pci_dev *ovrfl_pdev;
Al Viro6d573482006-02-01 06:10:08 -0500161 void __iomem *ovrfl_window;
Alan Cox0d88a102006-01-18 17:44:10 -0800162};
163
Alan Cox0d88a102006-01-18 17:44:10 -0800164struct i82875p_dev_info {
165 const char *ctl_name;
166};
167
Alan Cox0d88a102006-01-18 17:44:10 -0800168struct i82875p_error_info {
169 u16 errsts;
170 u32 eap;
171 u8 des;
172 u8 derrsyn;
173 u16 errsts2;
174};
175
Alan Cox0d88a102006-01-18 17:44:10 -0800176static const struct i82875p_dev_info i82875p_devs[] = {
177 [I82875P] = {
Douglas Thompson052dfb42007-07-19 01:50:13 -0700178 .ctl_name = "i82875p"},
Alan Cox0d88a102006-01-18 17:44:10 -0800179};
180
Douglas Thompsonf0440912007-07-19 01:50:19 -0700181static struct pci_dev *mci_pdev; /* init dev: in case that AGP code has
Dave Petersone7ecd892006-03-26 01:38:52 -0800182 * already registered driver
183 */
184
Dave Jiang456a2f92007-07-19 01:50:10 -0700185static struct edac_pci_ctl_info *i82875p_pci;
186
Dave Petersone7ecd892006-03-26 01:38:52 -0800187static void i82875p_get_error_info(struct mem_ctl_info *mci,
Douglas Thompson052dfb42007-07-19 01:50:13 -0700188 struct i82875p_error_info *info)
Alan Cox0d88a102006-01-18 17:44:10 -0800189{
Doug Thompson37f04582006-06-30 01:56:07 -0700190 struct pci_dev *pdev;
191
Mauro Carvalho Chehabfd687502012-03-16 07:44:18 -0300192 pdev = to_pci_dev(mci->pdev);
Doug Thompson37f04582006-06-30 01:56:07 -0700193
Alan Cox0d88a102006-01-18 17:44:10 -0800194 /*
195 * This is a mess because there is no atomic way to read all the
196 * registers at once and the registers can transition from CE being
197 * overwritten by UE.
198 */
Doug Thompson37f04582006-06-30 01:56:07 -0700199 pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts);
Jason Uhlenkott654ede22007-07-19 01:50:16 -0700200
201 if (!(info->errsts & 0x0081))
202 return;
203
Doug Thompson37f04582006-06-30 01:56:07 -0700204 pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
205 pci_read_config_byte(pdev, I82875P_DES, &info->des);
206 pci_read_config_byte(pdev, I82875P_DERRSYN, &info->derrsyn);
207 pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts2);
Alan Cox0d88a102006-01-18 17:44:10 -0800208
Alan Cox0d88a102006-01-18 17:44:10 -0800209 /*
210 * If the error is the same then we can for both reads then
211 * the first set of reads is valid. If there is a change then
212 * there is a CE no info and the second set of reads is valid
213 * and should be UE info.
214 */
Alan Cox0d88a102006-01-18 17:44:10 -0800215 if ((info->errsts ^ info->errsts2) & 0x0081) {
Doug Thompson37f04582006-06-30 01:56:07 -0700216 pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
217 pci_read_config_byte(pdev, I82875P_DES, &info->des);
Dave Jiang466b71d2007-07-19 01:50:05 -0700218 pci_read_config_byte(pdev, I82875P_DERRSYN, &info->derrsyn);
Alan Cox0d88a102006-01-18 17:44:10 -0800219 }
Jason Uhlenkott654ede22007-07-19 01:50:16 -0700220
221 pci_write_bits16(pdev, I82875P_ERRSTS, 0x0081, 0x0081);
Alan Cox0d88a102006-01-18 17:44:10 -0800222}
223
Dave Petersone7ecd892006-03-26 01:38:52 -0800224static int i82875p_process_error_info(struct mem_ctl_info *mci,
Douglas Thompson052dfb42007-07-19 01:50:13 -0700225 struct i82875p_error_info *info,
226 int handle_errors)
Alan Cox0d88a102006-01-18 17:44:10 -0800227{
228 int row, multi_chan;
229
Mauro Carvalho Chehabde3910eb2012-04-24 15:05:43 -0300230 multi_chan = mci->csrows[0]->nr_channels - 1;
Alan Cox0d88a102006-01-18 17:44:10 -0800231
Jason Uhlenkott654ede22007-07-19 01:50:16 -0700232 if (!(info->errsts & 0x0081))
Alan Cox0d88a102006-01-18 17:44:10 -0800233 return 0;
234
235 if (!handle_errors)
236 return 1;
237
238 if ((info->errsts ^ info->errsts2) & 0x0081) {
Mauro Carvalho Chehab9eb07a72012-06-04 13:27:43 -0300239 edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0,
Mauro Carvalho Chehab0a8a9ac2012-04-16 15:10:43 -0300240 -1, -1, -1,
Mauro Carvalho Chehab03f7eae2012-06-04 11:29:25 -0300241 "UE overwrote CE", "");
Alan Cox0d88a102006-01-18 17:44:10 -0800242 info->errsts = info->errsts2;
243 }
244
245 info->eap >>= PAGE_SHIFT;
246 row = edac_mc_find_csrow_by_page(mci, info->eap);
247
248 if (info->errsts & 0x0080)
Mauro Carvalho Chehab9eb07a72012-06-04 13:27:43 -0300249 edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
Mauro Carvalho Chehab0a8a9ac2012-04-16 15:10:43 -0300250 info->eap, 0, 0,
251 row, -1, -1,
Mauro Carvalho Chehab03f7eae2012-06-04 11:29:25 -0300252 "i82875p UE", "");
Alan Cox0d88a102006-01-18 17:44:10 -0800253 else
Mauro Carvalho Chehab9eb07a72012-06-04 13:27:43 -0300254 edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
Mauro Carvalho Chehab0a8a9ac2012-04-16 15:10:43 -0300255 info->eap, 0, info->derrsyn,
256 row, multi_chan ? (info->des & 0x1) : 0,
Mauro Carvalho Chehab03f7eae2012-06-04 11:29:25 -0300257 -1, "i82875p CE", "");
Alan Cox0d88a102006-01-18 17:44:10 -0800258
259 return 1;
260}
261
Alan Cox0d88a102006-01-18 17:44:10 -0800262static void i82875p_check(struct mem_ctl_info *mci)
263{
264 struct i82875p_error_info info;
265
Joe Perches956b9ba2012-04-29 17:08:39 -0300266 edac_dbg(1, "MC%d\n", mci->mc_idx);
Alan Cox0d88a102006-01-18 17:44:10 -0800267 i82875p_get_error_info(mci, &info);
268 i82875p_process_error_info(mci, &info, 1);
269}
270
Doug Thompson13189522006-06-30 01:56:08 -0700271/* Return 0 on success or 1 on failure. */
272static int i82875p_setup_overfl_dev(struct pci_dev *pdev,
Douglas Thompson052dfb42007-07-19 01:50:13 -0700273 struct pci_dev **ovrfl_pdev,
274 void __iomem **ovrfl_window)
Alan Cox0d88a102006-01-18 17:44:10 -0800275{
Doug Thompson13189522006-06-30 01:56:08 -0700276 struct pci_dev *dev;
277 void __iomem *window;
Douglas Thompson1c521522007-07-19 01:50:17 -0700278 int err;
Alan Cox0d88a102006-01-18 17:44:10 -0800279
Doug Thompson13189522006-06-30 01:56:08 -0700280 *ovrfl_pdev = NULL;
281 *ovrfl_window = NULL;
282 dev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
Alan Cox0d88a102006-01-18 17:44:10 -0800283
Doug Thompson13189522006-06-30 01:56:08 -0700284 if (dev == NULL) {
285 /* Intel tells BIOS developers to hide device 6 which
Alan Cox0d88a102006-01-18 17:44:10 -0800286 * configures the overflow device access containing
287 * the DRBs - this is where we expose device 6.
288 * http://www.x86-secret.com/articles/tweak/pat/patsecrets-2.htm
289 */
290 pci_write_bits8(pdev, 0xf4, 0x2, 0x2);
Doug Thompson13189522006-06-30 01:56:08 -0700291 dev = pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
Dave Petersone7ecd892006-03-26 01:38:52 -0800292
Doug Thompson13189522006-06-30 01:56:08 -0700293 if (dev == NULL)
294 return 1;
John Feeney62456726d2007-05-08 00:28:12 -0700295
Douglas Thompson1c521522007-07-19 01:50:17 -0700296 err = pci_bus_add_device(dev);
297 if (err) {
298 i82875p_printk(KERN_ERR,
299 "%s(): pci_bus_add_device() Failed\n",
300 __func__);
301 }
Jarkko Lavinen307d1142008-12-01 13:14:06 -0800302 pci_bus_assign_resources(dev->bus);
Alan Cox0d88a102006-01-18 17:44:10 -0800303 }
Dave Petersone7ecd892006-03-26 01:38:52 -0800304
Doug Thompson13189522006-06-30 01:56:08 -0700305 *ovrfl_pdev = dev;
306
Doug Thompson13189522006-06-30 01:56:08 -0700307 if (pci_enable_device(dev)) {
308 i82875p_printk(KERN_ERR, "%s(): Failed to enable overflow "
Douglas Thompson052dfb42007-07-19 01:50:13 -0700309 "device\n", __func__);
Doug Thompson13189522006-06-30 01:56:08 -0700310 return 1;
Alan Cox0d88a102006-01-18 17:44:10 -0800311 }
312
Doug Thompson13189522006-06-30 01:56:08 -0700313 if (pci_request_regions(dev, pci_name(dev))) {
Alan Cox0d88a102006-01-18 17:44:10 -0800314#ifdef CORRECT_BIOS
Dave Peterson637beb62006-03-26 01:38:44 -0800315 goto fail0;
Alan Cox0d88a102006-01-18 17:44:10 -0800316#endif
317 }
Dave Petersone7ecd892006-03-26 01:38:52 -0800318
Alan Cox0d88a102006-01-18 17:44:10 -0800319 /* cache is irrelevant for PCI bus reads/writes */
Arjan van de Ven1dca00bd2009-01-06 14:42:56 -0800320 window = pci_ioremap_bar(dev, 0);
Doug Thompson13189522006-06-30 01:56:08 -0700321 if (window == NULL) {
Dave Peterson537fba22006-03-26 01:38:40 -0800322 i82875p_printk(KERN_ERR, "%s(): Failed to ioremap bar6\n",
Douglas Thompson052dfb42007-07-19 01:50:13 -0700323 __func__);
Dave Peterson637beb62006-03-26 01:38:44 -0800324 goto fail1;
Alan Cox0d88a102006-01-18 17:44:10 -0800325 }
326
Doug Thompson13189522006-06-30 01:56:08 -0700327 *ovrfl_window = window;
328 return 0;
329
Douglas Thompson052dfb42007-07-19 01:50:13 -0700330fail1:
Doug Thompson13189522006-06-30 01:56:08 -0700331 pci_release_regions(dev);
332
333#ifdef CORRECT_BIOS
Douglas Thompson052dfb42007-07-19 01:50:13 -0700334fail0:
Doug Thompson13189522006-06-30 01:56:08 -0700335 pci_disable_device(dev);
336#endif
337 /* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
338 return 1;
339}
340
Doug Thompson13189522006-06-30 01:56:08 -0700341/* Return 1 if dual channel mode is active. Else return 0. */
342static inline int dual_channel_active(u32 drc)
343{
344 return (drc >> 21) & 0x1;
345}
346
Doug Thompson13189522006-06-30 01:56:08 -0700347static void i82875p_init_csrows(struct mem_ctl_info *mci,
Dave Jiang466b71d2007-07-19 01:50:05 -0700348 struct pci_dev *pdev,
349 void __iomem * ovrfl_window, u32 drc)
Doug Thompson13189522006-06-30 01:56:08 -0700350{
351 struct csrow_info *csrow;
Mauro Carvalho Chehab084a4fc2012-01-27 18:38:08 -0300352 struct dimm_info *dimm;
353 unsigned nr_chans = dual_channel_active(drc) + 1;
Doug Thompson13189522006-06-30 01:56:08 -0700354 unsigned long last_cumul_size;
355 u8 value;
Dave Jiang466b71d2007-07-19 01:50:05 -0700356 u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
Mauro Carvalho Chehaba895bf82012-01-28 09:09:38 -0300357 u32 cumul_size, nr_pages;
Mauro Carvalho Chehab084a4fc2012-01-27 18:38:08 -0300358 int index, j;
Alan Cox0d88a102006-01-18 17:44:10 -0800359
Dave Petersone7ecd892006-03-26 01:38:52 -0800360 drc_ddim = (drc >> 18) & 0x1;
Doug Thompson13189522006-06-30 01:56:08 -0700361 last_cumul_size = 0;
362
363 /* The dram row boundary (DRB) reg values are boundary address
364 * for each DRAM row with a granularity of 32 or 64MB (single/dual
365 * channel operation). DRB regs are cumulative; therefore DRB7 will
366 * contain the total memory contained in all eight rows.
367 */
368
369 for (index = 0; index < mci->nr_csrows; index++) {
Mauro Carvalho Chehabde3910eb2012-04-24 15:05:43 -0300370 csrow = mci->csrows[index];
Doug Thompson13189522006-06-30 01:56:08 -0700371
372 value = readb(ovrfl_window + I82875P_DRB + index);
373 cumul_size = value << (I82875P_DRB_SHIFT - PAGE_SHIFT);
Joe Perches956b9ba2012-04-29 17:08:39 -0300374 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size);
Doug Thompson13189522006-06-30 01:56:08 -0700375 if (cumul_size == last_cumul_size)
376 continue; /* not populated */
377
378 csrow->first_page = last_cumul_size;
379 csrow->last_page = cumul_size - 1;
Mauro Carvalho Chehaba895bf82012-01-28 09:09:38 -0300380 nr_pages = cumul_size - last_cumul_size;
Doug Thompson13189522006-06-30 01:56:08 -0700381 last_cumul_size = cumul_size;
Mauro Carvalho Chehab084a4fc2012-01-27 18:38:08 -0300382
383 for (j = 0; j < nr_chans; j++) {
Mauro Carvalho Chehabde3910eb2012-04-24 15:05:43 -0300384 dimm = csrow->channels[j]->dimm;
Mauro Carvalho Chehab084a4fc2012-01-27 18:38:08 -0300385
Mauro Carvalho Chehaba895bf82012-01-28 09:09:38 -0300386 dimm->nr_pages = nr_pages / nr_chans;
Mauro Carvalho Chehab084a4fc2012-01-27 18:38:08 -0300387 dimm->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */
388 dimm->mtype = MEM_DDR;
389 dimm->dtype = DEV_UNKNOWN;
390 dimm->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;
391 }
Doug Thompson13189522006-06-30 01:56:08 -0700392 }
393}
394
395static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
396{
397 int rc = -ENODEV;
398 struct mem_ctl_info *mci;
Mauro Carvalho Chehab0a8a9ac2012-04-16 15:10:43 -0300399 struct edac_mc_layer layers[2];
Doug Thompson13189522006-06-30 01:56:08 -0700400 struct i82875p_pvt *pvt;
401 struct pci_dev *ovrfl_pdev;
402 void __iomem *ovrfl_window;
403 u32 drc;
404 u32 nr_chans;
405 struct i82875p_error_info discard;
406
Joe Perches956b9ba2012-04-29 17:08:39 -0300407 edac_dbg(0, "\n");
Hitoshi Mitakec3c52bc2008-04-29 01:03:18 -0700408
Doug Thompson13189522006-06-30 01:56:08 -0700409 ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
410
411 if (i82875p_setup_overfl_dev(pdev, &ovrfl_pdev, &ovrfl_window))
412 return -ENODEV;
413 drc = readl(ovrfl_window + I82875P_DRC);
414 nr_chans = dual_channel_active(drc) + 1;
Alan Cox0d88a102006-01-18 17:44:10 -0800415
Mauro Carvalho Chehab0a8a9ac2012-04-16 15:10:43 -0300416 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
417 layers[0].size = I82875P_NR_CSROWS(nr_chans);
418 layers[0].is_virt_csrow = true;
419 layers[1].type = EDAC_MC_LAYER_CHANNEL;
420 layers[1].size = nr_chans;
421 layers[1].is_virt_csrow = false;
Mauro Carvalho Chehabca0907b2012-05-02 14:37:00 -0300422 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));
Alan Cox0d88a102006-01-18 17:44:10 -0800423 if (!mci) {
424 rc = -ENOMEM;
Doug Thompson13189522006-06-30 01:56:08 -0700425 goto fail0;
Alan Cox0d88a102006-01-18 17:44:10 -0800426 }
427
Joe Perches956b9ba2012-04-29 17:08:39 -0300428 edac_dbg(3, "init mci\n");
Mauro Carvalho Chehabfd687502012-03-16 07:44:18 -0300429 mci->pdev = &pdev->dev;
Alan Cox0d88a102006-01-18 17:44:10 -0800430 mci->mtype_cap = MEM_FLAG_DDR;
Alan Cox0d88a102006-01-18 17:44:10 -0800431 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
432 mci->edac_cap = EDAC_FLAG_UNKNOWN;
Dave Peterson680cbbb2006-03-26 01:38:41 -0800433 mci->mod_name = EDAC_MOD_STR;
Doug Thompson37f04582006-06-30 01:56:07 -0700434 mci->mod_ver = I82875P_REVISION;
Alan Cox0d88a102006-01-18 17:44:10 -0800435 mci->ctl_name = i82875p_devs[dev_idx].ctl_name;
Dave Jiangc4192702007-07-19 01:49:47 -0700436 mci->dev_name = pci_name(pdev);
Alan Cox0d88a102006-01-18 17:44:10 -0800437 mci->edac_check = i82875p_check;
438 mci->ctl_page_to_phys = NULL;
Joe Perches956b9ba2012-04-29 17:08:39 -0300439 edac_dbg(3, "init pvt\n");
Dave Jiang466b71d2007-07-19 01:50:05 -0700440 pvt = (struct i82875p_pvt *)mci->pvt_info;
Alan Cox0d88a102006-01-18 17:44:10 -0800441 pvt->ovrfl_pdev = ovrfl_pdev;
442 pvt->ovrfl_window = ovrfl_window;
Doug Thompson13189522006-06-30 01:56:08 -0700443 i82875p_init_csrows(mci, pdev, ovrfl_window, drc);
Dave Jiang466b71d2007-07-19 01:50:05 -0700444 i82875p_get_error_info(mci, &discard); /* clear counters */
Alan Cox0d88a102006-01-18 17:44:10 -0800445
Doug Thompson2d7bbb92006-06-30 01:56:08 -0700446 /* Here we assume that we will never see multiple instances of this
447 * type of memory controller. The ID is therefore hardcoded to 0.
448 */
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700449 if (edac_mc_add_mc(mci)) {
Joe Perches956b9ba2012-04-29 17:08:39 -0300450 edac_dbg(3, "failed edac_mc_add_mc()\n");
Doug Thompson13189522006-06-30 01:56:08 -0700451 goto fail1;
Alan Cox0d88a102006-01-18 17:44:10 -0800452 }
453
Dave Jiang456a2f92007-07-19 01:50:10 -0700454 /* allocating generic PCI control info */
455 i82875p_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
456 if (!i82875p_pci) {
457 printk(KERN_WARNING
458 "%s(): Unable to create PCI control\n",
459 __func__);
460 printk(KERN_WARNING
461 "%s(): PCI error report via EDAC not setup\n",
462 __func__);
463 }
464
Alan Cox0d88a102006-01-18 17:44:10 -0800465 /* get this far and it's successful */
Joe Perches956b9ba2012-04-29 17:08:39 -0300466 edac_dbg(3, "success\n");
Alan Cox0d88a102006-01-18 17:44:10 -0800467 return 0;
468
Douglas Thompson052dfb42007-07-19 01:50:13 -0700469fail1:
Dave Peterson637beb62006-03-26 01:38:44 -0800470 edac_mc_free(mci);
Alan Cox0d88a102006-01-18 17:44:10 -0800471
Douglas Thompson052dfb42007-07-19 01:50:13 -0700472fail0:
Dave Peterson637beb62006-03-26 01:38:44 -0800473 iounmap(ovrfl_window);
Dave Peterson637beb62006-03-26 01:38:44 -0800474 pci_release_regions(ovrfl_pdev);
Alan Cox0d88a102006-01-18 17:44:10 -0800475
Dave Peterson637beb62006-03-26 01:38:44 -0800476 pci_disable_device(ovrfl_pdev);
Alan Cox0d88a102006-01-18 17:44:10 -0800477 /* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
478 return rc;
479}
480
Alan Cox0d88a102006-01-18 17:44:10 -0800481/* returns count (>= 0), or negative on error */
Greg Kroah-Hartman9b3c6e82012-12-21 13:23:51 -0800482static int i82875p_init_one(struct pci_dev *pdev,
483 const struct pci_device_id *ent)
Alan Cox0d88a102006-01-18 17:44:10 -0800484{
485 int rc;
486
Joe Perches956b9ba2012-04-29 17:08:39 -0300487 edac_dbg(0, "\n");
Dave Peterson537fba22006-03-26 01:38:40 -0800488 i82875p_printk(KERN_INFO, "i82875p init one\n");
Dave Petersone7ecd892006-03-26 01:38:52 -0800489
490 if (pci_enable_device(pdev) < 0)
Alan Cox0d88a102006-01-18 17:44:10 -0800491 return -EIO;
Dave Petersone7ecd892006-03-26 01:38:52 -0800492
Alan Cox0d88a102006-01-18 17:44:10 -0800493 rc = i82875p_probe1(pdev, ent->driver_data);
Dave Petersone7ecd892006-03-26 01:38:52 -0800494
Alan Cox0d88a102006-01-18 17:44:10 -0800495 if (mci_pdev == NULL)
496 mci_pdev = pci_dev_get(pdev);
Dave Petersone7ecd892006-03-26 01:38:52 -0800497
Alan Cox0d88a102006-01-18 17:44:10 -0800498 return rc;
499}
500
Greg Kroah-Hartman9b3c6e82012-12-21 13:23:51 -0800501static void i82875p_remove_one(struct pci_dev *pdev)
Alan Cox0d88a102006-01-18 17:44:10 -0800502{
503 struct mem_ctl_info *mci;
504 struct i82875p_pvt *pvt = NULL;
505
Joe Perches956b9ba2012-04-29 17:08:39 -0300506 edac_dbg(0, "\n");
Alan Cox0d88a102006-01-18 17:44:10 -0800507
Dave Jiang456a2f92007-07-19 01:50:10 -0700508 if (i82875p_pci)
509 edac_pci_release_generic_ctl(i82875p_pci);
510
Doug Thompson37f04582006-06-30 01:56:07 -0700511 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
Alan Cox0d88a102006-01-18 17:44:10 -0800512 return;
513
Dave Jiang466b71d2007-07-19 01:50:05 -0700514 pvt = (struct i82875p_pvt *)mci->pvt_info;
Dave Petersone7ecd892006-03-26 01:38:52 -0800515
Alan Cox0d88a102006-01-18 17:44:10 -0800516 if (pvt->ovrfl_window)
517 iounmap(pvt->ovrfl_window);
518
519 if (pvt->ovrfl_pdev) {
520#ifdef CORRECT_BIOS
521 pci_release_regions(pvt->ovrfl_pdev);
522#endif /*CORRECT_BIOS */
523 pci_disable_device(pvt->ovrfl_pdev);
524 pci_dev_put(pvt->ovrfl_pdev);
525 }
526
Alan Cox0d88a102006-01-18 17:44:10 -0800527 edac_mc_free(mci);
528}
529
Lionel Debroux36c46f32012-02-27 07:41:47 +0100530static DEFINE_PCI_DEVICE_TABLE(i82875p_pci_tbl) = {
Dave Petersone7ecd892006-03-26 01:38:52 -0800531 {
Dave Jiang466b71d2007-07-19 01:50:05 -0700532 PCI_VEND_DEV(INTEL, 82875_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
533 I82875P},
Dave Petersone7ecd892006-03-26 01:38:52 -0800534 {
Dave Jiang466b71d2007-07-19 01:50:05 -0700535 0,
536 } /* 0 terminated list. */
Alan Cox0d88a102006-01-18 17:44:10 -0800537};
538
539MODULE_DEVICE_TABLE(pci, i82875p_pci_tbl);
540
Alan Cox0d88a102006-01-18 17:44:10 -0800541static struct pci_driver i82875p_driver = {
Dave Peterson680cbbb2006-03-26 01:38:41 -0800542 .name = EDAC_MOD_STR,
Alan Cox0d88a102006-01-18 17:44:10 -0800543 .probe = i82875p_init_one,
Greg Kroah-Hartman9b3c6e82012-12-21 13:23:51 -0800544 .remove = i82875p_remove_one,
Alan Cox0d88a102006-01-18 17:44:10 -0800545 .id_table = i82875p_pci_tbl,
546};
547
Alan Coxda9bb1d2006-01-18 17:44:13 -0800548static int __init i82875p_init(void)
Alan Cox0d88a102006-01-18 17:44:10 -0800549{
550 int pci_rc;
551
Joe Perches956b9ba2012-04-29 17:08:39 -0300552 edac_dbg(3, "\n");
Hitoshi Mitakec3c52bc2008-04-29 01:03:18 -0700553
554 /* Ensure that the OPSTATE is set correctly for POLL or NMI */
555 opstate_init();
556
Alan Cox0d88a102006-01-18 17:44:10 -0800557 pci_rc = pci_register_driver(&i82875p_driver);
Dave Petersone7ecd892006-03-26 01:38:52 -0800558
Alan Cox0d88a102006-01-18 17:44:10 -0800559 if (pci_rc < 0)
Dave Peterson637beb62006-03-26 01:38:44 -0800560 goto fail0;
Dave Petersone7ecd892006-03-26 01:38:52 -0800561
Alan Cox0d88a102006-01-18 17:44:10 -0800562 if (mci_pdev == NULL) {
Dave Petersone7ecd892006-03-26 01:38:52 -0800563 mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
Douglas Thompson052dfb42007-07-19 01:50:13 -0700564 PCI_DEVICE_ID_INTEL_82875_0, NULL);
Dave Petersone7ecd892006-03-26 01:38:52 -0800565
Alan Cox0d88a102006-01-18 17:44:10 -0800566 if (!mci_pdev) {
Joe Perches956b9ba2012-04-29 17:08:39 -0300567 edac_dbg(0, "875p pci_get_device fail\n");
Dave Peterson637beb62006-03-26 01:38:44 -0800568 pci_rc = -ENODEV;
569 goto fail1;
Alan Cox0d88a102006-01-18 17:44:10 -0800570 }
Dave Petersone7ecd892006-03-26 01:38:52 -0800571
Alan Cox0d88a102006-01-18 17:44:10 -0800572 pci_rc = i82875p_init_one(mci_pdev, i82875p_pci_tbl);
Dave Petersone7ecd892006-03-26 01:38:52 -0800573
Alan Cox0d88a102006-01-18 17:44:10 -0800574 if (pci_rc < 0) {
Joe Perches956b9ba2012-04-29 17:08:39 -0300575 edac_dbg(0, "875p init fail\n");
Dave Peterson637beb62006-03-26 01:38:44 -0800576 pci_rc = -ENODEV;
577 goto fail1;
Alan Cox0d88a102006-01-18 17:44:10 -0800578 }
579 }
Dave Petersone7ecd892006-03-26 01:38:52 -0800580
Alan Cox0d88a102006-01-18 17:44:10 -0800581 return 0;
Dave Peterson637beb62006-03-26 01:38:44 -0800582
Douglas Thompson052dfb42007-07-19 01:50:13 -0700583fail1:
Dave Peterson637beb62006-03-26 01:38:44 -0800584 pci_unregister_driver(&i82875p_driver);
585
Douglas Thompson052dfb42007-07-19 01:50:13 -0700586fail0:
Dave Peterson637beb62006-03-26 01:38:44 -0800587 if (mci_pdev != NULL)
588 pci_dev_put(mci_pdev);
589
590 return pci_rc;
Alan Cox0d88a102006-01-18 17:44:10 -0800591}
592
Alan Cox0d88a102006-01-18 17:44:10 -0800593static void __exit i82875p_exit(void)
594{
Joe Perches956b9ba2012-04-29 17:08:39 -0300595 edac_dbg(3, "\n");
Alan Cox0d88a102006-01-18 17:44:10 -0800596
Jarkko Lavinen09a81262008-12-01 13:14:08 -0800597 i82875p_remove_one(mci_pdev);
598 pci_dev_put(mci_pdev);
599
Alan Cox0d88a102006-01-18 17:44:10 -0800600 pci_unregister_driver(&i82875p_driver);
Dave Petersone7ecd892006-03-26 01:38:52 -0800601
Alan Cox0d88a102006-01-18 17:44:10 -0800602}
603
Alan Cox0d88a102006-01-18 17:44:10 -0800604module_init(i82875p_init);
605module_exit(i82875p_exit);
606
Alan Cox0d88a102006-01-18 17:44:10 -0800607MODULE_LICENSE("GPL");
608MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh");
609MODULE_DESCRIPTION("MC support for Intel 82875 memory hub controllers");
Hitoshi Mitakec3c52bc2008-04-29 01:03:18 -0700610
611module_param(edac_op_state, int, 0444);
612MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");