Jean-Christop PLAGNIOL-VILLARD | 6d803ba | 2010-11-17 10:04:33 +0100 | [diff] [blame] | 1 | |
| 2 | config CLKDEV_LOOKUP |
| 3 | bool |
| 4 | select HAVE_CLK |
Kyungmin Park | aa3831c | 2011-07-18 16:34:54 +0900 | [diff] [blame] | 5 | |
Shawn Guo | 5c77f56 | 2011-12-20 14:46:38 +0800 | [diff] [blame] | 6 | config HAVE_CLK_PREPARE |
| 7 | bool |
| 8 | |
Kyungmin Park | aa3831c | 2011-07-18 16:34:54 +0900 | [diff] [blame] | 9 | config HAVE_MACH_CLKDEV |
| 10 | bool |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 11 | |
Arnd Bergmann | 8fb61e3 | 2012-03-17 21:10:51 +0000 | [diff] [blame] | 12 | config COMMON_CLK |
| 13 | bool |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 14 | select HAVE_CLK_PREPARE |
Rob Herring | 01033be | 2012-04-09 15:24:58 -0500 | [diff] [blame] | 15 | select CLKDEV_LOOKUP |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 16 | ---help--- |
| 17 | The common clock framework is a single definition of struct |
| 18 | clk, useful across many platforms, as well as an |
| 19 | implementation of the clock API in include/linux/clk.h. |
| 20 | Architectures utilizing the common struct clk should select |
Arnd Bergmann | 8fb61e3 | 2012-03-17 21:10:51 +0000 | [diff] [blame] | 21 | this option. |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 22 | |
Arnd Bergmann | 8fb61e3 | 2012-03-17 21:10:51 +0000 | [diff] [blame] | 23 | menu "Common Clock Framework" |
| 24 | depends on COMMON_CLK |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 25 | |
Mark Brown | f05259a | 2012-05-17 10:04:57 +0100 | [diff] [blame] | 26 | config COMMON_CLK_WM831X |
| 27 | tristate "Clock driver for WM831x/2x PMICs" |
| 28 | depends on MFD_WM831X |
| 29 | ---help--- |
| 30 | Supports the clocking subsystem of the WM831x/2x series of |
| 31 | PMICs from Wolfson Microlectronics. |
| 32 | |
Linus Walleij | f9a6aa4 | 2012-08-06 18:32:08 +0200 | [diff] [blame] | 33 | config COMMON_CLK_VERSATILE |
Linus Walleij | 672575e | 2012-08-30 19:39:00 +0200 | [diff] [blame] | 34 | bool "Clock driver for ARM Reference designs" |
Pawel Moll | c7f6e2d | 2013-06-10 16:05:07 +0100 | [diff] [blame] | 35 | depends on ARCH_INTEGRATOR || ARCH_REALVIEW || ARCH_VEXPRESS || ARM64 |
Linus Walleij | f9a6aa4 | 2012-08-06 18:32:08 +0200 | [diff] [blame] | 36 | ---help--- |
Pawel Moll | bcd6f56 | 2012-09-18 15:17:48 +0100 | [diff] [blame] | 37 | Supports clocking on ARM Reference designs: |
| 38 | - Integrator/AP and Integrator/CP |
| 39 | - RealView PB1176, EB, PB11MP and PBX |
| 40 | - Versatile Express |
Linus Walleij | f9a6aa4 | 2012-08-06 18:32:08 +0200 | [diff] [blame] | 41 | |
Jonghwa Lee | 73118e6 | 2012-08-28 17:54:28 +0900 | [diff] [blame] | 42 | config COMMON_CLK_MAX77686 |
| 43 | tristate "Clock driver for Maxim 77686 MFD" |
| 44 | depends on MFD_MAX77686 |
| 45 | ---help--- |
| 46 | This driver supports Maxim 77686 crystal oscillator clock. |
| 47 | |
Sebastian Hesselbarth | 9abd5f0 | 2013-04-11 21:42:29 +0200 | [diff] [blame] | 48 | config COMMON_CLK_SI5351 |
| 49 | tristate "Clock driver for SiLabs 5351A/B/C" |
| 50 | depends on I2C |
| 51 | select REGMAP_I2C |
| 52 | select RATIONAL |
| 53 | ---help--- |
| 54 | This driver supports Silicon Labs 5351A/B/C programmable clock |
| 55 | generators. |
| 56 | |
Soren Brinkmann | 1459c83 | 2013-09-21 16:40:39 -0700 | [diff] [blame] | 57 | config COMMON_CLK_SI570 |
| 58 | tristate "Clock driver for SiLabs 570 and compatible devices" |
| 59 | depends on I2C |
| 60 | depends on OF |
| 61 | select REGMAP_I2C |
| 62 | help |
| 63 | ---help--- |
| 64 | This driver supports Silicon Labs 570/571/598/599 programmable |
| 65 | clock generators. |
| 66 | |
Yadwinder Singh Brar | 7cc560d | 2013-07-07 17:14:20 +0530 | [diff] [blame] | 67 | config COMMON_CLK_S2MPS11 |
Tushar Behera | e8e6b84 | 2013-12-26 15:48:59 +0530 | [diff] [blame] | 68 | tristate "Clock driver for S2MPS11/S5M8767 MFD" |
Yadwinder Singh Brar | 7cc560d | 2013-07-07 17:14:20 +0530 | [diff] [blame] | 69 | depends on MFD_SEC_CORE |
| 70 | ---help--- |
Tushar Behera | e8e6b84 | 2013-12-26 15:48:59 +0530 | [diff] [blame] | 71 | This driver supports S2MPS11/S5M8767 crystal oscillator clock. These |
| 72 | multi-function devices have 3 fixed-rate oscillators, clocked at |
| 73 | 32KHz each. |
Yadwinder Singh Brar | 7cc560d | 2013-07-07 17:14:20 +0530 | [diff] [blame] | 74 | |
Peter Ujfalusi | f9f8c04 | 2012-09-14 17:30:27 +0300 | [diff] [blame] | 75 | config CLK_TWL6040 |
| 76 | tristate "External McPDM functional clock from twl6040" |
| 77 | depends on TWL6040_CORE |
| 78 | ---help--- |
| 79 | Enable the external functional clock support on OMAP4+ platforms for |
| 80 | McPDM. McPDM module is using the external bit clock on the McPDM bus |
| 81 | as functional clock. |
| 82 | |
Lars-Peter Clausen | 0e646c5 | 2013-03-11 16:22:29 +0100 | [diff] [blame] | 83 | config COMMON_CLK_AXI_CLKGEN |
| 84 | tristate "AXI clkgen driver" |
| 85 | depends on ARCH_ZYNQ || MICROBLAZE |
| 86 | help |
| 87 | ---help--- |
| 88 | Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx |
| 89 | FPGAs. It is commonly used in Analog Devices' reference designs. |
| 90 | |
Tang Yuantian | 555eae9 | 2013-04-09 16:46:26 +0800 | [diff] [blame] | 91 | config CLK_PPC_CORENET |
| 92 | bool "Clock driver for PowerPC corenet platforms" |
| 93 | depends on PPC_E500MC && OF |
| 94 | ---help--- |
| 95 | This adds the clock driver support for Freescale PowerPC corenet |
| 96 | platforms using common clock framework. |
| 97 | |
Loc Ho | 308964c | 2013-06-26 11:56:09 -0600 | [diff] [blame] | 98 | config COMMON_CLK_XGENE |
| 99 | bool "Clock driver for APM XGene SoC" |
| 100 | default y |
| 101 | depends on ARM64 |
| 102 | ---help--- |
| 103 | Sypport for the APM X-Gene SoC reference, PLL, and device clocks. |
| 104 | |
Santosh Shilimkar | 6cfc229 | 2013-09-25 21:18:15 -0400 | [diff] [blame] | 105 | config COMMON_CLK_KEYSTONE |
| 106 | tristate "Clock drivers for Keystone based SOCs" |
| 107 | depends on ARCH_KEYSTONE && OF |
| 108 | ---help--- |
| 109 | Supports clock drivers for Keystone based SOCs. These SOCs have local |
| 110 | a power sleep control module that gate the clock to the IPs and PLLs. |
| 111 | |
Stephen Boyd | 085d7a4 | 2014-01-15 10:47:23 -0800 | [diff] [blame] | 112 | source "drivers/clk/qcom/Kconfig" |
| 113 | |
Arnd Bergmann | 8fb61e3 | 2012-03-17 21:10:51 +0000 | [diff] [blame] | 114 | endmenu |
Sebastian Hesselbarth | 97fa4cf | 2012-11-17 15:22:22 +0100 | [diff] [blame] | 115 | |
Alex Elder | 1f27f15 | 2014-02-14 12:29:18 -0600 | [diff] [blame] | 116 | source "drivers/clk/bcm/Kconfig" |
Sebastian Hesselbarth | 97fa4cf | 2012-11-17 15:22:22 +0100 | [diff] [blame] | 117 | source "drivers/clk/mvebu/Kconfig" |
Pankaj Dubey | 4ce9b85 | 2014-05-08 13:07:08 +0900 | [diff] [blame^] | 118 | |
| 119 | source "drivers/clk/samsung/Kconfig" |