Divy Le Ray | 4d22de3 | 2007-01-18 22:04:14 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. |
| 3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. |
| 4 | * |
| 5 | * This software is available to you under a choice of one of two |
| 6 | * licenses. You may choose to be licensed under the terms of the GNU |
| 7 | * General Public License (GPL) Version 2, available from the file |
| 8 | * COPYING in the main directory of this source tree, or the |
| 9 | * OpenIB.org BSD license below: |
| 10 | * |
| 11 | * Redistribution and use in source and binary forms, with or |
| 12 | * without modification, are permitted provided that the following |
| 13 | * conditions are met: |
| 14 | * |
| 15 | * - Redistributions of source code must retain the above |
| 16 | * copyright notice, this list of conditions and the following |
| 17 | * disclaimer. |
| 18 | * |
| 19 | * - Redistributions in binary form must reproduce the above |
| 20 | * copyright notice, this list of conditions and the following |
| 21 | * disclaimer in the documentation and/or other materials |
| 22 | * provided with the distribution. |
| 23 | * |
| 24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 31 | * SOFTWARE. |
| 32 | */ |
| 33 | #ifndef _CHELSIO_L2T_H |
| 34 | #define _CHELSIO_L2T_H |
| 35 | |
| 36 | #include <linux/spinlock.h> |
| 37 | #include "t3cdev.h" |
| 38 | #include <asm/atomic.h> |
| 39 | |
| 40 | enum { |
| 41 | L2T_STATE_VALID, /* entry is up to date */ |
| 42 | L2T_STATE_STALE, /* entry may be used but needs revalidation */ |
| 43 | L2T_STATE_RESOLVING, /* entry needs address resolution */ |
| 44 | L2T_STATE_UNUSED /* entry not in use */ |
| 45 | }; |
| 46 | |
| 47 | struct neighbour; |
| 48 | struct sk_buff; |
| 49 | |
| 50 | /* |
| 51 | * Each L2T entry plays multiple roles. First of all, it keeps state for the |
| 52 | * corresponding entry of the HW L2 table and maintains a queue of offload |
| 53 | * packets awaiting address resolution. Second, it is a node of a hash table |
| 54 | * chain, where the nodes of the chain are linked together through their next |
| 55 | * pointer. Finally, each node is a bucket of a hash table, pointing to the |
| 56 | * first element in its chain through its first pointer. |
| 57 | */ |
| 58 | struct l2t_entry { |
| 59 | u16 state; /* entry state */ |
| 60 | u16 idx; /* entry index */ |
| 61 | u32 addr; /* dest IP address */ |
| 62 | int ifindex; /* neighbor's net_device's ifindex */ |
| 63 | u16 smt_idx; /* SMT index */ |
| 64 | u16 vlan; /* VLAN TCI (id: bits 0-11, prio: 13-15 */ |
| 65 | struct neighbour *neigh; /* associated neighbour */ |
| 66 | struct l2t_entry *first; /* start of hash chain */ |
| 67 | struct l2t_entry *next; /* next l2t_entry on chain */ |
| 68 | struct sk_buff *arpq_head; /* queue of packets awaiting resolution */ |
| 69 | struct sk_buff *arpq_tail; |
| 70 | spinlock_t lock; |
| 71 | atomic_t refcnt; /* entry reference count */ |
| 72 | u8 dmac[6]; /* neighbour's MAC address */ |
| 73 | }; |
| 74 | |
| 75 | struct l2t_data { |
| 76 | unsigned int nentries; /* number of entries */ |
| 77 | struct l2t_entry *rover; /* starting point for next allocation */ |
| 78 | atomic_t nfree; /* number of free entries */ |
| 79 | rwlock_t lock; |
| 80 | struct l2t_entry l2tab[0]; |
| 81 | }; |
| 82 | |
| 83 | typedef void (*arp_failure_handler_func)(struct t3cdev * dev, |
| 84 | struct sk_buff * skb); |
| 85 | |
| 86 | /* |
| 87 | * Callback stored in an skb to handle address resolution failure. |
| 88 | */ |
| 89 | struct l2t_skb_cb { |
| 90 | arp_failure_handler_func arp_failure_handler; |
| 91 | }; |
| 92 | |
| 93 | #define L2T_SKB_CB(skb) ((struct l2t_skb_cb *)(skb)->cb) |
| 94 | |
| 95 | static inline void set_arp_failure_handler(struct sk_buff *skb, |
| 96 | arp_failure_handler_func hnd) |
| 97 | { |
| 98 | L2T_SKB_CB(skb)->arp_failure_handler = hnd; |
| 99 | } |
| 100 | |
| 101 | /* |
| 102 | * Getting to the L2 data from an offload device. |
| 103 | */ |
| 104 | #define L2DATA(dev) ((dev)->l2opt) |
| 105 | |
| 106 | #define W_TCB_L2T_IX 0 |
| 107 | #define S_TCB_L2T_IX 7 |
| 108 | #define M_TCB_L2T_IX 0x7ffULL |
| 109 | #define V_TCB_L2T_IX(x) ((x) << S_TCB_L2T_IX) |
| 110 | |
| 111 | void t3_l2e_free(struct l2t_data *d, struct l2t_entry *e); |
| 112 | void t3_l2t_update(struct t3cdev *dev, struct neighbour *neigh); |
| 113 | struct l2t_entry *t3_l2t_get(struct t3cdev *cdev, struct neighbour *neigh, |
| 114 | struct net_device *dev); |
| 115 | int t3_l2t_send_slow(struct t3cdev *dev, struct sk_buff *skb, |
| 116 | struct l2t_entry *e); |
| 117 | void t3_l2t_send_event(struct t3cdev *dev, struct l2t_entry *e); |
| 118 | struct l2t_data *t3_init_l2t(unsigned int l2t_capacity); |
| 119 | void t3_free_l2t(struct l2t_data *d); |
| 120 | |
| 121 | int cxgb3_ofld_send(struct t3cdev *dev, struct sk_buff *skb); |
| 122 | |
| 123 | static inline int l2t_send(struct t3cdev *dev, struct sk_buff *skb, |
| 124 | struct l2t_entry *e) |
| 125 | { |
| 126 | if (likely(e->state == L2T_STATE_VALID)) |
| 127 | return cxgb3_ofld_send(dev, skb); |
| 128 | return t3_l2t_send_slow(dev, skb, e); |
| 129 | } |
| 130 | |
| 131 | static inline void l2t_release(struct l2t_data *d, struct l2t_entry *e) |
| 132 | { |
| 133 | if (atomic_dec_and_test(&e->refcnt)) |
| 134 | t3_l2e_free(d, e); |
| 135 | } |
| 136 | |
| 137 | static inline void l2t_hold(struct l2t_data *d, struct l2t_entry *e) |
| 138 | { |
| 139 | if (atomic_add_return(1, &e->refcnt) == 1) /* 0 -> 1 transition */ |
| 140 | atomic_dec(&d->nfree); |
| 141 | } |
| 142 | |
| 143 | #endif |