blob: cfe348e1af0eca9316779adbd684834947015441 [file] [log] [blame]
Paul Walmsleyc0718df2011-03-10 22:17:45 -07001/*
2 * OMAP3 Voltage Controller (VC) data
3 *
4 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com>
6 * Lesly A M <x0080970@ti.com>
7 * Thara Gopinath <thara@ti.com>
8 *
9 * Copyright (C) 2008, 2011 Nokia Corporation
10 * Kalle Jokiniemi
11 * Paul Walmsley
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17#include <linux/io.h>
18#include <linux/err.h>
19#include <linux/init.h>
20
21#include <plat/common.h>
22
23#include "prm-regbits-34xx.h"
24#include "voltage.h"
25
26#include "vc.h"
27
28/*
29 * VC data common to 34xx/36xx chips
30 * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
31 */
Kevin Hilmand84adcf2011-03-22 16:14:57 -070032static struct omap_vc_common omap3_vc_common = {
Paul Walmsleyc0718df2011-03-10 22:17:45 -070033 .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
34 .data_shift = OMAP3430_DATA_SHIFT,
35 .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT,
36 .regaddr_shift = OMAP3430_REGADDR_SHIFT,
37 .valid = OMAP3430_VALID_MASK,
38 .cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT,
39 .cmd_on_mask = OMAP3430_VC_CMD_ON_MASK,
40 .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT,
41 .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT,
42 .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT,
Kevin Hilmanf5395482011-03-30 16:36:30 -070043 .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK,
44 .i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET,
45 .i2c_mcode_mask = OMAP3430_MCODE_MASK,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070046};
47
Kevin Hilmand84adcf2011-03-22 16:14:57 -070048struct omap_vc_channel omap3_vc_mpu = {
49 .common = &omap3_vc_common,
Kevin Hilman5876c942011-07-20 16:35:46 -070050 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
51 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
52 .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
53 .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070054 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070055 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070056 .smps_volra_mask = OMAP3430_VOLRA0_MASK,
Kevin Hilmane4e021c2011-06-09 11:01:55 -070057 .smps_cmdra_mask = OMAP3430_CMDRA0_MASK,
Kevin Hilman24d31942011-03-29 15:57:16 -070058 .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070059};
60
Kevin Hilmand84adcf2011-03-22 16:14:57 -070061struct omap_vc_channel omap3_vc_core = {
62 .common = &omap3_vc_common,
Kevin Hilman5876c942011-07-20 16:35:46 -070063 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
64 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
65 .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
66 .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070067 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070068 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070069 .smps_volra_mask = OMAP3430_VOLRA1_MASK,
Kevin Hilmane4e021c2011-06-09 11:01:55 -070070 .smps_cmdra_mask = OMAP3430_CMDRA1_MASK,
Kevin Hilman24d31942011-03-29 15:57:16 -070071 .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT,
Paul Walmsleyc0718df2011-03-10 22:17:45 -070072};