blob: 2547ac032df32133a2e9effdd350f75bbce36ced [file] [log] [blame]
Ben Skeggs9274f4a2012-07-06 07:36:43 +10001/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <subdev/device.h>
Ben Skeggs70c0f262012-07-10 10:49:22 +100026#include <subdev/bios.h>
Ben Skeggse0996ae2012-07-10 12:20:17 +100027#include <subdev/gpio.h>
Ben Skeggs4196faa2012-07-10 14:36:38 +100028#include <subdev/i2c.h>
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100029#include <subdev/clock.h>
Ben Skeggsd38ac522012-07-22 16:41:26 +100030#include <subdev/mxm.h>
Ben Skeggscb75d972012-07-11 10:44:20 +100031#include <subdev/devinit.h>
Ben Skeggs7d9115d2012-07-11 15:58:56 +100032#include <subdev/mc.h>
Ben Skeggs5a5c7432012-07-11 16:08:25 +100033#include <subdev/timer.h>
Ben Skeggs861d2102012-07-11 19:05:01 +100034#include <subdev/fb.h>
35#include <subdev/ltcg.h>
Ben Skeggs3863c9b2012-07-14 19:09:17 +100036#include <subdev/instmem.h>
37#include <subdev/vm.h>
38#include <subdev/bar.h>
Ben Skeggs9274f4a2012-07-06 07:36:43 +100039
Ben Skeggsebb945a2012-07-20 08:17:34 +100040#include <engine/dmaobj.h>
41#include <engine/fifo.h>
42#include <engine/software.h>
43#include <engine/graph.h>
44#include <engine/disp.h>
45
Ben Skeggs9274f4a2012-07-06 07:36:43 +100046int
47nve0_identify(struct nouveau_device *device)
48{
49 switch (device->chipset) {
50 case 0xe4:
Ben Skeggs2094dd82012-07-27 08:28:20 +100051 device->cname = "GK104";
Ben Skeggs70c0f262012-07-10 10:49:22 +100052 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Ben Skeggse0996ae2012-07-10 12:20:17 +100053 device->oclass[NVDEV_SUBDEV_GPIO ] = &nvd0_gpio_oclass;
Ben Skeggs4196faa2012-07-10 14:36:38 +100054 device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass;
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100055 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
Ben Skeggsd38ac522012-07-22 16:41:26 +100056 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
Ben Skeggscb75d972012-07-11 10:44:20 +100057 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
Ben Skeggs7d9115d2012-07-11 15:58:56 +100058 device->oclass[NVDEV_SUBDEV_MC ] = &nvc0_mc_oclass;
Ben Skeggs5a5c7432012-07-11 16:08:25 +100059 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
Ben Skeggs861d2102012-07-11 19:05:01 +100060 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass;
61 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
Ben Skeggs3863c9b2012-07-14 19:09:17 +100062 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
63 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
64 device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
Ben Skeggsebb945a2012-07-20 08:17:34 +100065 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
66 device->oclass[NVDEV_ENGINE_FIFO ] = &nve0_fifo_oclass;
67 device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
68 device->oclass[NVDEV_ENGINE_GR ] = &nve0_graph_oclass;
69 device->oclass[NVDEV_ENGINE_DISP ] = &nvd0_disp_oclass;
Ben Skeggs9274f4a2012-07-06 07:36:43 +100070 break;
71 case 0xe7:
Ben Skeggs2094dd82012-07-27 08:28:20 +100072 device->cname = "GK107";
Ben Skeggs70c0f262012-07-10 10:49:22 +100073 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Ben Skeggse0996ae2012-07-10 12:20:17 +100074 device->oclass[NVDEV_SUBDEV_GPIO ] = &nvd0_gpio_oclass;
Ben Skeggs4196faa2012-07-10 14:36:38 +100075 device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass;
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100076 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
Ben Skeggsd38ac522012-07-22 16:41:26 +100077 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
Ben Skeggscb75d972012-07-11 10:44:20 +100078 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
Ben Skeggs7d9115d2012-07-11 15:58:56 +100079 device->oclass[NVDEV_SUBDEV_MC ] = &nvc0_mc_oclass;
Ben Skeggs5a5c7432012-07-11 16:08:25 +100080 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
Ben Skeggs861d2102012-07-11 19:05:01 +100081 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass;
82 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
Ben Skeggs3863c9b2012-07-14 19:09:17 +100083 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
84 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
85 device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
Ben Skeggsebb945a2012-07-20 08:17:34 +100086 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;
87 device->oclass[NVDEV_ENGINE_FIFO ] = &nve0_fifo_oclass;
88 device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
89 device->oclass[NVDEV_ENGINE_GR ] = &nve0_graph_oclass;
90 device->oclass[NVDEV_ENGINE_DISP ] = &nvd0_disp_oclass;
Ben Skeggs9274f4a2012-07-06 07:36:43 +100091 break;
92 default:
93 nv_fatal(device, "unknown Kepler chipset\n");
94 return -EINVAL;
95 }
96
97 return 0;
98}