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gerrit-public.fairphone.software / kernel / msm-4.9 / 4f641038e60ebb1abc3671ff504bbd34f3047249 / . / arch / arm64 / boot / dts / qcom / sdm845-sde-display.dtsi
blob: d12a95483f55900a4067744e516584b05e48c7a3 [file] [log] [blame]
Dhaval Patel6a5bd8b2016-10-10 14:12:10 -0700[diff] [blame]1/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]13#include "dsi-panel-sim-video.dtsi"
14#include "dsi-panel-sim-cmd.dtsi"
Rajkumar Subbiah01671a42017-07-14 16:41:01 -0400[diff] [blame]15#include "dsi-panel-sim-dsc375-cmd.dtsi"
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]16#include "dsi-panel-sim-dualmipi-video.dtsi"
17#include "dsi-panel-sim-dualmipi-cmd.dtsi"
Rajkumar Subbiah01671a42017-07-14 16:41:01 -0400[diff] [blame]18#include "dsi-panel-sim-dualmipi-dsc375-cmd.dtsi"
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]19#include "dsi-panel-sharp-dsc-4k-video.dtsi"
20#include "dsi-panel-sharp-dsc-4k-cmd.dtsi"
21#include "dsi-panel-nt35597-truly-dualmipi-wqxga-video.dtsi"
22#include "dsi-panel-nt35597-truly-dualmipi-wqxga-cmd.dtsi"
23#include "dsi-panel-nt35597-truly-dsc-wqxga-cmd.dtsi"
24#include "dsi-panel-nt35597-truly-dsc-wqxga-video.dtsi"
25#include "dsi-panel-sharp-1080p-cmd.dtsi"
26#include "dsi-panel-sharp-dualmipi-1080p-120hz.dtsi"
27#include "dsi-panel-s6e3ha3-amoled-dualmipi-wqhd-cmd.dtsi"
Vishnuvardhan Prodduturi080447f2017-10-12 13:19:50 +0530[diff] [blame]28#include "dsi-panel-nt35597-dualmipi-wqxga-video.dtsi"
29#include "dsi-panel-nt35597-dualmipi-wqxga-cmd.dtsi"
Yuan Zhao5c425aa2017-11-17 10:56:49 +0800[diff] [blame]30#include "dsi-panel-nt36850-truly-dualmipi-wqhd-cmd.dtsi"
Shashank Babu Chinta Venkata59e305f2017-04-05 12:14:18 -0700[diff] [blame]31#include <dt-bindings/clock/mdss-10nm-pll-clk.h>
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]32
Dhaval Patel6a5bd8b2016-10-10 14:12:10 -0700[diff] [blame]33&soc {
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]34 dsi_panel_pwr_supply: dsi_panel_pwr_supply {
35 #address-cells = <1>;
36 #size-cells = <0>;
37
38 qcom,panel-supply-entry@0 {
39 reg = <0>;
40 qcom,supply-name = "vddio";
41 qcom,supply-min-voltage = <1800000>;
42 qcom,supply-max-voltage = <1800000>;
43 qcom,supply-enable-load = <62000>;
44 qcom,supply-disable-load = <80>;
45 qcom,supply-post-on-sleep = <20>;
46 };
47
48 qcom,panel-supply-entry@1 {
49 reg = <1>;
50 qcom,supply-name = "lab";
51 qcom,supply-min-voltage = <4600000>;
52 qcom,supply-max-voltage = <6000000>;
53 qcom,supply-enable-load = <100000>;
54 qcom,supply-disable-load = <100>;
55 };
56
57 qcom,panel-supply-entry@2 {
58 reg = <2>;
59 qcom,supply-name = "ibb";
60 qcom,supply-min-voltage = <4600000>;
61 qcom,supply-max-voltage = <6000000>;
62 qcom,supply-enable-load = <100000>;
63 qcom,supply-disable-load = <100>;
64 qcom,supply-post-on-sleep = <20>;
65 };
66 };
67
68 dsi_panel_pwr_supply_no_labibb: dsi_panel_pwr_supply_no_labibb {
69 #address-cells = <1>;
70 #size-cells = <0>;
71
72 qcom,panel-supply-entry@0 {
73 reg = <0>;
74 qcom,supply-name = "vddio";
75 qcom,supply-min-voltage = <1800000>;
76 qcom,supply-max-voltage = <1800000>;
77 qcom,supply-enable-load = <62000>;
78 qcom,supply-disable-load = <80>;
79 qcom,supply-post-on-sleep = <20>;
80 };
81 };
82
83 dsi_panel_pwr_supply_vdd_no_labibb: dsi_panel_pwr_supply_vdd_no_labibb {
84 #address-cells = <1>;
85 #size-cells = <0>;
86
87 qcom,panel-supply-entry@0 {
88 reg = <0>;
89 qcom,supply-name = "vddio";
90 qcom,supply-min-voltage = <1800000>;
91 qcom,supply-max-voltage = <1800000>;
92 qcom,supply-enable-load = <62000>;
93 qcom,supply-disable-load = <80>;
94 qcom,supply-post-on-sleep = <20>;
95 };
96
97 qcom,panel-supply-entry@1 {
98 reg = <1>;
99 qcom,supply-name = "vdd";
100 qcom,supply-min-voltage = <3000000>;
101 qcom,supply-max-voltage = <3000000>;
102 qcom,supply-enable-load = <857000>;
103 qcom,supply-disable-load = <0>;
104 qcom,supply-post-on-sleep = <0>;
105 };
106 };
107
108 dsi_sharp_4k_dsc_video_display: qcom,dsi-display@0 {
109 compatible = "qcom,dsi-display";
Shashank Babu Chinta Venkata5f3ddcd22017-03-29 14:27:21 -0700[diff] [blame]110 label = "dsi_sharp_4k_dsc_video_display";
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]111 qcom,display-type = "primary";
112
113 qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
114 qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
Shashank Babu Chinta Venkatadb329392017-04-28 15:45:44 -0700[diff] [blame]115 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
116 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]117 clock-names = "src_byte_clk", "src_pixel_clk";
118
119 pinctrl-names = "panel_active", "panel_suspend";
120 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
121 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
122 qcom,platform-te-gpio = <&tlmm 10 0>;
123 qcom,platform-reset-gpio = <&tlmm 6 0>;
Shashank Babu Chinta Venkata13a41d42017-04-28 15:51:35 -0700[diff] [blame]124 qcom,panel-mode-gpio = <&tlmm 52 0>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]125
126 qcom,dsi-panel = <&dsi_sharp_4k_dsc_video>;
127 vddio-supply = <&pm8998_l14>;
128 lab-supply = <&lab_regulator>;
129 ibb-supply = <&ibb_regulator>;
130 };
131
132 dsi_sharp_4k_dsc_cmd_display: qcom,dsi-display@1 {
133 compatible = "qcom,dsi-display";
Shashank Babu Chinta Venkata5f3ddcd22017-03-29 14:27:21 -0700[diff] [blame]134 label = "dsi_sharp_4k_dsc_cmd_display";
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]135 qcom,display-type = "primary";
136
137 qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
138 qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
Shashank Babu Chinta Venkatadb329392017-04-28 15:45:44 -0700[diff] [blame]139 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
140 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]141 clock-names = "src_byte_clk", "src_pixel_clk";
142
143 pinctrl-names = "panel_active", "panel_suspend";
144 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
145 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
146 qcom,platform-te-gpio = <&tlmm 10 0>;
147 qcom,platform-reset-gpio = <&tlmm 6 0>;
Shashank Babu Chinta Venkata13a41d42017-04-28 15:51:35 -0700[diff] [blame]148 qcom,panel-mode-gpio = <&tlmm 52 0>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]149
150 qcom,dsi-panel = <&dsi_sharp_4k_dsc_cmd>;
151 vddio-supply = <&pm8998_l14>;
152 lab-supply = <&lab_regulator>;
153 ibb-supply = <&ibb_regulator>;
154 };
155
156 dsi_sharp_1080_cmd_display: qcom,dsi-display@2 {
157 compatible = "qcom,dsi-display";
Shashank Babu Chinta Venkata5f3ddcd22017-03-29 14:27:21 -0700[diff] [blame]158 label = "dsi_sharp_1080_cmd_display";
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]159 qcom,display-type = "primary";
160
Lloyd Atkinson24f743f2017-05-12 11:48:51 -0400[diff] [blame]161 qcom,dsi-ctrl = <&mdss_dsi0>;
162 qcom,dsi-phy = <&mdss_dsi_phy0>;
Shashank Babu Chinta Venkatadb329392017-04-28 15:45:44 -0700[diff] [blame]163 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
164 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]165 clock-names = "src_byte_clk", "src_pixel_clk";
166
167 pinctrl-names = "panel_active", "panel_suspend";
168 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
169 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
170 qcom,platform-te-gpio = <&tlmm 10 0>;
171 qcom,platform-reset-gpio = <&tlmm 6 0>;
Shashank Babu Chinta Venkata13a41d42017-04-28 15:51:35 -0700[diff] [blame]172 qcom,panel-mode-gpio = <&tlmm 52 0>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]173
174 qcom,dsi-panel = <&dsi_sharp_1080_cmd>;
175 vddio-supply = <&pm8998_l14>;
176 lab-supply = <&lab_regulator>;
177 ibb-supply = <&ibb_regulator>;
178 };
179
180 dsi_dual_sharp_1080_120hz_cmd_display: qcom,dsi-display@3 {
181 compatible = "qcom,dsi-display";
Shashank Babu Chinta Venkata5f3ddcd22017-03-29 14:27:21 -0700[diff] [blame]182 label = "dsi_dual_sharp_1080_120hz_cmd_display";
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]183 qcom,display-type = "primary";
184
185 qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
186 qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
Shashank Babu Chinta Venkatadb329392017-04-28 15:45:44 -0700[diff] [blame]187 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
188 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]189 clock-names = "src_byte_clk", "src_pixel_clk";
190
191 pinctrl-names = "panel_active", "panel_suspend";
192 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
193 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
194 qcom,platform-te-gpio = <&tlmm 10 0>;
195 qcom,platform-reset-gpio = <&tlmm 6 0>;
Shashank Babu Chinta Venkata13a41d42017-04-28 15:51:35 -0700[diff] [blame]196 qcom,panel-mode-gpio = <&tlmm 52 0>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]197
198 qcom,dsi-panel = <&dsi_dual_sharp_1080_120hz_cmd>;
199 vddio-supply = <&pm8998_l14>;
200 lab-supply = <&lab_regulator>;
201 ibb-supply = <&ibb_regulator>;
202 };
203
204 dsi_dual_nt35597_truly_video_display: qcom,dsi-display@4 {
205 compatible = "qcom,dsi-display";
Shashank Babu Chinta Venkata5f3ddcd22017-03-29 14:27:21 -0700[diff] [blame]206 label = "dsi_dual_nt35597_truly_video_display";
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]207 qcom,display-type = "primary";
208
209 qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
210 qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
Shashank Babu Chinta Venkata59e305f2017-04-05 12:14:18 -0700[diff] [blame]211 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
212 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]213 clock-names = "src_byte_clk", "src_pixel_clk";
214
215 pinctrl-names = "panel_active", "panel_suspend";
216 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
217 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]218 qcom,platform-reset-gpio = <&tlmm 6 0>;
Shashank Babu Chinta Venkata59e305f2017-04-05 12:14:18 -0700[diff] [blame]219 qcom,panel-mode-gpio = <&tlmm 52 0>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]220
221 qcom,dsi-panel = <&dsi_dual_nt35597_truly_video>;
222 vddio-supply = <&pm8998_l14>;
223 lab-supply = <&lab_regulator>;
224 ibb-supply = <&ibb_regulator>;
225 };
226
227 dsi_dual_nt35597_truly_cmd_display: qcom,dsi-display@5 {
228 compatible = "qcom,dsi-display";
Shashank Babu Chinta Venkata5f3ddcd22017-03-29 14:27:21 -0700[diff] [blame]229 label = "dsi_dual_nt35597_truly_cmd_display";
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]230 qcom,display-type = "primary";
231
232 qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
233 qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
Shashank Babu Chinta Venkatadb329392017-04-28 15:45:44 -0700[diff] [blame]234 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
235 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]236 clock-names = "src_byte_clk", "src_pixel_clk";
237
238 pinctrl-names = "panel_active", "panel_suspend";
239 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
240 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
241 qcom,platform-te-gpio = <&tlmm 10 0>;
242 qcom,platform-reset-gpio = <&tlmm 6 0>;
Shashank Babu Chinta Venkata13a41d42017-04-28 15:51:35 -0700[diff] [blame]243 qcom,panel-mode-gpio = <&tlmm 52 0>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]244
245 qcom,dsi-panel = <&dsi_dual_nt35597_truly_cmd>;
246 vddio-supply = <&pm8998_l14>;
247 lab-supply = <&lab_regulator>;
248 ibb-supply = <&ibb_regulator>;
249 };
250
251 dsi_nt35597_truly_dsc_cmd_display: qcom,dsi-display@6 {
252 compatible = "qcom,dsi-display";
Shashank Babu Chinta Venkata5f3ddcd22017-03-29 14:27:21 -0700[diff] [blame]253 label = "dsi_nt35597_truly_dsc_cmd_display";
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]254 qcom,display-type = "primary";
255
Vara Reddy199c2822017-05-19 10:14:44 -0700[diff] [blame]256 qcom,dsi-ctrl = <&mdss_dsi1>;
257 qcom,dsi-phy = <&mdss_dsi_phy1>;
258 clocks = <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>,
259 <&mdss_dsi1_pll PCLK_MUX_1_CLK>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]260 clock-names = "src_byte_clk", "src_pixel_clk";
261
262 pinctrl-names = "panel_active", "panel_suspend";
263 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
264 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
265 qcom,platform-te-gpio = <&tlmm 10 0>;
266 qcom,platform-reset-gpio = <&tlmm 6 0>;
Shashank Babu Chinta Venkata13a41d42017-04-28 15:51:35 -0700[diff] [blame]267 qcom,panel-mode-gpio = <&tlmm 52 0>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]268
269 qcom,dsi-panel = <&dsi_nt35597_truly_dsc_cmd>;
270 vddio-supply = <&pm8998_l14>;
271 lab-supply = <&lab_regulator>;
272 ibb-supply = <&ibb_regulator>;
273 };
274
275 dsi_nt35597_truly_dsc_video_display: qcom,dsi-display@7 {
276 compatible = "qcom,dsi-display";
Shashank Babu Chinta Venkata5f3ddcd22017-03-29 14:27:21 -0700[diff] [blame]277 label = "dsi_nt35597_truly_dsc_video_display";
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]278 qcom,display-type = "primary";
279
Vara Reddy199c2822017-05-19 10:14:44 -0700[diff] [blame]280 qcom,dsi-ctrl = <&mdss_dsi1>;
281 qcom,dsi-phy = <&mdss_dsi_phy1>;
282 clocks = <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>,
283 <&mdss_dsi1_pll PCLK_MUX_1_CLK>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]284 clock-names = "src_byte_clk", "src_pixel_clk";
285
286 pinctrl-names = "panel_active", "panel_suspend";
287 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
288 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
289 qcom,platform-te-gpio = <&tlmm 10 0>;
290 qcom,platform-reset-gpio = <&tlmm 6 0>;
Shashank Babu Chinta Venkata13a41d42017-04-28 15:51:35 -0700[diff] [blame]291 qcom,panel-mode-gpio = <&tlmm 52 0>;
Shashank Babu Chinta Venkata24bdd052017-02-24 14:29:09 -0800[diff] [blame]292
293 qcom,dsi-panel = <&dsi_nt35597_truly_dsc_video>;
294 vddio-supply = <&pm8998_l14>;
295 lab-supply = <&lab_regulator>;
296 ibb-supply = <&ibb_regulator>;
297 };
298
Narendra Muppallae8c25c82017-04-02 19:20:57 -0700[diff] [blame]299 dsi_sim_vid_display: qcom,dsi-display@8 {
300 compatible = "qcom,dsi-display";
301 label = "dsi_sim_vid_display";
302 qcom,display-type = "primary";
303
304 qcom,dsi-ctrl = <&mdss_dsi0>;
305 qcom,dsi-phy = <&mdss_dsi_phy0>;
306 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
307 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
308 clock-names = "src_byte_clk", "src_pixel_clk";
309
310 pinctrl-names = "panel_active", "panel_suspend";
311 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
312 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
313
314 qcom,dsi-panel = <&dsi_sim_vid>;
315 };
316
317 dsi_dual_sim_vid_display: qcom,dsi-display@9 {
318 compatible = "qcom,dsi-display";
319 label = "dsi_dual_sim_vid_display";
320 qcom,display-type = "primary";
321
322 qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
323 qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
324 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
325 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
326 clock-names = "src_byte_clk", "src_pixel_clk";
327
328 pinctrl-names = "panel_active", "panel_suspend";
329 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
330 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
331
332 qcom,dsi-panel = <&dsi_dual_sim_vid>;
333 };
334
Narendra Muppallaa1a55462017-04-04 18:07:27 -0700[diff] [blame]335 dsi_sim_cmd_display: qcom,dsi-display@10 {
336 compatible = "qcom,dsi-display";
337 label = "dsi_sim_cmd_display";
338 qcom,display-type = "primary";
339
340 qcom,dsi-ctrl = <&mdss_dsi0>;
341 qcom,dsi-phy = <&mdss_dsi_phy0>;
342 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
343 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
344 clock-names = "src_byte_clk", "src_pixel_clk";
345
346 pinctrl-names = "panel_active", "panel_suspend";
347 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
348 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
349
350 qcom,dsi-panel = <&dsi_sim_cmd>;
351 };
352
353 dsi_dual_sim_cmd_display: qcom,dsi-display@11 {
354 compatible = "qcom,dsi-display";
355 label = "dsi_dual_sim_cmd_display";
356 qcom,display-type = "primary";
357
358 qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
359 qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
360 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
361 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
362 clock-names = "src_byte_clk", "src_pixel_clk";
363
364 pinctrl-names = "panel_active", "panel_suspend";
365 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
366 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
367
368 qcom,dsi-panel = <&dsi_dual_sim_cmd>;
369 };
370
Rajkumar Subbiah01671a42017-07-14 16:41:01 -0400[diff] [blame]371 dsi_sim_dsc_375_cmd_display: qcom,dsi-display@12 {
372 compatible = "qcom,dsi-display";
373 label = "dsi_sim_dsc_375_cmd_display";
374 qcom,display-type = "primary";
375
376 qcom,dsi-ctrl = <&mdss_dsi0>;
377 qcom,dsi-phy = <&mdss_dsi_phy0>;
378 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
379 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
380 clock-names = "src_byte_clk", "src_pixel_clk";
381
382 pinctrl-names = "panel_active", "panel_suspend";
383 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
384 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
385
386 qcom,dsi-panel = <&dsi_sim_dsc_375_cmd>;
387 };
388
389 dsi_dual_sim_dsc_375_cmd_display: qcom,dsi-display@13 {
390 compatible = "qcom,dsi-display";
391 label = "dsi_dual_sim_dsc_375_cmd_display";
392 qcom,display-type = "primary";
393
394 qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
395 qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
396 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
397 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
398 clock-names = "src_byte_clk", "src_pixel_clk";
399
400 pinctrl-names = "panel_active", "panel_suspend";
401 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
402 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
403
404 qcom,dsi-panel = <&dsi_dual_sim_dsc_375_cmd>;
405 };
406
Vishnuvardhan Prodduturi080447f2017-10-12 13:19:50 +0530[diff] [blame]407 dsi_dual_nt35597_video_display: qcom,dsi-display@14 {
408 compatible = "qcom,dsi-display";
409 label = "dsi_dual_nt35597_video_display";
410 qcom,display-type = "primary";
411
412 qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
413 qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
414 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
415 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
416 clock-names = "src_byte_clk", "src_pixel_clk";
417
418 pinctrl-names = "panel_active", "panel_suspend";
419 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
420 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
421 qcom,platform-reset-gpio = <&tlmm 6 0>;
422 qcom,panel-mode-gpio = <&tlmm 52 0>;
423
424 qcom,dsi-panel = <&dsi_dual_nt35597_video>;
425 vddio-supply = <&pm8998_l14>;
426 lab-supply = <&lab_regulator>;
427 ibb-supply = <&ibb_regulator>;
428 };
429
430
431 dsi_dual_nt35597_cmd_display: qcom,dsi-display@15 {
432 compatible = "qcom,dsi-display";
433 label = "dsi_dual_nt35597_cmd_display";
434 qcom,display-type = "primary";
435
436 qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
437 qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
438 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
439 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
440 clock-names = "src_byte_clk", "src_pixel_clk";
441
442 pinctrl-names = "panel_active", "panel_suspend";
443 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
444 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
445 qcom,platform-te-gpio = <&tlmm 10 0>;
446 qcom,platform-reset-gpio = <&tlmm 6 0>;
447 qcom,panel-mode-gpio = <&tlmm 52 0>;
448
449 qcom,dsi-panel = <&dsi_dual_nt35597_cmd>;
450 vddio-supply = <&pm8998_l14>;
451 lab-supply = <&lab_regulator>;
452 ibb-supply = <&ibb_regulator>;
453 };
454
Yuan Zhao5c425aa2017-11-17 10:56:49 +0800[diff] [blame]455 dsi_dual_nt36850_truly_cmd_display: qcom,dsi-display@16 {
456 compatible = "qcom,dsi-display";
457 label = "dsi_dual_nt36850_truly_cmd_display";
458 qcom,display-type = "primary";
459
460 qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
461 qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
462 clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
463 <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
464 clock-names = "src_byte_clk", "src_pixel_clk";
465
466 pinctrl-names = "panel_active", "panel_suspend";
467 pinctrl-0 = <&sde_dsi_active &sde_te_active>;
468 pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
469 qcom,platform-te-gpio = <&tlmm 10 0>;
470 qcom,platform-reset-gpio = <&tlmm 6 0>;
471 qcom,panel-mode-gpio = <&tlmm 52 0>;
472
473 qcom,dsi-panel = <&dsi_dual_nt36850_truly_cmd>;
474 vddio-supply = <&pm8998_l14>;
475 lab-supply = <&lab_regulator>;
476 ibb-supply = <&ibb_regulator>;
477 };
478
Dhaval Patel6a5bd8b2016-10-10 14:12:10 -0700[diff] [blame]479 sde_wb: qcom,wb-display@0 {
480 compatible = "qcom,wb-display";
481 cell-index = <0>;
482 label = "wb_display";
483 };
Padmanabhan Komanduruff557602017-05-01 13:39:26 -0700[diff] [blame]484
Ajay Singh Parmarb9c35032017-08-09 17:16:00 -0700[diff] [blame]485 ext_disp: qcom,msm-ext-disp {
486 compatible = "qcom,msm-ext-disp";
487
488 ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx {
489 compatible = "qcom,msm-ext-disp-audio-codec-rx";
490 };
491 };
Padmanabhan Komanduruff557602017-05-01 13:39:26 -0700[diff] [blame]492};
493
494&sde_dp {
Ingrid Gallardoc5b9c032017-09-11 16:10:43 -0700[diff] [blame]495 qcom,dp-usbpd-detection = <&pmi8998_pdphy>;
496 qcom,ext-disp = <&ext_disp>;
497
Padmanabhan Komanduruff557602017-05-01 13:39:26 -0700[diff] [blame]498 pinctrl-names = "mdss_dp_active", "mdss_dp_sleep";
499 pinctrl-0 = <&sde_dp_aux_active &sde_dp_usbplug_cc_active>;
500 pinctrl-1 = <&sde_dp_aux_suspend &sde_dp_usbplug_cc_suspend>;
501 qcom,aux-en-gpio = <&tlmm 43 0>;
502 qcom,aux-sel-gpio = <&tlmm 51 0>;
503 qcom,usbplug-cc-gpio = <&tlmm 38 0>;
Dhaval Patel6a5bd8b2016-10-10 14:12:10 -0700[diff] [blame]504};
505
506&mdss_mdp {
Padmanabhan Komanduruff557602017-05-01 13:39:26 -0700[diff] [blame]507 connectors = <&sde_rscc &sde_wb &sde_dp>;
Dhaval Patel6a5bd8b2016-10-10 14:12:10 -0700[diff] [blame]508};
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]509
510&dsi_dual_nt35597_truly_video {
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]511 qcom,mdss-dsi-t-clk-post = <0x0D>;
512 qcom,mdss-dsi-t-clk-pre = <0x2D>;
Raviteja Tamatam8f829472017-07-19 16:08:01 +0530[diff] [blame]513 qcom,mdss-dsi-min-refresh-rate = <53>;
514 qcom,mdss-dsi-max-refresh-rate = <60>;
515 qcom,mdss-dsi-pan-enable-dynamic-fps;
516 qcom,mdss-dsi-pan-fps-update =
517 "dfps_immediate_porch_mode_vfp";
Vara Reddyf13e1882017-11-15 19:01:45 -0800[diff] [blame]518 qcom,esd-check-enabled;
519 qcom,mdss-dsi-panel-status-check-mode = "reg_read";
520 qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
521 qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
522 qcom,mdss-dsi-panel-status-value = <0x9c>;
523 qcom,mdss-dsi-panel-on-check-value = <0x9c>;
524 qcom,mdss-dsi-panel-status-read-length = <1>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]525 qcom,mdss-dsi-display-timings {
526 timing@0{
527 qcom,mdss-dsi-panel-phy-timings = [00 1c 07 07 23 21 07
528 07 05 03 04 00];
529 qcom,display-topology = <2 0 2>,
530 <1 0 2>;
531 qcom,default-topology-index = <0>;
532 };
533 };
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]534};
535
536&dsi_dual_nt35597_truly_cmd {
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]537 qcom,mdss-dsi-t-clk-post = <0x0D>;
538 qcom,mdss-dsi-t-clk-pre = <0x2D>;
Vara Reddyf13e1882017-11-15 19:01:45 -0800[diff] [blame]539 qcom,esd-check-enabled;
540 qcom,mdss-dsi-panel-status-check-mode = "reg_read";
541 qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
542 qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
543 qcom,mdss-dsi-panel-status-value = <0x9c>;
544 qcom,mdss-dsi-panel-on-check-value = <0x9c>;
545 qcom,mdss-dsi-panel-status-read-length = <1>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]546 qcom,mdss-dsi-display-timings {
547 timing@0{
548 qcom,mdss-dsi-panel-phy-timings = [00 1c 07 07 23 21 07
549 07 05 03 04 00];
550 qcom,display-topology = <2 0 2>,
551 <1 0 2>;
552 qcom,default-topology-index = <0>;
553 };
554 };
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]555};
556
557&dsi_nt35597_truly_dsc_cmd {
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]558 qcom,mdss-dsi-t-clk-post = <0x0b>;
559 qcom,mdss-dsi-t-clk-pre = <0x23>;
Vara Reddy039e6582017-10-25 11:01:28 -0700[diff] [blame]560 qcom,ulps-enabled;
Vara Reddyf13e1882017-11-15 19:01:45 -0800[diff] [blame]561 qcom,esd-check-enabled;
562 qcom,mdss-dsi-panel-status-check-mode = "reg_read";
563 qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
564 qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
565 qcom,mdss-dsi-panel-status-value = <0x9c>;
566 qcom,mdss-dsi-panel-on-check-value = <0x9c>;
567 qcom,mdss-dsi-panel-status-read-length = <1>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]568 qcom,mdss-dsi-display-timings {
569 timing@0{
570 qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05
571 05 03 03 04 00];
572 qcom,display-topology = <1 1 1>,
573 <2 2 1>, /* dsc merge */
574 <2 1 1>; /* 3d mux */
575 qcom,default-topology-index = <1>;
576 };
577 };
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]578};
579
580&dsi_nt35597_truly_dsc_video {
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]581 qcom,mdss-dsi-t-clk-post = <0x0b>;
582 qcom,mdss-dsi-t-clk-pre = <0x23>;
Raviteja Tamatam8f829472017-07-19 16:08:01 +0530[diff] [blame]583 qcom,mdss-dsi-min-refresh-rate = <53>;
584 qcom,mdss-dsi-max-refresh-rate = <60>;
585 qcom,mdss-dsi-pan-enable-dynamic-fps;
586 qcom,mdss-dsi-pan-fps-update =
587 "dfps_immediate_porch_mode_vfp";
Vara Reddyf13e1882017-11-15 19:01:45 -0800[diff] [blame]588 qcom,esd-check-enabled;
589 qcom,mdss-dsi-panel-status-check-mode = "reg_read";
590 qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
591 qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
592 qcom,mdss-dsi-panel-status-value = <0x9c>;
593 qcom,mdss-dsi-panel-on-check-value = <0x9c>;
594 qcom,mdss-dsi-panel-status-read-length = <1>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]595 qcom,mdss-dsi-display-timings {
596 timing@0{
597 qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05
598 04 03 03 04 00];
599 qcom,display-topology = <1 1 1>,
600 <2 2 1>, /* dsc merge */
601 <2 1 1>; /* 3d mux */
602 qcom,default-topology-index = <1>;
603 };
604 };
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]605};
606
607&dsi_sharp_4k_dsc_video {
Shashank Babu Chinta Venkata29c856f2017-05-02 11:03:50 -0700[diff] [blame]608 qcom,mdss-dsi-t-clk-post = <0x0c>;
609 qcom,mdss-dsi-t-clk-pre = <0x27>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]610 qcom,mdss-dsi-display-timings {
611 timing@0{
612 qcom,mdss-dsi-panel-phy-timings = [00 18 06 06 21 20 06
613 06 04 03 04 00];
614 qcom,display-topology = <2 2 2>;
615 qcom,default-topology-index = <0>;
616 };
617 };
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]618};
619
620&dsi_sharp_4k_dsc_cmd {
Shashank Babu Chinta Venkata29c856f2017-05-02 11:03:50 -0700[diff] [blame]621 qcom,mdss-dsi-t-clk-post = <0x0c>;
622 qcom,mdss-dsi-t-clk-pre = <0x27>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]623 qcom,mdss-dsi-display-timings {
624 timing@0{
625 qcom,mdss-dsi-panel-phy-timings = [00 18 06 06 21 20 06
626 06 04 03 04 00];
627 qcom,display-topology = <2 2 2>;
628 qcom,default-topology-index = <0>;
629 };
630 };
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]631};
632
633&dsi_dual_sharp_1080_120hz_cmd {
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]634 qcom,mdss-dsi-t-clk-post = <0x0f>;
635 qcom,mdss-dsi-t-clk-pre = <0x36>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]636 qcom,mdss-dsi-display-timings {
637 timing@0{
638 qcom,mdss-dsi-panel-phy-timings = [00 24 09 09 26 24 09
639 09 06 03 04 00];
640 qcom,display-topology = <2 0 2>,
641 <1 0 2>;
642 qcom,default-topology-index = <0>;
643 };
644 };
Jeykumar Sankaranbfe3ed12017-04-24 18:53:54 -0700[diff] [blame]645};
646
647&dsi_sharp_1080_cmd {
Lloyd Atkinson24f743f2017-05-12 11:48:51 -0400[diff] [blame]648 qcom,mdss-dsi-t-clk-post = <0x0c>;
649 qcom,mdss-dsi-t-clk-pre = <0x29>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]650 qcom,mdss-dsi-display-timings {
651 timing@0{
Vara Reddybed64112017-09-27 03:11:14 -0700[diff] [blame]652 qcom,mdss-dsi-panel-phy-timings = [00 1E 08 08 24 22 08
653 08 05 03 04 00];
654 qcom,mdss-dsi-panel-clockrate = <900000000>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]655 qcom,display-topology = <1 0 1>;
656 qcom,default-topology-index = <0>;
657 };
658 };
Shashank Babu Chinta Venkata939a3a42017-03-30 13:00:25 -0700[diff] [blame]659};
Narendra Muppallae8c25c82017-04-02 19:20:57 -0700[diff] [blame]660
661&dsi_sim_vid {
Narendra Muppallae8c25c82017-04-02 19:20:57 -0700[diff] [blame]662 qcom,mdss-dsi-t-clk-post = <0x0d>;
663 qcom,mdss-dsi-t-clk-pre = <0x2d>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]664 qcom,mdss-dsi-display-timings {
665 timing@0{
666 qcom,mdss-dsi-panel-phy-timings = [00 1c 07 07 23 21 07
667 07 05 03 04 00];
668 qcom,display-topology = <1 0 1>,
669 <2 0 1>;
670 qcom,default-topology-index = <0>;
671 };
672 };
Narendra Muppallae8c25c82017-04-02 19:20:57 -0700[diff] [blame]673};
674
675&dsi_dual_sim_vid {
Narendra Muppallae8c25c82017-04-02 19:20:57 -0700[diff] [blame]676 qcom,mdss-dsi-t-clk-post = <0x0d>;
677 qcom,mdss-dsi-t-clk-pre = <0x2d>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]678 qcom,mdss-dsi-display-timings {
679 timing@0{
680 qcom,mdss-dsi-panel-phy-timings = [00 1c 07 07 23 21 07
681 07 05 03 04 00];
682 qcom,display-topology = <2 0 2>,
683 <1 0 2>;
684 qcom,default-topology-index = <0>;
685 };
686 };
Narendra Muppallae8c25c82017-04-02 19:20:57 -0700[diff] [blame]687};
Narendra Muppallaa1a55462017-04-04 18:07:27 -0700[diff] [blame]688
689&dsi_sim_cmd {
Dhaval Patele73af032017-10-13 11:46:34 -0700[diff] [blame]690 qcom,mdss-dsi-t-clk-post = <0x0c>;
691 qcom,mdss-dsi-t-clk-pre = <0x29>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]692 qcom,mdss-dsi-display-timings {
693 timing@0{
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]694 qcom,display-topology = <1 0 1>,
Dhaval Patele73af032017-10-13 11:46:34 -0700[diff] [blame]695 <2 2 1>;
696 qcom,default-topology-index = <1>;
697 qcom,panel-roi-alignment = <720 40 720 40 720 40>;
698 qcom,partial-update-enabled = "single_roi";
699 qcom,mdss-dsi-panel-phy-timings = [00 1a 06 06 22 20 07
700 07 04 03 04 00];
701 };
702 timing@1{
703 qcom,display-topology = <1 0 1>,
704 <2 2 1>;
705 qcom,default-topology-index = <1>;
706 qcom,panel-roi-alignment = <540 40 540 40 540 40>;
707 qcom,partial-update-enabled = "single_roi";
708 qcom,mdss-dsi-panel-phy-timings = [00 1a 06 06 22 20 07
709 07 04 03 04 00];
710 };
711 timing@2{
712 qcom,display-topology = <1 0 1>,
713 <2 2 1>;
714 qcom,default-topology-index = <1>;
715 qcom,panel-roi-alignment = <360 40 360 40 360 40>;
716 qcom,partial-update-enabled = "single_roi";
717 qcom,mdss-dsi-panel-phy-timings = [00 1a 06 06 22 20 07
718 07 04 03 04 00];
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]719 };
720 };
Narendra Muppallaa1a55462017-04-04 18:07:27 -0700[diff] [blame]721};
722
723&dsi_dual_sim_cmd {
Narendra Muppallaa1a55462017-04-04 18:07:27 -0700[diff] [blame]724 qcom,mdss-dsi-t-clk-post = <0x0d>;
725 qcom,mdss-dsi-t-clk-pre = <0x2d>;
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]726 qcom,mdss-dsi-display-timings {
727 timing@0{
Dhaval Patel9e017f32017-07-26 15:17:54 -0700[diff] [blame]728 qcom,mdss-dsi-panel-phy-timings = [00 24 09 09 26 24 09
729 09 06 03 04 00];
730 qcom,display-topology = <2 0 2>;
731 qcom,default-topology-index = <0>;
732 };
733 timing@1{
Dhaval Patela2ed7bc2017-10-29 23:29:14 -0700[diff] [blame]734 qcom,mdss-dsi-panel-phy-timings = [00 30 0c 0d 2a 27 0c
735 0d 09 03 04 00];
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]736 qcom,display-topology = <2 0 2>,
737 <1 0 2>;
738 qcom,default-topology-index = <0>;
739 };
Dhaval Patel9e017f32017-07-26 15:17:54 -0700[diff] [blame]740 timing@2{
741 qcom,mdss-dsi-panel-phy-timings = [00 18 06 06 21 20 06
742 06 04 03 04 00];
743 qcom,display-topology = <2 0 2>;
744 qcom,default-topology-index = <0>;
745 };
Jeykumar Sankaran446a5f12017-05-09 20:30:39 -0700[diff] [blame]746 };
Narendra Muppallaa1a55462017-04-04 18:07:27 -0700[diff] [blame]747};
Rajkumar Subbiah01671a42017-07-14 16:41:01 -0400[diff] [blame]748
749&dsi_sim_dsc_375_cmd {
750 qcom,mdss-dsi-t-clk-post = <0x0d>;
751 qcom,mdss-dsi-t-clk-pre = <0x2d>;
752 qcom,mdss-dsi-display-timings {
753 timing@0 { /* 1080p */
754 qcom,mdss-dsi-panel-phy-timings = [00 1A 06 06 22 20 07
755 07 04 03 04 00];
756 qcom,display-topology = <1 1 1>;
757 qcom,default-topology-index = <0>;
758 };
759 timing@1 { /* qhd */
760 qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05
761 05 03 03 04 00];
762 qcom,display-topology = <1 1 1>,
763 <2 2 1>, /* dsc merge */
764 <2 1 1>; /* 3d mux */
765 qcom,default-topology-index = <0>;
766 };
767 };
768};
769
770&dsi_dual_sim_dsc_375_cmd {
771 qcom,mdss-dsi-t-clk-post = <0x0d>;
772 qcom,mdss-dsi-t-clk-pre = <0x2d>;
773 qcom,mdss-dsi-display-timings {
774 timing@0 { /* qhd */
775 qcom,mdss-dsi-panel-phy-timings = [00 1c 07 07 23 21 07
776 07 05 03 04 00];
777 qcom,display-topology = <2 2 2>;
778 qcom,default-topology-index = <0>;
779 };
780 timing@1 { /* 4k */
781 qcom,mdss-dsi-panel-phy-timings = [00 18 06 06 21 20 06
782 06 04 03 04 00];
783 qcom,display-topology = <2 2 2>;
784 qcom,default-topology-index = <0>;
785 };
786 };
787};
Vishnuvardhan Prodduturi080447f2017-10-12 13:19:50 +0530[diff] [blame]788
789&dsi_dual_nt35597_video {
790 qcom,mdss-dsi-t-clk-post = <0x0d>;
791 qcom,mdss-dsi-t-clk-pre = <0x2d>;
792 qcom,mdss-dsi-display-timings {
793 timing@0 {
794 qcom,mdss-dsi-panel-timings = [00 1c 08 07 23 22 07 07
795 05 03 04 00];
796 qcom,display-topology = <2 0 2>,
797 <1 0 2>;
798 qcom,default-topology-index = <0>;
799 };
800 };
801};
802
803&dsi_dual_nt35597_cmd {
804 qcom,mdss-dsi-t-clk-post = <0x0d>;
805 qcom,mdss-dsi-t-clk-pre = <0x2d>;
806 qcom,mdss-dsi-display-timings {
807 timing@0 {
808 qcom,mdss-dsi-panel-timings = [00 1c 08 07 23 22 07 07
809 05 03 04 00];
810 qcom,display-topology = <2 0 2>,
811 <1 0 2>;
812 qcom,default-topology-index = <0>;
813 };
814 };
815};
Yuan Zhao5c425aa2017-11-17 10:56:49 +0800[diff] [blame]816
817&dsi_dual_nt36850_truly_cmd {
818 qcom,mdss-dsi-t-clk-post = <0x0E>;
819 qcom,mdss-dsi-t-clk-pre = <0x30>;
820 qcom,mdss-dsi-display-timings {
821 timing@0 {
822 qcom,mdss-dsi-panel-phy-timings = [00 1f 08 08 24 23 08
823 08 05 03 04 00];
824 qcom,display-topology = <2 0 2>,
825 <1 0 2>;
826 qcom,default-topology-index = <0>;
827 };
828 };
829};