Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1 | /**************************************************************************** |
Ben Hutchings | f7a6d2c | 2013-08-29 23:32:48 +0100 | [diff] [blame] | 2 | * Driver for Solarflare network controllers and boards |
| 3 | * Copyright 2008-2013 Solarflare Communications Inc. |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published |
| 7 | * by the Free Software Foundation, incorporated herein by reference. |
| 8 | */ |
| 9 | |
| 10 | #include <linux/delay.h> |
Edward Cree | 42ca087 | 2015-05-27 13:14:26 +0100 | [diff] [blame] | 11 | #include <linux/moduleparam.h> |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 12 | #include <asm/cmpxchg.h> |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 13 | #include "net_driver.h" |
| 14 | #include "nic.h" |
| 15 | #include "io.h" |
Ben Hutchings | 8b8a95a | 2012-09-18 01:57:07 +0100 | [diff] [blame] | 16 | #include "farch_regs.h" |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 17 | #include "mcdi_pcol.h" |
| 18 | #include "phy.h" |
| 19 | |
| 20 | /************************************************************************** |
| 21 | * |
| 22 | * Management-Controller-to-Driver Interface |
| 23 | * |
| 24 | ************************************************************************** |
| 25 | */ |
| 26 | |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 27 | #define MCDI_RPC_TIMEOUT (10 * HZ) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 28 | |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 29 | /* A reboot/assertion causes the MCDI status word to be set after the |
| 30 | * command word is set or a REBOOT event is sent. If we notice a reboot |
Daniel Pieczko | b2d32f0 | 2013-09-20 16:45:10 +0100 | [diff] [blame] | 31 | * via these mechanisms then wait 250ms for the status word to be set. |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 32 | */ |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 33 | #define MCDI_STATUS_DELAY_US 100 |
Daniel Pieczko | b2d32f0 | 2013-09-20 16:45:10 +0100 | [diff] [blame] | 34 | #define MCDI_STATUS_DELAY_COUNT 2500 |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 35 | #define MCDI_STATUS_SLEEP_MS \ |
| 36 | (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 37 | |
| 38 | #define SEQ_MASK \ |
| 39 | EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ)) |
| 40 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 41 | struct efx_mcdi_async_param { |
| 42 | struct list_head list; |
| 43 | unsigned int cmd; |
| 44 | size_t inlen; |
| 45 | size_t outlen; |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 46 | bool quiet; |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 47 | efx_mcdi_async_completer *complete; |
| 48 | unsigned long cookie; |
| 49 | /* followed by request/response buffer */ |
| 50 | }; |
| 51 | |
| 52 | static void efx_mcdi_timeout_async(unsigned long context); |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 53 | static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, |
| 54 | bool *was_attached_out); |
Robert Stonehouse | 5731d7b | 2013-10-09 11:52:43 +0100 | [diff] [blame] | 55 | static bool efx_mcdi_poll_once(struct efx_nic *efx); |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 56 | static void efx_mcdi_abandon(struct efx_nic *efx); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 57 | |
Edward Cree | 42ca087 | 2015-05-27 13:14:26 +0100 | [diff] [blame] | 58 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 59 | static bool mcdi_logging_default; |
| 60 | module_param(mcdi_logging_default, bool, 0644); |
| 61 | MODULE_PARM_DESC(mcdi_logging_default, |
| 62 | "Enable MCDI logging on newly-probed functions"); |
| 63 | #endif |
| 64 | |
Ben Hutchings | f073dde | 2012-09-18 02:33:55 +0100 | [diff] [blame] | 65 | int efx_mcdi_init(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 66 | { |
| 67 | struct efx_mcdi_iface *mcdi; |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 68 | bool already_attached; |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 69 | int rc = -ENOMEM; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 70 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 71 | efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL); |
| 72 | if (!efx->mcdi) |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 73 | goto fail; |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 74 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 75 | mcdi = efx_mcdi(efx); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 76 | mcdi->efx = efx; |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 77 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 78 | /* consuming code assumes buffer is page-sized */ |
| 79 | mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL); |
| 80 | if (!mcdi->logging_buffer) |
| 81 | goto fail1; |
Edward Cree | 42ca087 | 2015-05-27 13:14:26 +0100 | [diff] [blame] | 82 | mcdi->logging_enabled = mcdi_logging_default; |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 83 | #endif |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 84 | init_waitqueue_head(&mcdi->wq); |
| 85 | spin_lock_init(&mcdi->iface_lock); |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 86 | mcdi->state = MCDI_STATE_QUIESCENT; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 87 | mcdi->mode = MCDI_MODE_POLL; |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 88 | spin_lock_init(&mcdi->async_lock); |
| 89 | INIT_LIST_HEAD(&mcdi->async_list); |
| 90 | setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async, |
| 91 | (unsigned long)mcdi); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 92 | |
| 93 | (void) efx_mcdi_poll_reboot(efx); |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 94 | mcdi->new_epoch = true; |
Ben Hutchings | f073dde | 2012-09-18 02:33:55 +0100 | [diff] [blame] | 95 | |
| 96 | /* Recover from a failed assertion before probing */ |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 97 | rc = efx_mcdi_handle_assertion(efx); |
| 98 | if (rc) |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 99 | goto fail2; |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 100 | |
| 101 | /* Let the MC (and BMC, if this is a LOM) know that the driver |
| 102 | * is loaded. We should do this before we reset the NIC. |
| 103 | */ |
| 104 | rc = efx_mcdi_drv_attach(efx, true, &already_attached); |
| 105 | if (rc) { |
| 106 | netif_err(efx, probe, efx->net_dev, |
| 107 | "Unable to register driver with MCPU\n"); |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 108 | goto fail2; |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 109 | } |
| 110 | if (already_attached) |
| 111 | /* Not a fatal error */ |
| 112 | netif_err(efx, probe, efx->net_dev, |
| 113 | "Host already registered with MCPU\n"); |
| 114 | |
Ben Hutchings | 0bcf4a6 | 2013-10-18 19:21:45 +0100 | [diff] [blame] | 115 | if (efx->mcdi->fn_flags & |
| 116 | (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY)) |
| 117 | efx->primary = efx; |
| 118 | |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 119 | return 0; |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 120 | fail2: |
| 121 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 122 | free_page((unsigned long)mcdi->logging_buffer); |
| 123 | fail1: |
| 124 | #endif |
| 125 | kfree(efx->mcdi); |
| 126 | efx->mcdi = NULL; |
| 127 | fail: |
| 128 | return rc; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 129 | } |
| 130 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 131 | void efx_mcdi_fini(struct efx_nic *efx) |
| 132 | { |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 133 | if (!efx->mcdi) |
| 134 | return; |
| 135 | |
| 136 | BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT); |
| 137 | |
| 138 | /* Relinquish the device (back to the BMC, if this is a LOM) */ |
| 139 | efx_mcdi_drv_attach(efx, false, NULL); |
| 140 | |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 141 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 142 | free_page((unsigned long)efx->mcdi->iface.logging_buffer); |
| 143 | #endif |
| 144 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 145 | kfree(efx->mcdi); |
| 146 | } |
| 147 | |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 148 | static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd, |
| 149 | const efx_dword_t *inbuf, size_t inlen) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 150 | { |
| 151 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 152 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 153 | char *buf = mcdi->logging_buffer; /* page-sized */ |
| 154 | #endif |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 155 | efx_dword_t hdr[2]; |
| 156 | size_t hdr_len; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 157 | u32 xflags, seqno; |
| 158 | |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 159 | BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 160 | |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 161 | /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */ |
| 162 | spin_lock_bh(&mcdi->iface_lock); |
| 163 | ++mcdi->seqno; |
| 164 | spin_unlock_bh(&mcdi->iface_lock); |
| 165 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 166 | seqno = mcdi->seqno & SEQ_MASK; |
| 167 | xflags = 0; |
| 168 | if (mcdi->mode == MCDI_MODE_EVENTS) |
| 169 | xflags |= MCDI_HEADER_XFLAGS_EVREQ; |
| 170 | |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 171 | if (efx->type->mcdi_max_ver == 1) { |
| 172 | /* MCDI v1 */ |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 173 | EFX_POPULATE_DWORD_7(hdr[0], |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 174 | MCDI_HEADER_RESPONSE, 0, |
| 175 | MCDI_HEADER_RESYNC, 1, |
| 176 | MCDI_HEADER_CODE, cmd, |
| 177 | MCDI_HEADER_DATALEN, inlen, |
| 178 | MCDI_HEADER_SEQ, seqno, |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 179 | MCDI_HEADER_XFLAGS, xflags, |
| 180 | MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 181 | hdr_len = 4; |
| 182 | } else { |
| 183 | /* MCDI v2 */ |
| 184 | BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2); |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 185 | EFX_POPULATE_DWORD_7(hdr[0], |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 186 | MCDI_HEADER_RESPONSE, 0, |
| 187 | MCDI_HEADER_RESYNC, 1, |
| 188 | MCDI_HEADER_CODE, MC_CMD_V2_EXTN, |
| 189 | MCDI_HEADER_DATALEN, 0, |
| 190 | MCDI_HEADER_SEQ, seqno, |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 191 | MCDI_HEADER_XFLAGS, xflags, |
| 192 | MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 193 | EFX_POPULATE_DWORD_2(hdr[1], |
| 194 | MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd, |
| 195 | MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen); |
| 196 | hdr_len = 8; |
| 197 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 198 | |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 199 | #ifdef CONFIG_SFC_MCDI_LOGGING |
Edward Cree | e7fef9b | 2015-05-27 13:14:01 +0100 | [diff] [blame] | 200 | if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 201 | int bytes = 0; |
| 202 | int i; |
| 203 | /* Lengths should always be a whole number of dwords, so scream |
| 204 | * if they're not. |
| 205 | */ |
| 206 | WARN_ON_ONCE(hdr_len % 4); |
| 207 | WARN_ON_ONCE(inlen % 4); |
| 208 | |
| 209 | /* We own the logging buffer, as only one MCDI can be in |
| 210 | * progress on a NIC at any one time. So no need for locking. |
| 211 | */ |
| 212 | for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++) |
| 213 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, |
| 214 | " %08x", le32_to_cpu(hdr[i].u32[0])); |
| 215 | |
| 216 | for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++) |
| 217 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, |
| 218 | " %08x", le32_to_cpu(inbuf[i].u32[0])); |
| 219 | |
| 220 | netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf); |
| 221 | } |
| 222 | #endif |
| 223 | |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 224 | efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen); |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 225 | |
| 226 | mcdi->new_epoch = false; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 227 | } |
| 228 | |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 229 | static int efx_mcdi_errno(unsigned int mcdi_err) |
| 230 | { |
| 231 | switch (mcdi_err) { |
| 232 | case 0: |
| 233 | return 0; |
| 234 | #define TRANSLATE_ERROR(name) \ |
| 235 | case MC_CMD_ERR_ ## name: \ |
| 236 | return -name; |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 237 | TRANSLATE_ERROR(EPERM); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 238 | TRANSLATE_ERROR(ENOENT); |
| 239 | TRANSLATE_ERROR(EINTR); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 240 | TRANSLATE_ERROR(EAGAIN); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 241 | TRANSLATE_ERROR(EACCES); |
| 242 | TRANSLATE_ERROR(EBUSY); |
| 243 | TRANSLATE_ERROR(EINVAL); |
| 244 | TRANSLATE_ERROR(EDEADLK); |
| 245 | TRANSLATE_ERROR(ENOSYS); |
| 246 | TRANSLATE_ERROR(ETIME); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 247 | TRANSLATE_ERROR(EALREADY); |
| 248 | TRANSLATE_ERROR(ENOSPC); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 249 | #undef TRANSLATE_ERROR |
Ben Hutchings | ea136ae | 2013-10-08 16:36:58 +0100 | [diff] [blame] | 250 | case MC_CMD_ERR_ENOTSUP: |
| 251 | return -EOPNOTSUPP; |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 252 | case MC_CMD_ERR_ALLOC_FAIL: |
| 253 | return -ENOBUFS; |
| 254 | case MC_CMD_ERR_MAC_EXIST: |
| 255 | return -EADDRINUSE; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 256 | default: |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 257 | return -EPROTO; |
| 258 | } |
| 259 | } |
| 260 | |
| 261 | static void efx_mcdi_read_response_header(struct efx_nic *efx) |
| 262 | { |
| 263 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 264 | unsigned int respseq, respcmd, error; |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 265 | #ifdef CONFIG_SFC_MCDI_LOGGING |
| 266 | char *buf = mcdi->logging_buffer; /* page-sized */ |
| 267 | #endif |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 268 | efx_dword_t hdr; |
| 269 | |
| 270 | efx->type->mcdi_read_response(efx, &hdr, 0, 4); |
| 271 | respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ); |
| 272 | respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE); |
| 273 | error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR); |
| 274 | |
| 275 | if (respcmd != MC_CMD_V2_EXTN) { |
| 276 | mcdi->resp_hdr_len = 4; |
| 277 | mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN); |
| 278 | } else { |
| 279 | efx->type->mcdi_read_response(efx, &hdr, 4, 4); |
| 280 | mcdi->resp_hdr_len = 8; |
| 281 | mcdi->resp_data_len = |
| 282 | EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN); |
| 283 | } |
| 284 | |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 285 | #ifdef CONFIG_SFC_MCDI_LOGGING |
Edward Cree | e7fef9b | 2015-05-27 13:14:01 +0100 | [diff] [blame] | 286 | if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { |
Edward Cree | 75aba2a | 2015-05-27 13:13:54 +0100 | [diff] [blame] | 287 | size_t hdr_len, data_len; |
| 288 | int bytes = 0; |
| 289 | int i; |
| 290 | |
| 291 | WARN_ON_ONCE(mcdi->resp_hdr_len % 4); |
| 292 | hdr_len = mcdi->resp_hdr_len / 4; |
| 293 | /* MCDI_DECLARE_BUF ensures that underlying buffer is padded |
| 294 | * to dword size, and the MCDI buffer is always dword size |
| 295 | */ |
| 296 | data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4); |
| 297 | |
| 298 | /* We own the logging buffer, as only one MCDI can be in |
| 299 | * progress on a NIC at any one time. So no need for locking. |
| 300 | */ |
| 301 | for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) { |
| 302 | efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4); |
| 303 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, |
| 304 | " %08x", le32_to_cpu(hdr.u32[0])); |
| 305 | } |
| 306 | |
| 307 | for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) { |
| 308 | efx->type->mcdi_read_response(efx, &hdr, |
| 309 | mcdi->resp_hdr_len + (i * 4), 4); |
| 310 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, |
| 311 | " %08x", le32_to_cpu(hdr.u32[0])); |
| 312 | } |
| 313 | |
| 314 | netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf); |
| 315 | } |
| 316 | #endif |
| 317 | |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 318 | if (error && mcdi->resp_data_len == 0) { |
| 319 | netif_err(efx, hw, efx->net_dev, "MC rebooted\n"); |
| 320 | mcdi->resprc = -EIO; |
| 321 | } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) { |
| 322 | netif_err(efx, hw, efx->net_dev, |
| 323 | "MC response mismatch tx seq 0x%x rx seq 0x%x\n", |
| 324 | respseq, mcdi->seqno); |
| 325 | mcdi->resprc = -EIO; |
| 326 | } else if (error) { |
| 327 | efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4); |
| 328 | mcdi->resprc = |
| 329 | efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0)); |
| 330 | } else { |
| 331 | mcdi->resprc = 0; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 332 | } |
| 333 | } |
| 334 | |
Robert Stonehouse | 5731d7b | 2013-10-09 11:52:43 +0100 | [diff] [blame] | 335 | static bool efx_mcdi_poll_once(struct efx_nic *efx) |
| 336 | { |
| 337 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 338 | |
| 339 | rmb(); |
| 340 | if (!efx->type->mcdi_poll_response(efx)) |
| 341 | return false; |
| 342 | |
| 343 | spin_lock_bh(&mcdi->iface_lock); |
| 344 | efx_mcdi_read_response_header(efx); |
| 345 | spin_unlock_bh(&mcdi->iface_lock); |
| 346 | |
| 347 | return true; |
| 348 | } |
| 349 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 350 | static int efx_mcdi_poll(struct efx_nic *efx) |
| 351 | { |
| 352 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 353 | unsigned long time, finish; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 354 | unsigned int spins; |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 355 | int rc; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 356 | |
| 357 | /* Check for a reboot atomically with respect to efx_mcdi_copyout() */ |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 358 | rc = efx_mcdi_poll_reboot(efx); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 359 | if (rc) { |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 360 | spin_lock_bh(&mcdi->iface_lock); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 361 | mcdi->resprc = rc; |
| 362 | mcdi->resp_hdr_len = 0; |
| 363 | mcdi->resp_data_len = 0; |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 364 | spin_unlock_bh(&mcdi->iface_lock); |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 365 | return 0; |
| 366 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 367 | |
| 368 | /* Poll for completion. Poll quickly (once a us) for the 1st jiffy, |
| 369 | * because generally mcdi responses are fast. After that, back off |
| 370 | * and poll once a jiffy (approximately) |
| 371 | */ |
| 372 | spins = TICK_USEC; |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 373 | finish = jiffies + MCDI_RPC_TIMEOUT; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 374 | |
| 375 | while (1) { |
| 376 | if (spins != 0) { |
| 377 | --spins; |
| 378 | udelay(1); |
Ben Hutchings | 55029c1 | 2010-01-13 04:34:25 +0000 | [diff] [blame] | 379 | } else { |
| 380 | schedule_timeout_uninterruptible(1); |
| 381 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 382 | |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 383 | time = jiffies; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 384 | |
Robert Stonehouse | 5731d7b | 2013-10-09 11:52:43 +0100 | [diff] [blame] | 385 | if (efx_mcdi_poll_once(efx)) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 386 | break; |
| 387 | |
Ben Hutchings | ebf98e7 | 2012-12-01 02:21:17 +0000 | [diff] [blame] | 388 | if (time_after(time, finish)) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 389 | return -ETIMEDOUT; |
| 390 | } |
| 391 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 392 | /* Return rc=0 like wait_event_timeout() */ |
| 393 | return 0; |
| 394 | } |
| 395 | |
Ben Hutchings | 876be08 | 2012-10-01 20:58:35 +0100 | [diff] [blame] | 396 | /* Test and clear MC-rebooted flag for this port/function; reset |
| 397 | * software state as necessary. |
| 398 | */ |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 399 | int efx_mcdi_poll_reboot(struct efx_nic *efx) |
| 400 | { |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 401 | if (!efx->mcdi) |
| 402 | return 0; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 403 | |
Ben Hutchings | cd0ecc9 | 2012-12-14 21:52:56 +0000 | [diff] [blame] | 404 | return efx->type->mcdi_poll_reboot(efx); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 405 | } |
| 406 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 407 | static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi) |
| 408 | { |
| 409 | return cmpxchg(&mcdi->state, |
| 410 | MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) == |
| 411 | MCDI_STATE_QUIESCENT; |
| 412 | } |
| 413 | |
| 414 | static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 415 | { |
| 416 | /* Wait until the interface becomes QUIESCENT and we win the race |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 417 | * to mark it RUNNING_SYNC. |
| 418 | */ |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 419 | wait_event(mcdi->wq, |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 420 | cmpxchg(&mcdi->state, |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 421 | MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) == |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 422 | MCDI_STATE_QUIESCENT); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 423 | } |
| 424 | |
| 425 | static int efx_mcdi_await_completion(struct efx_nic *efx) |
| 426 | { |
| 427 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 428 | |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 429 | if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED, |
| 430 | MCDI_RPC_TIMEOUT) == 0) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 431 | return -ETIMEDOUT; |
| 432 | |
| 433 | /* Check if efx_mcdi_set_mode() switched us back to polled completions. |
| 434 | * In which case, poll for completions directly. If efx_mcdi_ev_cpl() |
| 435 | * completed the request first, then we'll just end up completing the |
| 436 | * request again, which is safe. |
| 437 | * |
| 438 | * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which |
| 439 | * wait_event_timeout() implicitly provides. |
| 440 | */ |
| 441 | if (mcdi->mode == MCDI_MODE_POLL) |
| 442 | return efx_mcdi_poll(efx); |
| 443 | |
| 444 | return 0; |
| 445 | } |
| 446 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 447 | /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the |
| 448 | * requester. Return whether this was done. Does not take any locks. |
| 449 | */ |
| 450 | static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 451 | { |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 452 | if (cmpxchg(&mcdi->state, |
| 453 | MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) == |
| 454 | MCDI_STATE_RUNNING_SYNC) { |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 455 | wake_up(&mcdi->wq); |
| 456 | return true; |
| 457 | } |
| 458 | |
| 459 | return false; |
| 460 | } |
| 461 | |
| 462 | static void efx_mcdi_release(struct efx_mcdi_iface *mcdi) |
| 463 | { |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 464 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
| 465 | struct efx_mcdi_async_param *async; |
| 466 | struct efx_nic *efx = mcdi->efx; |
| 467 | |
| 468 | /* Process the asynchronous request queue */ |
| 469 | spin_lock_bh(&mcdi->async_lock); |
| 470 | async = list_first_entry_or_null( |
| 471 | &mcdi->async_list, struct efx_mcdi_async_param, list); |
| 472 | if (async) { |
| 473 | mcdi->state = MCDI_STATE_RUNNING_ASYNC; |
| 474 | efx_mcdi_send_request(efx, async->cmd, |
| 475 | (const efx_dword_t *)(async + 1), |
| 476 | async->inlen); |
| 477 | mod_timer(&mcdi->async_timer, |
| 478 | jiffies + MCDI_RPC_TIMEOUT); |
| 479 | } |
| 480 | spin_unlock_bh(&mcdi->async_lock); |
| 481 | |
| 482 | if (async) |
| 483 | return; |
| 484 | } |
| 485 | |
Ben Hutchings | 251111d | 2013-08-27 23:04:29 +0100 | [diff] [blame] | 486 | mcdi->state = MCDI_STATE_QUIESCENT; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 487 | wake_up(&mcdi->wq); |
| 488 | } |
| 489 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 490 | /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the |
| 491 | * asynchronous completion function, and release the interface. |
| 492 | * Return whether this was done. Must be called in bh-disabled |
| 493 | * context. Will take iface_lock and async_lock. |
| 494 | */ |
| 495 | static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout) |
| 496 | { |
| 497 | struct efx_nic *efx = mcdi->efx; |
| 498 | struct efx_mcdi_async_param *async; |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 499 | size_t hdr_len, data_len, err_len; |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 500 | efx_dword_t *outbuf; |
Jon Cooper | aa09a3d | 2015-05-20 11:10:41 +0100 | [diff] [blame] | 501 | MCDI_DECLARE_BUF_ERR(errbuf); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 502 | int rc; |
| 503 | |
| 504 | if (cmpxchg(&mcdi->state, |
| 505 | MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) != |
| 506 | MCDI_STATE_RUNNING_ASYNC) |
| 507 | return false; |
| 508 | |
| 509 | spin_lock(&mcdi->iface_lock); |
| 510 | if (timeout) { |
| 511 | /* Ensure that if the completion event arrives later, |
| 512 | * the seqno check in efx_mcdi_ev_cpl() will fail |
| 513 | */ |
| 514 | ++mcdi->seqno; |
| 515 | ++mcdi->credits; |
| 516 | rc = -ETIMEDOUT; |
| 517 | hdr_len = 0; |
| 518 | data_len = 0; |
| 519 | } else { |
| 520 | rc = mcdi->resprc; |
| 521 | hdr_len = mcdi->resp_hdr_len; |
| 522 | data_len = mcdi->resp_data_len; |
| 523 | } |
| 524 | spin_unlock(&mcdi->iface_lock); |
| 525 | |
| 526 | /* Stop the timer. In case the timer function is running, we |
| 527 | * must wait for it to return so that there is no possibility |
| 528 | * of it aborting the next request. |
| 529 | */ |
| 530 | if (!timeout) |
| 531 | del_timer_sync(&mcdi->async_timer); |
| 532 | |
| 533 | spin_lock(&mcdi->async_lock); |
| 534 | async = list_first_entry(&mcdi->async_list, |
| 535 | struct efx_mcdi_async_param, list); |
| 536 | list_del(&async->list); |
| 537 | spin_unlock(&mcdi->async_lock); |
| 538 | |
| 539 | outbuf = (efx_dword_t *)(async + 1); |
| 540 | efx->type->mcdi_read_response(efx, outbuf, hdr_len, |
| 541 | min(async->outlen, data_len)); |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 542 | if (!timeout && rc && !async->quiet) { |
| 543 | err_len = min(sizeof(errbuf), data_len); |
| 544 | efx->type->mcdi_read_response(efx, errbuf, hdr_len, |
| 545 | sizeof(errbuf)); |
| 546 | efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf, |
| 547 | err_len, rc); |
| 548 | } |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 549 | async->complete(efx, async->cookie, rc, outbuf, data_len); |
| 550 | kfree(async); |
| 551 | |
| 552 | efx_mcdi_release(mcdi); |
| 553 | |
| 554 | return true; |
| 555 | } |
| 556 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 557 | static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno, |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 558 | unsigned int datalen, unsigned int mcdi_err) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 559 | { |
| 560 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 561 | bool wake = false; |
| 562 | |
| 563 | spin_lock(&mcdi->iface_lock); |
| 564 | |
| 565 | if ((seqno ^ mcdi->seqno) & SEQ_MASK) { |
| 566 | if (mcdi->credits) |
| 567 | /* The request has been cancelled */ |
| 568 | --mcdi->credits; |
| 569 | else |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 570 | netif_err(efx, hw, efx->net_dev, |
| 571 | "MC response mismatch tx seq 0x%x rx " |
| 572 | "seq 0x%x\n", seqno, mcdi->seqno); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 573 | } else { |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 574 | if (efx->type->mcdi_max_ver >= 2) { |
| 575 | /* MCDI v2 responses don't fit in an event */ |
| 576 | efx_mcdi_read_response_header(efx); |
| 577 | } else { |
| 578 | mcdi->resprc = efx_mcdi_errno(mcdi_err); |
| 579 | mcdi->resp_hdr_len = 4; |
| 580 | mcdi->resp_data_len = datalen; |
| 581 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 582 | |
| 583 | wake = true; |
| 584 | } |
| 585 | |
| 586 | spin_unlock(&mcdi->iface_lock); |
| 587 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 588 | if (wake) { |
| 589 | if (!efx_mcdi_complete_async(mcdi, false)) |
| 590 | (void) efx_mcdi_complete_sync(mcdi); |
| 591 | |
| 592 | /* If the interface isn't RUNNING_ASYNC or |
| 593 | * RUNNING_SYNC then we've received a duplicate |
| 594 | * completion after we've already transitioned back to |
| 595 | * QUIESCENT. [A subsequent invocation would increment |
| 596 | * seqno, so would have failed the seqno check]. |
| 597 | */ |
| 598 | } |
| 599 | } |
| 600 | |
| 601 | static void efx_mcdi_timeout_async(unsigned long context) |
| 602 | { |
| 603 | struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context; |
| 604 | |
| 605 | efx_mcdi_complete_async(mcdi, true); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 606 | } |
| 607 | |
Ben Hutchings | 2f4bcdc | 2013-08-22 22:06:09 +0100 | [diff] [blame] | 608 | static int |
| 609 | efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen) |
| 610 | { |
| 611 | if (efx->type->mcdi_max_ver < 0 || |
| 612 | (efx->type->mcdi_max_ver < 2 && |
| 613 | cmd > MC_CMD_CMD_SPACE_ESCAPE_7)) |
| 614 | return -EINVAL; |
| 615 | |
| 616 | if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 || |
| 617 | (efx->type->mcdi_max_ver < 2 && |
| 618 | inlen > MCDI_CTL_SDU_LEN_MAX_V1)) |
| 619 | return -EMSGSIZE; |
| 620 | |
| 621 | return 0; |
| 622 | } |
| 623 | |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 624 | static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen, |
| 625 | efx_dword_t *outbuf, size_t outlen, |
| 626 | size_t *outlen_actual, bool quiet) |
Stuart Hodgson | c3cba72 | 2012-07-16 17:40:47 +0100 | [diff] [blame] | 627 | { |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 628 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
Jon Cooper | aa09a3d | 2015-05-20 11:10:41 +0100 | [diff] [blame] | 629 | MCDI_DECLARE_BUF_ERR(errbuf); |
Stuart Hodgson | c3cba72 | 2012-07-16 17:40:47 +0100 | [diff] [blame] | 630 | int rc; |
| 631 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 632 | if (mcdi->mode == MCDI_MODE_POLL) |
| 633 | rc = efx_mcdi_poll(efx); |
| 634 | else |
| 635 | rc = efx_mcdi_await_completion(efx); |
| 636 | |
| 637 | if (rc != 0) { |
Robert Stonehouse | 6b294b8 | 2013-10-09 11:52:48 +0100 | [diff] [blame] | 638 | netif_err(efx, hw, efx->net_dev, |
| 639 | "MC command 0x%x inlen %d mode %d timed out\n", |
| 640 | cmd, (int)inlen, mcdi->mode); |
| 641 | |
| 642 | if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) { |
| 643 | netif_err(efx, hw, efx->net_dev, |
| 644 | "MCDI request was completed without an event\n"); |
| 645 | rc = 0; |
| 646 | } |
| 647 | |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 648 | efx_mcdi_abandon(efx); |
| 649 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 650 | /* Close the race with efx_mcdi_ev_cpl() executing just too late |
| 651 | * and completing a request we've just cancelled, by ensuring |
| 652 | * that the seqno check therein fails. |
| 653 | */ |
| 654 | spin_lock_bh(&mcdi->iface_lock); |
| 655 | ++mcdi->seqno; |
| 656 | ++mcdi->credits; |
| 657 | spin_unlock_bh(&mcdi->iface_lock); |
Robert Stonehouse | 6b294b8 | 2013-10-09 11:52:48 +0100 | [diff] [blame] | 658 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 659 | |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 660 | if (rc != 0) { |
| 661 | if (outlen_actual) |
| 662 | *outlen_actual = 0; |
| 663 | } else { |
| 664 | size_t hdr_len, data_len, err_len; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 665 | |
| 666 | /* At the very least we need a memory barrier here to ensure |
| 667 | * we pick up changes from efx_mcdi_ev_cpl(). Protect against |
| 668 | * a spurious efx_mcdi_ev_cpl() running concurrently by |
| 669 | * acquiring the iface_lock. */ |
| 670 | spin_lock_bh(&mcdi->iface_lock); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 671 | rc = mcdi->resprc; |
Ben Hutchings | 369327f | 2012-10-26 17:53:12 +0100 | [diff] [blame] | 672 | hdr_len = mcdi->resp_hdr_len; |
| 673 | data_len = mcdi->resp_data_len; |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 674 | err_len = min(sizeof(errbuf), data_len); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 675 | spin_unlock_bh(&mcdi->iface_lock); |
| 676 | |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 677 | BUG_ON(rc > 0); |
| 678 | |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 679 | efx->type->mcdi_read_response(efx, outbuf, hdr_len, |
| 680 | min(outlen, data_len)); |
| 681 | if (outlen_actual) |
| 682 | *outlen_actual = data_len; |
| 683 | |
| 684 | efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len); |
| 685 | |
| 686 | if (cmd == MC_CMD_REBOOT && rc == -EIO) { |
| 687 | /* Don't reset if MC_CMD_REBOOT returns EIO */ |
| 688 | } else if (rc == -EIO || rc == -EINTR) { |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 689 | netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n", |
| 690 | -rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 691 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 692 | } else if (rc && !quiet) { |
| 693 | efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len, |
| 694 | rc); |
| 695 | } |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 696 | |
| 697 | if (rc == -EIO || rc == -EINTR) { |
| 698 | msleep(MCDI_STATUS_SLEEP_MS); |
| 699 | efx_mcdi_poll_reboot(efx); |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 700 | mcdi->new_epoch = true; |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 701 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 702 | } |
| 703 | |
| 704 | efx_mcdi_release(mcdi); |
| 705 | return rc; |
| 706 | } |
| 707 | |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 708 | static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd, |
| 709 | const efx_dword_t *inbuf, size_t inlen, |
| 710 | efx_dword_t *outbuf, size_t outlen, |
| 711 | size_t *outlen_actual, bool quiet) |
| 712 | { |
| 713 | int rc; |
| 714 | |
| 715 | rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen); |
| 716 | if (rc) { |
| 717 | if (outlen_actual) |
| 718 | *outlen_actual = 0; |
| 719 | return rc; |
| 720 | } |
| 721 | return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, |
| 722 | outlen_actual, quiet); |
| 723 | } |
| 724 | |
| 725 | int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd, |
| 726 | const efx_dword_t *inbuf, size_t inlen, |
| 727 | efx_dword_t *outbuf, size_t outlen, |
| 728 | size_t *outlen_actual) |
| 729 | { |
| 730 | return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen, |
| 731 | outlen_actual, false); |
| 732 | } |
| 733 | |
| 734 | /* Normally, on receiving an error code in the MCDI response, |
| 735 | * efx_mcdi_rpc will log an error message containing (among other |
| 736 | * things) the raw error code, by means of efx_mcdi_display_error. |
| 737 | * This _quiet version suppresses that; if the caller wishes to log |
| 738 | * the error conditionally on the return code, it should call this |
| 739 | * function and is then responsible for calling efx_mcdi_display_error |
| 740 | * as needed. |
| 741 | */ |
| 742 | int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd, |
| 743 | const efx_dword_t *inbuf, size_t inlen, |
| 744 | efx_dword_t *outbuf, size_t outlen, |
| 745 | size_t *outlen_actual) |
| 746 | { |
| 747 | return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen, |
| 748 | outlen_actual, true); |
| 749 | } |
| 750 | |
| 751 | int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd, |
| 752 | const efx_dword_t *inbuf, size_t inlen) |
| 753 | { |
| 754 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 755 | int rc; |
| 756 | |
| 757 | rc = efx_mcdi_check_supported(efx, cmd, inlen); |
| 758 | if (rc) |
| 759 | return rc; |
| 760 | |
| 761 | if (efx->mc_bist_for_other_fn) |
| 762 | return -ENETDOWN; |
| 763 | |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 764 | if (mcdi->mode == MCDI_MODE_FAIL) |
| 765 | return -ENETDOWN; |
| 766 | |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 767 | efx_mcdi_acquire_sync(mcdi); |
| 768 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); |
| 769 | return 0; |
| 770 | } |
| 771 | |
| 772 | static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, |
| 773 | const efx_dword_t *inbuf, size_t inlen, |
| 774 | size_t outlen, |
| 775 | efx_mcdi_async_completer *complete, |
| 776 | unsigned long cookie, bool quiet) |
| 777 | { |
| 778 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 779 | struct efx_mcdi_async_param *async; |
| 780 | int rc; |
| 781 | |
| 782 | rc = efx_mcdi_check_supported(efx, cmd, inlen); |
| 783 | if (rc) |
| 784 | return rc; |
| 785 | |
| 786 | if (efx->mc_bist_for_other_fn) |
| 787 | return -ENETDOWN; |
| 788 | |
| 789 | async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4), |
| 790 | GFP_ATOMIC); |
| 791 | if (!async) |
| 792 | return -ENOMEM; |
| 793 | |
| 794 | async->cmd = cmd; |
| 795 | async->inlen = inlen; |
| 796 | async->outlen = outlen; |
| 797 | async->quiet = quiet; |
| 798 | async->complete = complete; |
| 799 | async->cookie = cookie; |
| 800 | memcpy(async + 1, inbuf, inlen); |
| 801 | |
| 802 | spin_lock_bh(&mcdi->async_lock); |
| 803 | |
| 804 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
| 805 | list_add_tail(&async->list, &mcdi->async_list); |
| 806 | |
| 807 | /* If this is at the front of the queue, try to start it |
| 808 | * immediately |
| 809 | */ |
| 810 | if (mcdi->async_list.next == &async->list && |
| 811 | efx_mcdi_acquire_async(mcdi)) { |
| 812 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); |
| 813 | mod_timer(&mcdi->async_timer, |
| 814 | jiffies + MCDI_RPC_TIMEOUT); |
| 815 | } |
| 816 | } else { |
| 817 | kfree(async); |
| 818 | rc = -ENETDOWN; |
| 819 | } |
| 820 | |
| 821 | spin_unlock_bh(&mcdi->async_lock); |
| 822 | |
| 823 | return rc; |
| 824 | } |
| 825 | |
| 826 | /** |
| 827 | * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously |
| 828 | * @efx: NIC through which to issue the command |
| 829 | * @cmd: Command type number |
| 830 | * @inbuf: Command parameters |
| 831 | * @inlen: Length of command parameters, in bytes |
| 832 | * @outlen: Length to allocate for response buffer, in bytes |
| 833 | * @complete: Function to be called on completion or cancellation. |
| 834 | * @cookie: Arbitrary value to be passed to @complete. |
| 835 | * |
| 836 | * This function does not sleep and therefore may be called in atomic |
| 837 | * context. It will fail if event queues are disabled or if MCDI |
| 838 | * event completions have been disabled due to an error. |
| 839 | * |
| 840 | * If it succeeds, the @complete function will be called exactly once |
| 841 | * in atomic context, when one of the following occurs: |
| 842 | * (a) the completion event is received (in NAPI context) |
| 843 | * (b) event queues are disabled (in the process that disables them) |
| 844 | * (c) the request times-out (in timer context) |
| 845 | */ |
| 846 | int |
| 847 | efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, |
| 848 | const efx_dword_t *inbuf, size_t inlen, size_t outlen, |
| 849 | efx_mcdi_async_completer *complete, unsigned long cookie) |
| 850 | { |
| 851 | return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, |
| 852 | cookie, false); |
| 853 | } |
| 854 | |
| 855 | int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd, |
| 856 | const efx_dword_t *inbuf, size_t inlen, |
| 857 | size_t outlen, efx_mcdi_async_completer *complete, |
| 858 | unsigned long cookie) |
| 859 | { |
| 860 | return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, |
| 861 | cookie, true); |
| 862 | } |
| 863 | |
| 864 | int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen, |
| 865 | efx_dword_t *outbuf, size_t outlen, |
| 866 | size_t *outlen_actual) |
| 867 | { |
| 868 | return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, |
| 869 | outlen_actual, false); |
| 870 | } |
| 871 | |
| 872 | int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen, |
| 873 | efx_dword_t *outbuf, size_t outlen, |
| 874 | size_t *outlen_actual) |
| 875 | { |
| 876 | return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, |
| 877 | outlen_actual, true); |
| 878 | } |
| 879 | |
| 880 | void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd, |
| 881 | size_t inlen, efx_dword_t *outbuf, |
| 882 | size_t outlen, int rc) |
| 883 | { |
| 884 | int code = 0, err_arg = 0; |
| 885 | |
| 886 | if (outlen >= MC_CMD_ERR_CODE_OFST + 4) |
| 887 | code = MCDI_DWORD(outbuf, ERR_CODE); |
| 888 | if (outlen >= MC_CMD_ERR_ARG_OFST + 4) |
| 889 | err_arg = MCDI_DWORD(outbuf, ERR_ARG); |
| 890 | netif_err(efx, hw, efx->net_dev, |
| 891 | "MC command 0x%x inlen %d failed rc=%d (raw=%d) arg=%d\n", |
| 892 | cmd, (int)inlen, rc, code, err_arg); |
| 893 | } |
| 894 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 895 | /* Switch to polled MCDI completions. This can be called in various |
| 896 | * error conditions with various locks held, so it must be lockless. |
| 897 | * Caller is responsible for flushing asynchronous requests later. |
| 898 | */ |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 899 | void efx_mcdi_mode_poll(struct efx_nic *efx) |
| 900 | { |
| 901 | struct efx_mcdi_iface *mcdi; |
| 902 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 903 | if (!efx->mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 904 | return; |
| 905 | |
| 906 | mcdi = efx_mcdi(efx); |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 907 | /* If already in polling mode, nothing to do. |
| 908 | * If in fail-fast state, don't switch to polled completion. |
| 909 | * FLR recovery will do that later. |
| 910 | */ |
| 911 | if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 912 | return; |
| 913 | |
| 914 | /* We can switch from event completion to polled completion, because |
| 915 | * mcdi requests are always completed in shared memory. We do this by |
| 916 | * switching the mode to POLL'd then completing the request. |
| 917 | * efx_mcdi_await_completion() will then call efx_mcdi_poll(). |
| 918 | * |
| 919 | * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(), |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 920 | * which efx_mcdi_complete_sync() provides for us. |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 921 | */ |
| 922 | mcdi->mode = MCDI_MODE_POLL; |
| 923 | |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 924 | efx_mcdi_complete_sync(mcdi); |
| 925 | } |
| 926 | |
| 927 | /* Flush any running or queued asynchronous requests, after event processing |
| 928 | * is stopped |
| 929 | */ |
| 930 | void efx_mcdi_flush_async(struct efx_nic *efx) |
| 931 | { |
| 932 | struct efx_mcdi_async_param *async, *next; |
| 933 | struct efx_mcdi_iface *mcdi; |
| 934 | |
| 935 | if (!efx->mcdi) |
| 936 | return; |
| 937 | |
| 938 | mcdi = efx_mcdi(efx); |
| 939 | |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 940 | /* We must be in poll or fail mode so no more requests can be queued */ |
| 941 | BUG_ON(mcdi->mode == MCDI_MODE_EVENTS); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 942 | |
| 943 | del_timer_sync(&mcdi->async_timer); |
| 944 | |
| 945 | /* If a request is still running, make sure we give the MC |
| 946 | * time to complete it so that the response won't overwrite our |
| 947 | * next request. |
| 948 | */ |
| 949 | if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) { |
| 950 | efx_mcdi_poll(efx); |
| 951 | mcdi->state = MCDI_STATE_QUIESCENT; |
| 952 | } |
| 953 | |
| 954 | /* Nothing else will access the async list now, so it is safe |
| 955 | * to walk it without holding async_lock. If we hold it while |
| 956 | * calling a completer then lockdep may warn that we have |
| 957 | * acquired locks in the wrong order. |
| 958 | */ |
| 959 | list_for_each_entry_safe(async, next, &mcdi->async_list, list) { |
| 960 | async->complete(efx, async->cookie, -ENETDOWN, NULL, 0); |
| 961 | list_del(&async->list); |
| 962 | kfree(async); |
| 963 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 964 | } |
| 965 | |
| 966 | void efx_mcdi_mode_event(struct efx_nic *efx) |
| 967 | { |
| 968 | struct efx_mcdi_iface *mcdi; |
| 969 | |
Ben Hutchings | f3ad500 | 2012-09-18 02:33:56 +0100 | [diff] [blame] | 970 | if (!efx->mcdi) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 971 | return; |
| 972 | |
| 973 | mcdi = efx_mcdi(efx); |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 974 | /* If already in event completion mode, nothing to do. |
| 975 | * If in fail-fast state, don't switch to event completion. FLR |
| 976 | * recovery will do that later. |
| 977 | */ |
| 978 | if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 979 | return; |
| 980 | |
| 981 | /* We can't switch from polled to event completion in the middle of a |
| 982 | * request, because the completion method is specified in the request. |
| 983 | * So acquire the interface to serialise the requestors. We don't need |
| 984 | * to acquire the iface_lock to change the mode here, but we do need a |
| 985 | * write memory barrier ensure that efx_mcdi_rpc() sees it, which |
| 986 | * efx_mcdi_acquire() provides. |
| 987 | */ |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 988 | efx_mcdi_acquire_sync(mcdi); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 989 | mcdi->mode = MCDI_MODE_EVENTS; |
| 990 | efx_mcdi_release(mcdi); |
| 991 | } |
| 992 | |
| 993 | static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) |
| 994 | { |
| 995 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 996 | |
| 997 | /* If there is an outstanding MCDI request, it has been terminated |
| 998 | * either by a BADASSERT or REBOOT event. If the mcdi interface is |
| 999 | * in polled mode, then do nothing because the MC reboot handler will |
| 1000 | * set the header correctly. However, if the mcdi interface is waiting |
| 1001 | * for a CMDDONE event it won't receive it [and since all MCDI events |
| 1002 | * are sent to the same queue, we can't be racing with |
| 1003 | * efx_mcdi_ev_cpl()] |
| 1004 | * |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 1005 | * If there is an outstanding asynchronous request, we can't |
| 1006 | * complete it now (efx_mcdi_complete() would deadlock). The |
| 1007 | * reset process will take care of this. |
| 1008 | * |
| 1009 | * There's a race here with efx_mcdi_send_request(), because |
| 1010 | * we might receive a REBOOT event *before* the request has |
| 1011 | * been copied out. In polled mode (during startup) this is |
| 1012 | * irrelevant, because efx_mcdi_complete_sync() is ignored. In |
| 1013 | * event mode, this condition is just an edge-case of |
| 1014 | * receiving a REBOOT event after posting the MCDI |
| 1015 | * request. Did the mc reboot before or after the copyout? The |
| 1016 | * best we can do always is just return failure. |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1017 | */ |
| 1018 | spin_lock(&mcdi->iface_lock); |
Ben Hutchings | cade715 | 2013-08-27 23:12:31 +0100 | [diff] [blame] | 1019 | if (efx_mcdi_complete_sync(mcdi)) { |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1020 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
| 1021 | mcdi->resprc = rc; |
Ben Hutchings | df2cd8a | 2012-09-19 00:56:18 +0100 | [diff] [blame] | 1022 | mcdi->resp_hdr_len = 0; |
| 1023 | mcdi->resp_data_len = 0; |
Steve Hodgson | 18e3ee2 | 2010-12-02 13:46:55 +0000 | [diff] [blame] | 1024 | ++mcdi->credits; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1025 | } |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 1026 | } else { |
| 1027 | int count; |
| 1028 | |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 1029 | /* Consume the status word since efx_mcdi_rpc_finish() won't */ |
| 1030 | for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) { |
| 1031 | if (efx_mcdi_poll_reboot(efx)) |
| 1032 | break; |
| 1033 | udelay(MCDI_STATUS_DELAY_US); |
| 1034 | } |
Daniel Pieczko | d36a08b | 2013-06-20 11:40:07 +0100 | [diff] [blame] | 1035 | mcdi->new_epoch = true; |
Daniel Pieczko | dfdaa95 | 2013-09-18 10:16:24 +0100 | [diff] [blame] | 1036 | |
| 1037 | /* Nobody was waiting for an MCDI request, so trigger a reset */ |
| 1038 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); |
Ben Hutchings | 3f713bf | 2011-12-20 23:39:31 +0000 | [diff] [blame] | 1039 | } |
| 1040 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1041 | spin_unlock(&mcdi->iface_lock); |
| 1042 | } |
| 1043 | |
Jon Cooper | 74cd60a | 2013-09-16 14:18:51 +0100 | [diff] [blame] | 1044 | /* The MC is going down in to BIST mode. set the BIST flag to block |
| 1045 | * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset |
| 1046 | * (which doesn't actually execute a reset, it waits for the controlling |
| 1047 | * function to reset it). |
| 1048 | */ |
| 1049 | static void efx_mcdi_ev_bist(struct efx_nic *efx) |
| 1050 | { |
| 1051 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 1052 | |
| 1053 | spin_lock(&mcdi->iface_lock); |
| 1054 | efx->mc_bist_for_other_fn = true; |
| 1055 | if (efx_mcdi_complete_sync(mcdi)) { |
| 1056 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
| 1057 | mcdi->resprc = -EIO; |
| 1058 | mcdi->resp_hdr_len = 0; |
| 1059 | mcdi->resp_data_len = 0; |
| 1060 | ++mcdi->credits; |
| 1061 | } |
| 1062 | } |
| 1063 | mcdi->new_epoch = true; |
| 1064 | efx_schedule_reset(efx, RESET_TYPE_MC_BIST); |
| 1065 | spin_unlock(&mcdi->iface_lock); |
| 1066 | } |
| 1067 | |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 1068 | /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try |
| 1069 | * to recover. |
| 1070 | */ |
| 1071 | static void efx_mcdi_abandon(struct efx_nic *efx) |
| 1072 | { |
| 1073 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 1074 | |
| 1075 | if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL) |
| 1076 | return; /* it had already been done */ |
| 1077 | netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n"); |
| 1078 | efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT); |
| 1079 | } |
| 1080 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1081 | /* Called from falcon_process_eventq for MCDI events */ |
| 1082 | void efx_mcdi_process_event(struct efx_channel *channel, |
| 1083 | efx_qword_t *event) |
| 1084 | { |
| 1085 | struct efx_nic *efx = channel->efx; |
| 1086 | int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE); |
| 1087 | u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA); |
| 1088 | |
| 1089 | switch (code) { |
| 1090 | case MCDI_EVENT_CODE_BADSSERT: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1091 | netif_err(efx, hw, efx->net_dev, |
| 1092 | "MC watchdog or assertion failure at 0x%x\n", data); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 1093 | efx_mcdi_ev_death(efx, -EINTR); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1094 | break; |
| 1095 | |
| 1096 | case MCDI_EVENT_CODE_PMNOTICE: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1097 | netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n"); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1098 | break; |
| 1099 | |
| 1100 | case MCDI_EVENT_CODE_CMDDONE: |
| 1101 | efx_mcdi_ev_cpl(efx, |
| 1102 | MCDI_EVENT_FIELD(*event, CMDDONE_SEQ), |
| 1103 | MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN), |
| 1104 | MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO)); |
| 1105 | break; |
| 1106 | |
| 1107 | case MCDI_EVENT_CODE_LINKCHANGE: |
| 1108 | efx_mcdi_process_link_change(efx, event); |
| 1109 | break; |
| 1110 | case MCDI_EVENT_CODE_SENSOREVT: |
| 1111 | efx_mcdi_sensor_event(efx, event); |
| 1112 | break; |
| 1113 | case MCDI_EVENT_CODE_SCHEDERR: |
Robert Stonehouse | 2d9955b | 2013-10-07 18:44:17 +0100 | [diff] [blame] | 1114 | netif_dbg(efx, hw, efx->net_dev, |
| 1115 | "MC Scheduler alert (0x%x)\n", data); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1116 | break; |
| 1117 | case MCDI_EVENT_CODE_REBOOT: |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1118 | case MCDI_EVENT_CODE_MC_REBOOT: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1119 | netif_info(efx, hw, efx->net_dev, "MC Reboot\n"); |
Ben Hutchings | 5bc283e | 2012-10-08 21:43:00 +0100 | [diff] [blame] | 1120 | efx_mcdi_ev_death(efx, -EIO); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1121 | break; |
Jon Cooper | 74cd60a | 2013-09-16 14:18:51 +0100 | [diff] [blame] | 1122 | case MCDI_EVENT_CODE_MC_BIST: |
| 1123 | netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n"); |
| 1124 | efx_mcdi_ev_bist(efx); |
| 1125 | break; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1126 | case MCDI_EVENT_CODE_MAC_STATS_DMA: |
| 1127 | /* MAC stats are gather lazily. We can ignore this. */ |
| 1128 | break; |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1129 | case MCDI_EVENT_CODE_FLR: |
Shradha Shah | 7fa8d54 | 2015-05-06 00:55:13 +0100 | [diff] [blame] | 1130 | if (efx->type->sriov_flr) |
| 1131 | efx->type->sriov_flr(efx, |
| 1132 | MCDI_EVENT_FIELD(*event, FLR_VF)); |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1133 | break; |
Stuart Hodgson | 7c236c4 | 2012-09-03 11:09:36 +0100 | [diff] [blame] | 1134 | case MCDI_EVENT_CODE_PTP_RX: |
| 1135 | case MCDI_EVENT_CODE_PTP_FAULT: |
| 1136 | case MCDI_EVENT_CODE_PTP_PPS: |
| 1137 | efx_ptp_event(efx, event); |
| 1138 | break; |
Jon Cooper | bd9a265 | 2013-11-18 12:54:41 +0000 | [diff] [blame] | 1139 | case MCDI_EVENT_CODE_PTP_TIME: |
| 1140 | efx_time_sync_event(channel, event); |
| 1141 | break; |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1142 | case MCDI_EVENT_CODE_TX_FLUSH: |
| 1143 | case MCDI_EVENT_CODE_RX_FLUSH: |
| 1144 | /* Two flush events will be sent: one to the same event |
| 1145 | * queue as completions, and one to event queue 0. |
| 1146 | * In the latter case the {RX,TX}_FLUSH_TO_DRIVER |
| 1147 | * flag will be set, and we should ignore the event |
| 1148 | * because we want to wait for all completions. |
| 1149 | */ |
| 1150 | BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN != |
| 1151 | MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN); |
| 1152 | if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER)) |
| 1153 | efx_ef10_handle_drain_event(efx); |
| 1154 | break; |
Alexandre Rames | 3de82b9 | 2013-06-13 11:36:15 +0100 | [diff] [blame] | 1155 | case MCDI_EVENT_CODE_TX_ERR: |
| 1156 | case MCDI_EVENT_CODE_RX_ERR: |
| 1157 | netif_err(efx, hw, efx->net_dev, |
| 1158 | "%s DMA error (event: "EFX_QWORD_FMT")\n", |
| 1159 | code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX", |
| 1160 | EFX_QWORD_VAL(*event)); |
| 1161 | efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR); |
| 1162 | break; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1163 | default: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1164 | netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n", |
| 1165 | code); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1166 | } |
| 1167 | } |
| 1168 | |
| 1169 | /************************************************************************** |
| 1170 | * |
| 1171 | * Specific request functions |
| 1172 | * |
| 1173 | ************************************************************************** |
| 1174 | */ |
| 1175 | |
Ben Hutchings | e5f0fd2 | 2011-02-24 23:57:47 +0000 | [diff] [blame] | 1176 | void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1177 | { |
Daniel Pieczko | 8d9f9dd | 2015-05-06 00:56:55 +0100 | [diff] [blame] | 1178 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1179 | size_t outlength; |
| 1180 | const __le16 *ver_words; |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1181 | size_t offset; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1182 | int rc; |
| 1183 | |
| 1184 | BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1185 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0, |
| 1186 | outbuf, sizeof(outbuf), &outlength); |
| 1187 | if (rc) |
| 1188 | goto fail; |
Ben Hutchings | 05a9320 | 2011-12-20 00:44:06 +0000 | [diff] [blame] | 1189 | if (outlength < MC_CMD_GET_VERSION_OUT_LEN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1190 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1191 | goto fail; |
| 1192 | } |
| 1193 | |
| 1194 | ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION); |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1195 | offset = snprintf(buf, len, "%u.%u.%u.%u", |
| 1196 | le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]), |
| 1197 | le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3])); |
| 1198 | |
| 1199 | /* EF10 may have multiple datapath firmware variants within a |
| 1200 | * single version. Report which variants are running. |
| 1201 | */ |
| 1202 | if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) { |
Daniel Pieczko | 8d9f9dd | 2015-05-06 00:56:55 +0100 | [diff] [blame] | 1203 | struct efx_ef10_nic_data *nic_data = efx->nic_data; |
| 1204 | |
| 1205 | offset += snprintf(buf + offset, len - offset, " rx%x tx%x", |
| 1206 | nic_data->rx_dpcpu_fw_id, |
| 1207 | nic_data->tx_dpcpu_fw_id); |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1208 | |
| 1209 | /* It's theoretically possible for the string to exceed 31 |
| 1210 | * characters, though in practice the first three version |
| 1211 | * components are short enough that this doesn't happen. |
| 1212 | */ |
| 1213 | if (WARN_ON(offset >= len)) |
| 1214 | buf[0] = 0; |
| 1215 | } |
| 1216 | |
Ben Hutchings | e5f0fd2 | 2011-02-24 23:57:47 +0000 | [diff] [blame] | 1217 | return; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1218 | |
| 1219 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1220 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | e5f0fd2 | 2011-02-24 23:57:47 +0000 | [diff] [blame] | 1221 | buf[0] = 0; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1222 | } |
| 1223 | |
Ben Hutchings | 4c75b43a | 2013-08-29 19:04:03 +0100 | [diff] [blame] | 1224 | static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, |
| 1225 | bool *was_attached) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1226 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1227 | MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN); |
Ben Hutchings | ecb1c9c | 2013-10-07 20:10:11 +0100 | [diff] [blame] | 1228 | MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1229 | size_t outlen; |
| 1230 | int rc; |
| 1231 | |
| 1232 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE, |
| 1233 | driver_operating ? 1 : 0); |
| 1234 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1); |
Ben Hutchings | f2b0bef | 2013-08-20 20:35:50 +0100 | [diff] [blame] | 1235 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1236 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1237 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf), |
| 1238 | outbuf, sizeof(outbuf), &outlen); |
| 1239 | /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID |
| 1240 | * specified will fail with EPERM, and we have to tell the MC we don't |
| 1241 | * care what firmware we get. |
| 1242 | */ |
| 1243 | if (rc == -EPERM) { |
| 1244 | netif_dbg(efx, probe, efx->net_dev, |
| 1245 | "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n"); |
| 1246 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, |
| 1247 | MC_CMD_FW_DONT_CARE); |
| 1248 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, |
| 1249 | sizeof(inbuf), outbuf, sizeof(outbuf), |
| 1250 | &outlen); |
| 1251 | } |
| 1252 | if (rc) { |
| 1253 | efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf), |
| 1254 | outbuf, outlen, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1255 | goto fail; |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1256 | } |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1257 | if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) { |
| 1258 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1259 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1260 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1261 | |
Ben Hutchings | 8349f7f | 2013-10-16 18:32:34 +0100 | [diff] [blame] | 1262 | if (driver_operating) { |
| 1263 | if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) { |
| 1264 | efx->mcdi->fn_flags = |
| 1265 | MCDI_DWORD(outbuf, |
| 1266 | DRV_ATTACH_EXT_OUT_FUNC_FLAGS); |
| 1267 | } else { |
| 1268 | /* Synthesise flags for Siena */ |
| 1269 | efx->mcdi->fn_flags = |
| 1270 | 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL | |
| 1271 | 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED | |
| 1272 | (efx_port_num(efx) == 0) << |
| 1273 | MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY; |
| 1274 | } |
| 1275 | } |
| 1276 | |
Ben Hutchings | ecb1c9c | 2013-10-07 20:10:11 +0100 | [diff] [blame] | 1277 | /* We currently assume we have control of the external link |
| 1278 | * and are completely trusted by firmware. Abort probing |
| 1279 | * if that's not true for this function. |
| 1280 | */ |
Ben Hutchings | ecb1c9c | 2013-10-07 20:10:11 +0100 | [diff] [blame] | 1281 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1282 | if (was_attached != NULL) |
| 1283 | *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE); |
| 1284 | return 0; |
| 1285 | |
| 1286 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1287 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1288 | return rc; |
| 1289 | } |
| 1290 | |
| 1291 | int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address, |
Matthew Slattery | 6aa9c7f | 2010-07-14 15:36:19 +0100 | [diff] [blame] | 1292 | u16 *fw_subtype_list, u32 *capabilities) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1293 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1294 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX); |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1295 | size_t outlen, i; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1296 | int port_num = efx_port_num(efx); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1297 | int rc; |
| 1298 | |
| 1299 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0); |
Edward Cree | cd84ff4 | 2014-03-07 18:27:41 +0000 | [diff] [blame] | 1300 | /* we need __aligned(2) for ether_addr_copy */ |
| 1301 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1); |
| 1302 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1303 | |
| 1304 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0, |
| 1305 | outbuf, sizeof(outbuf), &outlen); |
| 1306 | if (rc) |
| 1307 | goto fail; |
| 1308 | |
Ben Hutchings | 05a9320 | 2011-12-20 00:44:06 +0000 | [diff] [blame] | 1309 | if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1310 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1311 | goto fail; |
| 1312 | } |
| 1313 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1314 | if (mac_address) |
Edward Cree | cd84ff4 | 2014-03-07 18:27:41 +0000 | [diff] [blame] | 1315 | ether_addr_copy(mac_address, |
| 1316 | port_num ? |
| 1317 | MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) : |
| 1318 | MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0)); |
Ben Hutchings | bfeed90 | 2012-09-07 00:58:10 +0100 | [diff] [blame] | 1319 | if (fw_subtype_list) { |
Ben Hutchings | bfeed90 | 2012-09-07 00:58:10 +0100 | [diff] [blame] | 1320 | for (i = 0; |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1321 | i < MCDI_VAR_ARRAY_LEN(outlen, |
| 1322 | GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); |
| 1323 | i++) |
| 1324 | fw_subtype_list[i] = MCDI_ARRAY_WORD( |
| 1325 | outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i); |
| 1326 | for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++) |
| 1327 | fw_subtype_list[i] = 0; |
Ben Hutchings | bfeed90 | 2012-09-07 00:58:10 +0100 | [diff] [blame] | 1328 | } |
Matthew Slattery | 6aa9c7f | 2010-07-14 15:36:19 +0100 | [diff] [blame] | 1329 | if (capabilities) { |
| 1330 | if (port_num) |
| 1331 | *capabilities = MCDI_DWORD(outbuf, |
| 1332 | GET_BOARD_CFG_OUT_CAPABILITIES_PORT1); |
| 1333 | else |
| 1334 | *capabilities = MCDI_DWORD(outbuf, |
| 1335 | GET_BOARD_CFG_OUT_CAPABILITIES_PORT0); |
| 1336 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1337 | |
| 1338 | return 0; |
| 1339 | |
| 1340 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1341 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n", |
| 1342 | __func__, rc, (int)outlen); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1343 | |
| 1344 | return rc; |
| 1345 | } |
| 1346 | |
| 1347 | int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq) |
| 1348 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1349 | MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1350 | u32 dest = 0; |
| 1351 | int rc; |
| 1352 | |
| 1353 | if (uart) |
| 1354 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART; |
| 1355 | if (evq) |
| 1356 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ; |
| 1357 | |
| 1358 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest); |
| 1359 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq); |
| 1360 | |
| 1361 | BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0); |
| 1362 | |
| 1363 | rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf), |
| 1364 | NULL, 0, NULL); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1365 | return rc; |
| 1366 | } |
| 1367 | |
| 1368 | int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out) |
| 1369 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1370 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1371 | size_t outlen; |
| 1372 | int rc; |
| 1373 | |
| 1374 | BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0); |
| 1375 | |
| 1376 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0, |
| 1377 | outbuf, sizeof(outbuf), &outlen); |
| 1378 | if (rc) |
| 1379 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1380 | if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) { |
| 1381 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1382 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1383 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1384 | |
| 1385 | *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES); |
| 1386 | return 0; |
| 1387 | |
| 1388 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1389 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", |
| 1390 | __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1391 | return rc; |
| 1392 | } |
| 1393 | |
| 1394 | int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type, |
| 1395 | size_t *size_out, size_t *erase_size_out, |
| 1396 | bool *protected_out) |
| 1397 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1398 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN); |
| 1399 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1400 | size_t outlen; |
| 1401 | int rc; |
| 1402 | |
| 1403 | MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type); |
| 1404 | |
| 1405 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf), |
| 1406 | outbuf, sizeof(outbuf), &outlen); |
| 1407 | if (rc) |
| 1408 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1409 | if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) { |
| 1410 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1411 | goto fail; |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1412 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1413 | |
| 1414 | *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE); |
| 1415 | *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE); |
| 1416 | *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) & |
Ben Hutchings | 05a9320 | 2011-12-20 00:44:06 +0000 | [diff] [blame] | 1417 | (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN)); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1418 | return 0; |
| 1419 | |
| 1420 | fail: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1421 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1422 | return rc; |
| 1423 | } |
| 1424 | |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1425 | static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type) |
| 1426 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1427 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN); |
| 1428 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN); |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1429 | int rc; |
| 1430 | |
| 1431 | MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type); |
| 1432 | |
| 1433 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf), |
| 1434 | outbuf, sizeof(outbuf), NULL); |
| 1435 | if (rc) |
| 1436 | return rc; |
| 1437 | |
| 1438 | switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) { |
| 1439 | case MC_CMD_NVRAM_TEST_PASS: |
| 1440 | case MC_CMD_NVRAM_TEST_NOTSUPP: |
| 1441 | return 0; |
| 1442 | default: |
| 1443 | return -EIO; |
| 1444 | } |
| 1445 | } |
| 1446 | |
| 1447 | int efx_mcdi_nvram_test_all(struct efx_nic *efx) |
| 1448 | { |
| 1449 | u32 nvram_types; |
| 1450 | unsigned int type; |
| 1451 | int rc; |
| 1452 | |
| 1453 | rc = efx_mcdi_nvram_types(efx, &nvram_types); |
| 1454 | if (rc) |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1455 | goto fail1; |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1456 | |
| 1457 | type = 0; |
| 1458 | while (nvram_types != 0) { |
| 1459 | if (nvram_types & 1) { |
| 1460 | rc = efx_mcdi_nvram_test(efx, type); |
| 1461 | if (rc) |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1462 | goto fail2; |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1463 | } |
| 1464 | type++; |
| 1465 | nvram_types >>= 1; |
| 1466 | } |
| 1467 | |
| 1468 | return 0; |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1469 | |
| 1470 | fail2: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1471 | netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n", |
| 1472 | __func__, type); |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1473 | fail1: |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1474 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | b548a98 | 2010-04-28 09:28:36 +0000 | [diff] [blame] | 1475 | return rc; |
Ben Hutchings | 2e80340 | 2010-02-03 09:31:01 +0000 | [diff] [blame] | 1476 | } |
| 1477 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1478 | /* Returns 1 if an assertion was read, 0 if no assertion had fired, |
| 1479 | * negative on error. |
| 1480 | */ |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1481 | static int efx_mcdi_read_assertion(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1482 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1483 | MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN); |
Jon Cooper | aa09a3d | 2015-05-20 11:10:41 +0100 | [diff] [blame] | 1484 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN); |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1485 | unsigned int flags, index; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1486 | const char *reason; |
| 1487 | size_t outlen; |
| 1488 | int retry; |
| 1489 | int rc; |
| 1490 | |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1491 | /* Attempt to read any stored assertion state before we reboot |
| 1492 | * the mcfw out of the assertion handler. Retry twice, once |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1493 | * because a boot-time assertion might cause this command to fail |
| 1494 | * with EINTR. And once again because GET_ASSERTS can race with |
| 1495 | * MC_CMD_REBOOT running on the other port. */ |
| 1496 | retry = 2; |
| 1497 | do { |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1498 | MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1); |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 1499 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS, |
| 1500 | inbuf, MC_CMD_GET_ASSERTS_IN_LEN, |
| 1501 | outbuf, sizeof(outbuf), &outlen); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1502 | if (rc == -EPERM) |
| 1503 | return 0; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1504 | } while ((rc == -EINTR || rc == -EIO) && retry-- > 0); |
| 1505 | |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 1506 | if (rc) { |
| 1507 | efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS, |
| 1508 | MC_CMD_GET_ASSERTS_IN_LEN, outbuf, |
| 1509 | outlen, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1510 | return rc; |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 1511 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1512 | if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN) |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1513 | return -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1514 | |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1515 | /* Print out any recorded assertion state */ |
| 1516 | flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1517 | if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) |
| 1518 | return 0; |
| 1519 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1520 | reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) |
| 1521 | ? "system-level assertion" |
| 1522 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) |
| 1523 | ? "thread-level assertion" |
| 1524 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) |
| 1525 | ? "watchdog reset" |
| 1526 | : "unknown assertion"; |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1527 | netif_err(efx, hw, efx->net_dev, |
| 1528 | "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason, |
| 1529 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS), |
| 1530 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS)); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1531 | |
| 1532 | /* Print out the registers */ |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1533 | for (index = 0; |
| 1534 | index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM; |
| 1535 | index++) |
| 1536 | netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", |
| 1537 | 1 + index, |
| 1538 | MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS, |
| 1539 | index)); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1540 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1541 | return 1; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1542 | } |
| 1543 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1544 | static int efx_mcdi_exit_assertion(struct efx_nic *efx) |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1545 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1546 | MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1547 | int rc; |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1548 | |
Ben Hutchings | 0f1e54ae | 2012-07-02 23:37:40 +0100 | [diff] [blame] | 1549 | /* If the MC is running debug firmware, it might now be |
| 1550 | * waiting for a debugger to attach, but we just want it to |
| 1551 | * reboot. We set a flag that makes the command a no-op if it |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1552 | * has already done so. |
| 1553 | * The MCDI will thus return either 0 or -EIO. |
Ben Hutchings | 0f1e54ae | 2012-07-02 23:37:40 +0100 | [diff] [blame] | 1554 | */ |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1555 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); |
| 1556 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, |
| 1557 | MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1558 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN, |
| 1559 | NULL, 0, NULL); |
| 1560 | if (rc == -EIO) |
| 1561 | rc = 0; |
| 1562 | if (rc) |
| 1563 | efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN, |
| 1564 | NULL, 0, rc); |
| 1565 | return rc; |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1566 | } |
| 1567 | |
| 1568 | int efx_mcdi_handle_assertion(struct efx_nic *efx) |
| 1569 | { |
| 1570 | int rc; |
| 1571 | |
| 1572 | rc = efx_mcdi_read_assertion(efx); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1573 | if (rc <= 0) |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1574 | return rc; |
| 1575 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1576 | return efx_mcdi_exit_assertion(efx); |
Steve Hodgson | 8b2103a | 2010-02-03 09:30:17 +0000 | [diff] [blame] | 1577 | } |
| 1578 | |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1579 | void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode) |
| 1580 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1581 | MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1582 | int rc; |
| 1583 | |
| 1584 | BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF); |
| 1585 | BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON); |
| 1586 | BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT); |
| 1587 | |
| 1588 | BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0); |
| 1589 | |
| 1590 | MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode); |
| 1591 | |
| 1592 | rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), |
| 1593 | NULL, 0, NULL); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1594 | } |
| 1595 | |
Jon Cooper | 3e33626 | 2014-01-17 19:48:06 +0000 | [diff] [blame] | 1596 | static int efx_mcdi_reset_func(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1597 | { |
Jon Cooper | 3e33626 | 2014-01-17 19:48:06 +0000 | [diff] [blame] | 1598 | MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN); |
| 1599 | int rc; |
| 1600 | |
| 1601 | BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0); |
| 1602 | MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG, |
| 1603 | ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1); |
| 1604 | rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf), |
| 1605 | NULL, 0, NULL); |
| 1606 | return rc; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1607 | } |
| 1608 | |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1609 | static int efx_mcdi_reset_mc(struct efx_nic *efx) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1610 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1611 | MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1612 | int rc; |
| 1613 | |
| 1614 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); |
| 1615 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0); |
| 1616 | rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf), |
| 1617 | NULL, 0, NULL); |
| 1618 | /* White is black, and up is down */ |
| 1619 | if (rc == -EIO) |
| 1620 | return 0; |
| 1621 | if (rc == 0) |
| 1622 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1623 | return rc; |
| 1624 | } |
| 1625 | |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1626 | enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason) |
| 1627 | { |
| 1628 | return RESET_TYPE_RECOVER_OR_ALL; |
| 1629 | } |
| 1630 | |
| 1631 | int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method) |
| 1632 | { |
| 1633 | int rc; |
| 1634 | |
Edward Cree | e283546 | 2014-04-16 19:27:48 +0100 | [diff] [blame] | 1635 | /* If MCDI is down, we can't handle_assertion */ |
| 1636 | if (method == RESET_TYPE_MCDI_TIMEOUT) { |
| 1637 | rc = pci_reset_function(efx->pci_dev); |
| 1638 | if (rc) |
| 1639 | return rc; |
| 1640 | /* Re-enable polled MCDI completion */ |
| 1641 | if (efx->mcdi) { |
| 1642 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 1643 | mcdi->mode = MCDI_MODE_POLL; |
| 1644 | } |
| 1645 | return 0; |
| 1646 | } |
| 1647 | |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1648 | /* Recover from a failed assertion pre-reset */ |
| 1649 | rc = efx_mcdi_handle_assertion(efx); |
| 1650 | if (rc) |
| 1651 | return rc; |
| 1652 | |
Jon Cooper | 087e902 | 2015-05-20 11:11:35 +0100 | [diff] [blame] | 1653 | if (method == RESET_TYPE_DATAPATH) |
| 1654 | return 0; |
| 1655 | else if (method == RESET_TYPE_WORLD) |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1656 | return efx_mcdi_reset_mc(efx); |
| 1657 | else |
Jon Cooper | 3e33626 | 2014-01-17 19:48:06 +0000 | [diff] [blame] | 1658 | return efx_mcdi_reset_func(efx); |
Ben Hutchings | 6bff861 | 2012-09-18 02:33:52 +0100 | [diff] [blame] | 1659 | } |
| 1660 | |
stephen hemminger | d215697 | 2010-10-18 05:27:31 +0000 | [diff] [blame] | 1661 | static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type, |
| 1662 | const u8 *mac, int *id_out) |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1663 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1664 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN); |
| 1665 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1666 | size_t outlen; |
| 1667 | int rc; |
| 1668 | |
| 1669 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type); |
| 1670 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE, |
| 1671 | MC_CMD_FILTER_MODE_SIMPLE); |
Edward Cree | cd84ff4 | 2014-03-07 18:27:41 +0000 | [diff] [blame] | 1672 | ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1673 | |
| 1674 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf), |
| 1675 | outbuf, sizeof(outbuf), &outlen); |
| 1676 | if (rc) |
| 1677 | goto fail; |
| 1678 | |
| 1679 | if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1680 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1681 | goto fail; |
| 1682 | } |
| 1683 | |
| 1684 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID); |
| 1685 | |
| 1686 | return 0; |
| 1687 | |
| 1688 | fail: |
| 1689 | *id_out = -1; |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1690 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1691 | return rc; |
| 1692 | |
| 1693 | } |
| 1694 | |
| 1695 | |
| 1696 | int |
| 1697 | efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out) |
| 1698 | { |
| 1699 | return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out); |
| 1700 | } |
| 1701 | |
| 1702 | |
| 1703 | int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out) |
| 1704 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1705 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1706 | size_t outlen; |
| 1707 | int rc; |
| 1708 | |
| 1709 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0, |
| 1710 | outbuf, sizeof(outbuf), &outlen); |
| 1711 | if (rc) |
| 1712 | goto fail; |
| 1713 | |
| 1714 | if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) { |
Ben Hutchings | 00bbb4a | 2010-04-28 09:27:14 +0000 | [diff] [blame] | 1715 | rc = -EIO; |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1716 | goto fail; |
| 1717 | } |
| 1718 | |
| 1719 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID); |
| 1720 | |
| 1721 | return 0; |
| 1722 | |
| 1723 | fail: |
| 1724 | *id_out = -1; |
Ben Hutchings | 62776d0 | 2010-06-23 11:30:07 +0000 | [diff] [blame] | 1725 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1726 | return rc; |
| 1727 | } |
| 1728 | |
| 1729 | |
| 1730 | int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id) |
| 1731 | { |
Ben Hutchings | 59cfc47 | 2012-09-14 17:30:10 +0100 | [diff] [blame] | 1732 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1733 | int rc; |
| 1734 | |
| 1735 | MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id); |
| 1736 | |
| 1737 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf), |
| 1738 | NULL, 0, NULL); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1739 | return rc; |
| 1740 | } |
| 1741 | |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1742 | int efx_mcdi_flush_rxqs(struct efx_nic *efx) |
| 1743 | { |
| 1744 | struct efx_channel *channel; |
| 1745 | struct efx_rx_queue *rx_queue; |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1746 | MCDI_DECLARE_BUF(inbuf, |
| 1747 | MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1748 | int rc, count; |
| 1749 | |
Ben Hutchings | 4507837 | 2012-09-19 02:53:34 +0100 | [diff] [blame] | 1750 | BUILD_BUG_ON(EFX_MAX_CHANNELS > |
| 1751 | MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM); |
| 1752 | |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1753 | count = 0; |
| 1754 | efx_for_each_channel(channel, efx) { |
| 1755 | efx_for_each_channel_rx_queue(rx_queue, channel) { |
| 1756 | if (rx_queue->flush_pending) { |
| 1757 | rx_queue->flush_pending = false; |
| 1758 | atomic_dec(&efx->rxq_flush_pending); |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1759 | MCDI_SET_ARRAY_DWORD( |
| 1760 | inbuf, FLUSH_RX_QUEUES_IN_QID_OFST, |
| 1761 | count, efx_rx_queue_index(rx_queue)); |
| 1762 | count++; |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1763 | } |
| 1764 | } |
| 1765 | } |
| 1766 | |
Ben Hutchings | c5bb0e9 | 2012-09-14 17:31:33 +0100 | [diff] [blame] | 1767 | rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf, |
| 1768 | MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL); |
Ben Hutchings | bbec969 | 2012-09-11 18:25:13 +0100 | [diff] [blame] | 1769 | WARN_ON(rc < 0); |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1770 | |
Ben Hutchings | cd2d5b5 | 2012-02-14 00:48:07 +0000 | [diff] [blame] | 1771 | return rc; |
| 1772 | } |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1773 | |
| 1774 | int efx_mcdi_wol_filter_reset(struct efx_nic *efx) |
| 1775 | { |
| 1776 | int rc; |
| 1777 | |
| 1778 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL); |
Ben Hutchings | afd4aea | 2009-11-29 15:15:25 +0000 | [diff] [blame] | 1779 | return rc; |
| 1780 | } |
| 1781 | |
Daniel Pieczko | 34ccfe6 | 2015-07-21 15:09:43 +0100 | [diff] [blame] | 1782 | int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled, |
| 1783 | unsigned int *flags) |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1784 | { |
| 1785 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN); |
Daniel Pieczko | 34ccfe6 | 2015-07-21 15:09:43 +0100 | [diff] [blame] | 1786 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN); |
| 1787 | size_t outlen; |
| 1788 | int rc; |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1789 | |
| 1790 | BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0); |
| 1791 | MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type); |
| 1792 | MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled); |
Daniel Pieczko | 34ccfe6 | 2015-07-21 15:09:43 +0100 | [diff] [blame] | 1793 | rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf), |
| 1794 | outbuf, sizeof(outbuf), &outlen); |
| 1795 | if (rc) |
| 1796 | return rc; |
| 1797 | |
| 1798 | if (!flags) |
| 1799 | return 0; |
| 1800 | |
| 1801 | if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN) |
| 1802 | *flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS); |
| 1803 | else |
| 1804 | *flags = 0; |
| 1805 | |
| 1806 | return 0; |
Ben Hutchings | 8127d66 | 2013-08-29 19:19:29 +0100 | [diff] [blame] | 1807 | } |
| 1808 | |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1809 | int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out, |
| 1810 | unsigned int *enabled_out) |
| 1811 | { |
Jon Cooper | aa09a3d | 2015-05-20 11:10:41 +0100 | [diff] [blame] | 1812 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1813 | size_t outlen; |
| 1814 | int rc; |
| 1815 | |
| 1816 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0, |
| 1817 | outbuf, sizeof(outbuf), &outlen); |
| 1818 | if (rc) |
| 1819 | goto fail; |
| 1820 | |
| 1821 | if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) { |
| 1822 | rc = -EIO; |
| 1823 | goto fail; |
| 1824 | } |
| 1825 | |
| 1826 | if (impl_out) |
| 1827 | *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED); |
| 1828 | |
| 1829 | if (enabled_out) |
| 1830 | *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED); |
| 1831 | |
| 1832 | return 0; |
| 1833 | |
| 1834 | fail: |
Edward Cree | 832dc9e | 2015-07-21 15:09:31 +0100 | [diff] [blame] | 1835 | /* Older firmware lacks GET_WORKAROUNDS and this isn't especially |
| 1836 | * terrifying. The call site will have to deal with it though. |
| 1837 | */ |
| 1838 | netif_printk(efx, hw, rc == -ENOSYS ? KERN_DEBUG : KERN_ERR, |
| 1839 | efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
Edward Cree | 267d9d7 | 2015-05-06 00:59:18 +0100 | [diff] [blame] | 1840 | return rc; |
| 1841 | } |
| 1842 | |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 1843 | #ifdef CONFIG_SFC_MTD |
| 1844 | |
| 1845 | #define EFX_MCDI_NVRAM_LEN_MAX 128 |
| 1846 | |
| 1847 | static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type) |
| 1848 | { |
| 1849 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN); |
| 1850 | int rc; |
| 1851 | |
| 1852 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type); |
| 1853 | |
| 1854 | BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0); |
| 1855 | |
| 1856 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf), |
| 1857 | NULL, 0, NULL); |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 1858 | return rc; |
| 1859 | } |
| 1860 | |
| 1861 | static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type, |
| 1862 | loff_t offset, u8 *buffer, size_t length) |
| 1863 | { |
| 1864 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN); |
| 1865 | MCDI_DECLARE_BUF(outbuf, |
| 1866 | MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)); |
| 1867 | size_t outlen; |
| 1868 | int rc; |
| 1869 | |
| 1870 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type); |
| 1871 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset); |
| 1872 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length); |
| 1873 | |
| 1874 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf), |
| 1875 | outbuf, sizeof(outbuf), &outlen); |
| 1876 | if (rc) |
Edward Cree | 1e0b812 | 2013-05-31 18:36:12 +0100 | [diff] [blame] | 1877 | return rc; |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 1878 | |
| 1879 | memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length); |
| 1880 | return 0; |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 1881 | } |
| 1882 | |
| 1883 | static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, |
| 1884 | loff_t offset, const u8 *buffer, size_t length) |
| 1885 | { |
| 1886 | MCDI_DECLARE_BUF(inbuf, |
| 1887 | MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)); |
| 1888 | int rc; |
| 1889 | |
| 1890 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type); |
| 1891 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset); |
| 1892 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length); |
| 1893 | memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length); |
| 1894 | |
| 1895 | BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0); |
| 1896 | |
| 1897 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, |
| 1898 | ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4), |
| 1899 | NULL, 0, NULL); |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 1900 | return rc; |
| 1901 | } |
| 1902 | |
| 1903 | static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, |
| 1904 | loff_t offset, size_t length) |
| 1905 | { |
| 1906 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN); |
| 1907 | int rc; |
| 1908 | |
| 1909 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type); |
| 1910 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset); |
| 1911 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length); |
| 1912 | |
| 1913 | BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0); |
| 1914 | |
| 1915 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf), |
| 1916 | NULL, 0, NULL); |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 1917 | return rc; |
| 1918 | } |
| 1919 | |
| 1920 | static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type) |
| 1921 | { |
| 1922 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN); |
| 1923 | int rc; |
| 1924 | |
| 1925 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type); |
| 1926 | |
| 1927 | BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0); |
| 1928 | |
| 1929 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf), |
| 1930 | NULL, 0, NULL); |
Ben Hutchings | 45a3fd5 | 2012-11-28 04:38:14 +0000 | [diff] [blame] | 1931 | return rc; |
| 1932 | } |
| 1933 | |
| 1934 | int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start, |
| 1935 | size_t len, size_t *retlen, u8 *buffer) |
| 1936 | { |
| 1937 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 1938 | struct efx_nic *efx = mtd->priv; |
| 1939 | loff_t offset = start; |
| 1940 | loff_t end = min_t(loff_t, start + len, mtd->size); |
| 1941 | size_t chunk; |
| 1942 | int rc = 0; |
| 1943 | |
| 1944 | while (offset < end) { |
| 1945 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); |
| 1946 | rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset, |
| 1947 | buffer, chunk); |
| 1948 | if (rc) |
| 1949 | goto out; |
| 1950 | offset += chunk; |
| 1951 | buffer += chunk; |
| 1952 | } |
| 1953 | out: |
| 1954 | *retlen = offset - start; |
| 1955 | return rc; |
| 1956 | } |
| 1957 | |
| 1958 | int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len) |
| 1959 | { |
| 1960 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 1961 | struct efx_nic *efx = mtd->priv; |
| 1962 | loff_t offset = start & ~((loff_t)(mtd->erasesize - 1)); |
| 1963 | loff_t end = min_t(loff_t, start + len, mtd->size); |
| 1964 | size_t chunk = part->common.mtd.erasesize; |
| 1965 | int rc = 0; |
| 1966 | |
| 1967 | if (!part->updating) { |
| 1968 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); |
| 1969 | if (rc) |
| 1970 | goto out; |
| 1971 | part->updating = true; |
| 1972 | } |
| 1973 | |
| 1974 | /* The MCDI interface can in fact do multiple erase blocks at once; |
| 1975 | * but erasing may be slow, so we make multiple calls here to avoid |
| 1976 | * tripping the MCDI RPC timeout. */ |
| 1977 | while (offset < end) { |
| 1978 | rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset, |
| 1979 | chunk); |
| 1980 | if (rc) |
| 1981 | goto out; |
| 1982 | offset += chunk; |
| 1983 | } |
| 1984 | out: |
| 1985 | return rc; |
| 1986 | } |
| 1987 | |
| 1988 | int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start, |
| 1989 | size_t len, size_t *retlen, const u8 *buffer) |
| 1990 | { |
| 1991 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 1992 | struct efx_nic *efx = mtd->priv; |
| 1993 | loff_t offset = start; |
| 1994 | loff_t end = min_t(loff_t, start + len, mtd->size); |
| 1995 | size_t chunk; |
| 1996 | int rc = 0; |
| 1997 | |
| 1998 | if (!part->updating) { |
| 1999 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); |
| 2000 | if (rc) |
| 2001 | goto out; |
| 2002 | part->updating = true; |
| 2003 | } |
| 2004 | |
| 2005 | while (offset < end) { |
| 2006 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); |
| 2007 | rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset, |
| 2008 | buffer, chunk); |
| 2009 | if (rc) |
| 2010 | goto out; |
| 2011 | offset += chunk; |
| 2012 | buffer += chunk; |
| 2013 | } |
| 2014 | out: |
| 2015 | *retlen = offset - start; |
| 2016 | return rc; |
| 2017 | } |
| 2018 | |
| 2019 | int efx_mcdi_mtd_sync(struct mtd_info *mtd) |
| 2020 | { |
| 2021 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
| 2022 | struct efx_nic *efx = mtd->priv; |
| 2023 | int rc = 0; |
| 2024 | |
| 2025 | if (part->updating) { |
| 2026 | part->updating = false; |
| 2027 | rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type); |
| 2028 | } |
| 2029 | |
| 2030 | return rc; |
| 2031 | } |
| 2032 | |
| 2033 | void efx_mcdi_mtd_rename(struct efx_mtd_partition *part) |
| 2034 | { |
| 2035 | struct efx_mcdi_mtd_partition *mcdi_part = |
| 2036 | container_of(part, struct efx_mcdi_mtd_partition, common); |
| 2037 | struct efx_nic *efx = part->mtd.priv; |
| 2038 | |
| 2039 | snprintf(part->name, sizeof(part->name), "%s %s:%02x", |
| 2040 | efx->name, part->type_name, mcdi_part->fw_subtype); |
| 2041 | } |
| 2042 | |
| 2043 | #endif /* CONFIG_SFC_MTD */ |