| viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-spear3xx/include/mach/spear.h |
| 3 | * |
| 4 | * SPEAr3xx Machine family specific definition |
| 5 | * |
| 6 | * Copyright (C) 2009 ST Microelectronics |
| 7 | * Viresh Kumar<viresh.kumar@st.com> |
| 8 | * |
| 9 | * This file is licensed under the terms of the GNU General Public |
| 10 | * License version 2. This program is licensed "as is" without any |
| 11 | * warranty of any kind, whether express or implied. |
| 12 | */ |
| 13 | |
| 14 | #ifndef __MACH_SPEAR3XX_H |
| 15 | #define __MACH_SPEAR3XX_H |
| 16 | |
| Shiraz Hashim | 981a95d3 | 2011-03-07 05:57:08 +0100 | [diff] [blame] | 17 | #include <asm/memory.h> |
| viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 18 | |
| 19 | /* ICM1 - Low speed connection */ |
| Shiraz Hashim | 981a95d3 | 2011-03-07 05:57:08 +0100 | [diff] [blame] | 20 | #define SPEAR3XX_ICM1_2_BASE UL(0xD0000000) |
| Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame] | 21 | #define VA_SPEAR3XX_ICM1_2_BASE UL(0xFD000000) |
| Shiraz Hashim | 981a95d3 | 2011-03-07 05:57:08 +0100 | [diff] [blame] | 22 | #define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000) |
| Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame] | 23 | #define VA_SPEAR3XX_ICM1_UART_BASE (VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE) |
| Shiraz Hashim | 981a95d3 | 2011-03-07 05:57:08 +0100 | [diff] [blame] | 24 | #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) |
| viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 25 | |
| 26 | /* ML1 - Multi Layer CPU Subsystem */ |
| Shiraz Hashim | 981a95d3 | 2011-03-07 05:57:08 +0100 | [diff] [blame] | 27 | #define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000) |
| Arnd Bergmann | 5019f0b | 2012-04-11 17:30:11 +0000 | [diff] [blame^] | 28 | #define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) |
| 29 | #define SPEAR3XX_CPU_TMR_BASE UL(0xF0000000) |
| viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 30 | |
| 31 | /* ICM3 - Basic Subsystem */ |
| Shiraz Hashim | 981a95d3 | 2011-03-07 05:57:08 +0100 | [diff] [blame] | 32 | #define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) |
| Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame] | 33 | #define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) |
| Shiraz Hashim | 981a95d3 | 2011-03-07 05:57:08 +0100 | [diff] [blame] | 34 | #define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000) |
| Shiraz Hashim | 981a95d3 | 2011-03-07 05:57:08 +0100 | [diff] [blame] | 35 | #define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000) |
| Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame] | 36 | #define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE) |
| Shiraz Hashim | 981a95d3 | 2011-03-07 05:57:08 +0100 | [diff] [blame] | 37 | #define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000) |
| Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame] | 38 | #define VA_SPEAR3XX_ICM3_MISC_REG_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE) |
| viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 39 | |
| 40 | /* Debug uart for linux, will be used for debug and uncompress messages */ |
| 41 | #define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE |
| 42 | #define VA_SPEAR_DBG_UART_BASE VA_SPEAR3XX_ICM1_UART_BASE |
| 43 | |
| 44 | /* Sysctl base for spear platform */ |
| 45 | #define SPEAR_SYS_CTRL_BASE SPEAR3XX_ICM3_SYS_CTRL_BASE |
| 46 | #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR3XX_ICM3_SYS_CTRL_BASE |
| 47 | |
| 48 | #endif /* __MACH_SPEAR3XX_H */ |