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Carlo Caione594c6fb2013-11-16 18:33:54 +01001/*
2 * An RTC driver for Allwinner A10/A20
3 *
4 * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 */
20
21#include <linux/delay.h>
22#include <linux/err.h>
23#include <linux/fs.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/io.h>
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/of.h>
30#include <linux/of_address.h>
31#include <linux/of_device.h>
32#include <linux/platform_device.h>
33#include <linux/rtc.h>
34#include <linux/types.h>
35
36#define SUNXI_LOSC_CTRL 0x0000
37#define SUNXI_LOSC_CTRL_RTC_HMS_ACC BIT(8)
38#define SUNXI_LOSC_CTRL_RTC_YMD_ACC BIT(7)
39
40#define SUNXI_RTC_YMD 0x0004
41
42#define SUNXI_RTC_HMS 0x0008
43
44#define SUNXI_ALRM_DHMS 0x000c
45
46#define SUNXI_ALRM_EN 0x0014
47#define SUNXI_ALRM_EN_CNT_EN BIT(8)
48
49#define SUNXI_ALRM_IRQ_EN 0x0018
50#define SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN BIT(0)
51
52#define SUNXI_ALRM_IRQ_STA 0x001c
53#define SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND BIT(0)
54
55#define SUNXI_MASK_DH 0x0000001f
56#define SUNXI_MASK_SM 0x0000003f
57#define SUNXI_MASK_M 0x0000000f
58#define SUNXI_MASK_LY 0x00000001
59#define SUNXI_MASK_D 0x00000ffe
60#define SUNXI_MASK_M 0x0000000f
61
62#define SUNXI_GET(x, mask, shift) (((x) & ((mask) << (shift))) \
63 >> (shift))
64
65#define SUNXI_SET(x, mask, shift) (((x) & (mask)) << (shift))
66
67/*
68 * Get date values
69 */
70#define SUNXI_DATE_GET_DAY_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 0)
71#define SUNXI_DATE_GET_MON_VALUE(x) SUNXI_GET(x, SUNXI_MASK_M, 8)
72#define SUNXI_DATE_GET_YEAR_VALUE(x, mask) SUNXI_GET(x, mask, 16)
73
74/*
75 * Get time values
76 */
77#define SUNXI_TIME_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0)
78#define SUNXI_TIME_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8)
79#define SUNXI_TIME_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16)
80
81/*
82 * Get alarm values
83 */
84#define SUNXI_ALRM_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0)
85#define SUNXI_ALRM_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8)
86#define SUNXI_ALRM_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16)
87
88/*
89 * Set date values
90 */
91#define SUNXI_DATE_SET_DAY_VALUE(x) SUNXI_DATE_GET_DAY_VALUE(x)
92#define SUNXI_DATE_SET_MON_VALUE(x) SUNXI_SET(x, SUNXI_MASK_M, 8)
93#define SUNXI_DATE_SET_YEAR_VALUE(x, mask) SUNXI_SET(x, mask, 16)
94#define SUNXI_LEAP_SET_VALUE(x, shift) SUNXI_SET(x, SUNXI_MASK_LY, shift)
95
96/*
97 * Set time values
98 */
99#define SUNXI_TIME_SET_SEC_VALUE(x) SUNXI_TIME_GET_SEC_VALUE(x)
100#define SUNXI_TIME_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8)
101#define SUNXI_TIME_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16)
102
103/*
104 * Set alarm values
105 */
106#define SUNXI_ALRM_SET_SEC_VALUE(x) SUNXI_ALRM_GET_SEC_VALUE(x)
107#define SUNXI_ALRM_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8)
108#define SUNXI_ALRM_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16)
109#define SUNXI_ALRM_SET_DAY_VALUE(x) SUNXI_SET(x, SUNXI_MASK_D, 21)
110
111/*
112 * Time unit conversions
113 */
114#define SEC_IN_MIN 60
115#define SEC_IN_HOUR (60 * SEC_IN_MIN)
116#define SEC_IN_DAY (24 * SEC_IN_HOUR)
117
118/*
119 * The year parameter passed to the driver is usually an offset relative to
120 * the year 1900. This macro is used to convert this offset to another one
121 * relative to the minimum year allowed by the hardware.
122 */
123#define SUNXI_YEAR_OFF(x) ((x)->min - 1900)
124
125/*
126 * min and max year are arbitrary set considering the limited range of the
127 * hardware register field
128 */
129struct sunxi_rtc_data_year {
130 unsigned int min; /* min year allowed */
131 unsigned int max; /* max year allowed */
132 unsigned int mask; /* mask for the year field */
133 unsigned char leap_shift; /* bit shift to get the leap year */
134};
135
136static struct sunxi_rtc_data_year data_year_param[] = {
137 [0] = {
138 .min = 2010,
139 .max = 2073,
140 .mask = 0x3f,
141 .leap_shift = 22,
142 },
143 [1] = {
144 .min = 1970,
145 .max = 2225,
146 .mask = 0xff,
147 .leap_shift = 24,
148 },
149};
150
151struct sunxi_rtc_dev {
152 struct rtc_device *rtc;
153 struct device *dev;
154 struct sunxi_rtc_data_year *data_year;
155 void __iomem *base;
156 int irq;
157};
158
159static irqreturn_t sunxi_rtc_alarmirq(int irq, void *id)
160{
161 struct sunxi_rtc_dev *chip = (struct sunxi_rtc_dev *) id;
162 u32 val;
163
164 val = readl(chip->base + SUNXI_ALRM_IRQ_STA);
165
166 if (val & SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND) {
167 val |= SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND;
168 writel(val, chip->base + SUNXI_ALRM_IRQ_STA);
169
170 rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
171
172 return IRQ_HANDLED;
173 }
174
175 return IRQ_NONE;
176}
177
178static void sunxi_rtc_setaie(int to, struct sunxi_rtc_dev *chip)
179{
180 u32 alrm_val = 0;
181 u32 alrm_irq_val = 0;
182
183 if (to) {
184 alrm_val = readl(chip->base + SUNXI_ALRM_EN);
185 alrm_val |= SUNXI_ALRM_EN_CNT_EN;
186
187 alrm_irq_val = readl(chip->base + SUNXI_ALRM_IRQ_EN);
188 alrm_irq_val |= SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN;
189 } else {
190 writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND,
191 chip->base + SUNXI_ALRM_IRQ_STA);
192 }
193
194 writel(alrm_val, chip->base + SUNXI_ALRM_EN);
195 writel(alrm_irq_val, chip->base + SUNXI_ALRM_IRQ_EN);
196}
197
198static int sunxi_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
199{
200 struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
201 struct rtc_time *alrm_tm = &wkalrm->time;
202 u32 alrm;
203 u32 alrm_en;
204 u32 date;
205
206 alrm = readl(chip->base + SUNXI_ALRM_DHMS);
207 date = readl(chip->base + SUNXI_RTC_YMD);
208
209 alrm_tm->tm_sec = SUNXI_ALRM_GET_SEC_VALUE(alrm);
210 alrm_tm->tm_min = SUNXI_ALRM_GET_MIN_VALUE(alrm);
211 alrm_tm->tm_hour = SUNXI_ALRM_GET_HOUR_VALUE(alrm);
212
213 alrm_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
214 alrm_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
215 alrm_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
216 chip->data_year->mask);
217
218 alrm_tm->tm_mon -= 1;
219
220 /*
221 * switch from (data_year->min)-relative offset to
222 * a (1900)-relative one
223 */
224 alrm_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
225
226 alrm_en = readl(chip->base + SUNXI_ALRM_IRQ_EN);
227 if (alrm_en & SUNXI_ALRM_EN_CNT_EN)
228 wkalrm->enabled = 1;
229
230 return 0;
231}
232
233static int sunxi_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
234{
235 struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
236 u32 date, time;
237
238 /*
239 * read again in case it changes
240 */
241 do {
242 date = readl(chip->base + SUNXI_RTC_YMD);
243 time = readl(chip->base + SUNXI_RTC_HMS);
244 } while ((date != readl(chip->base + SUNXI_RTC_YMD)) ||
245 (time != readl(chip->base + SUNXI_RTC_HMS)));
246
247 rtc_tm->tm_sec = SUNXI_TIME_GET_SEC_VALUE(time);
248 rtc_tm->tm_min = SUNXI_TIME_GET_MIN_VALUE(time);
249 rtc_tm->tm_hour = SUNXI_TIME_GET_HOUR_VALUE(time);
250
251 rtc_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
252 rtc_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
253 rtc_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
254 chip->data_year->mask);
255
256 rtc_tm->tm_mon -= 1;
257
258 /*
259 * switch from (data_year->min)-relative offset to
260 * a (1900)-relative one
261 */
262 rtc_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
263
264 return rtc_valid_tm(rtc_tm);
265}
266
267static int sunxi_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
268{
269 struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
270 struct rtc_time *alrm_tm = &wkalrm->time;
271 struct rtc_time tm_now;
272 u32 alrm = 0;
273 unsigned long time_now = 0;
274 unsigned long time_set = 0;
275 unsigned long time_gap = 0;
276 unsigned long time_gap_day = 0;
277 unsigned long time_gap_hour = 0;
278 unsigned long time_gap_min = 0;
279 int ret = 0;
280
281 ret = sunxi_rtc_gettime(dev, &tm_now);
282 if (ret < 0) {
283 dev_err(dev, "Error in getting time\n");
284 return -EINVAL;
285 }
286
287 rtc_tm_to_time(alrm_tm, &time_set);
288 rtc_tm_to_time(&tm_now, &time_now);
289 if (time_set <= time_now) {
290 dev_err(dev, "Date to set in the past\n");
291 return -EINVAL;
292 }
293
294 time_gap = time_set - time_now;
295 time_gap_day = time_gap / SEC_IN_DAY;
296 time_gap -= time_gap_day * SEC_IN_DAY;
297 time_gap_hour = time_gap / SEC_IN_HOUR;
298 time_gap -= time_gap_hour * SEC_IN_HOUR;
299 time_gap_min = time_gap / SEC_IN_MIN;
300 time_gap -= time_gap_min * SEC_IN_MIN;
301
302 if (time_gap_day > 255) {
303 dev_err(dev, "Day must be in the range 0 - 255\n");
304 return -EINVAL;
305 }
306
307 sunxi_rtc_setaie(0, chip);
308 writel(0, chip->base + SUNXI_ALRM_DHMS);
309 usleep_range(100, 300);
310
311 alrm = SUNXI_ALRM_SET_SEC_VALUE(time_gap) |
312 SUNXI_ALRM_SET_MIN_VALUE(time_gap_min) |
313 SUNXI_ALRM_SET_HOUR_VALUE(time_gap_hour) |
314 SUNXI_ALRM_SET_DAY_VALUE(time_gap_day);
315 writel(alrm, chip->base + SUNXI_ALRM_DHMS);
316
317 writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
318 writel(SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN, chip->base + SUNXI_ALRM_IRQ_EN);
319
320 sunxi_rtc_setaie(wkalrm->enabled, chip);
321
322 return 0;
323}
324
325static int sunxi_rtc_wait(struct sunxi_rtc_dev *chip, int offset,
326 unsigned int mask, unsigned int ms_timeout)
327{
328 const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
329 u32 reg;
330
331 do {
332 reg = readl(chip->base + offset);
333 reg &= mask;
334
335 if (reg == mask)
336 return 0;
337
338 } while (time_before(jiffies, timeout));
339
340 return -ETIMEDOUT;
341}
342
343static int sunxi_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
344{
345 struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
346 u32 date = 0;
347 u32 time = 0;
348 int year;
349
350 /*
351 * the input rtc_tm->tm_year is the offset relative to 1900. We use
352 * the SUNXI_YEAR_OFF macro to rebase it with respect to the min year
353 * allowed by the hardware
354 */
355
356 year = rtc_tm->tm_year + 1900;
357 if (year < chip->data_year->min || year > chip->data_year->max) {
358 dev_err(dev, "rtc only supports year in range %d - %d\n",
359 chip->data_year->min, chip->data_year->max);
360 return -EINVAL;
361 }
362
363 rtc_tm->tm_year -= SUNXI_YEAR_OFF(chip->data_year);
364 rtc_tm->tm_mon += 1;
365
366 date = SUNXI_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
367 SUNXI_DATE_SET_MON_VALUE(rtc_tm->tm_mon) |
368 SUNXI_DATE_SET_YEAR_VALUE(rtc_tm->tm_year,
369 chip->data_year->mask);
370
371 if (is_leap_year(year))
372 date |= SUNXI_LEAP_SET_VALUE(1, chip->data_year->leap_shift);
373
374 time = SUNXI_TIME_SET_SEC_VALUE(rtc_tm->tm_sec) |
375 SUNXI_TIME_SET_MIN_VALUE(rtc_tm->tm_min) |
376 SUNXI_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
377
378 writel(0, chip->base + SUNXI_RTC_HMS);
379 writel(0, chip->base + SUNXI_RTC_YMD);
380
381 writel(time, chip->base + SUNXI_RTC_HMS);
382
383 /*
384 * After writing the RTC HH-MM-SS register, the
385 * SUNXI_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
386 * be cleared until the real writing operation is finished
387 */
388
389 if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
390 SUNXI_LOSC_CTRL_RTC_HMS_ACC, 50)) {
391 dev_err(dev, "Failed to set rtc time.\n");
392 return -1;
393 }
394
395 writel(date, chip->base + SUNXI_RTC_YMD);
396
397 /*
398 * After writing the RTC YY-MM-DD register, the
399 * SUNXI_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
400 * be cleared until the real writing operation is finished
401 */
402
403 if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
404 SUNXI_LOSC_CTRL_RTC_YMD_ACC, 50)) {
405 dev_err(dev, "Failed to set rtc time.\n");
406 return -1;
407 }
408
409 return 0;
410}
411
412static int sunxi_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
413{
414 struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
415
416 if (!enabled)
417 sunxi_rtc_setaie(enabled, chip);
418
419 return 0;
420}
421
422static const struct rtc_class_ops sunxi_rtc_ops = {
423 .read_time = sunxi_rtc_gettime,
424 .set_time = sunxi_rtc_settime,
425 .read_alarm = sunxi_rtc_getalarm,
426 .set_alarm = sunxi_rtc_setalarm,
427 .alarm_irq_enable = sunxi_rtc_alarm_irq_enable
428};
429
430static const struct of_device_id sunxi_rtc_dt_ids[] = {
431 { .compatible = "allwinner,sun4i-rtc", .data = &data_year_param[0] },
432 { .compatible = "allwinner,sun7i-a20-rtc", .data = &data_year_param[1] },
433 { /* sentinel */ },
434};
435MODULE_DEVICE_TABLE(of, sunxi_rtc_dt_ids);
436
437static int sunxi_rtc_probe(struct platform_device *pdev)
438{
439 struct sunxi_rtc_dev *chip;
440 struct resource *res;
441 const struct of_device_id *of_id;
442 int ret;
443
444 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
445 if (!chip)
446 return -ENOMEM;
447
448 platform_set_drvdata(pdev, chip);
449 chip->dev = &pdev->dev;
450
451 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
452 chip->base = devm_ioremap_resource(&pdev->dev, res);
453 if (IS_ERR(chip->base))
454 return PTR_ERR(chip->base);
455
456 chip->irq = platform_get_irq(pdev, 0);
457 if (chip->irq < 0) {
458 dev_err(&pdev->dev, "No IRQ resource\n");
459 return chip->irq;
460 }
461 ret = devm_request_irq(&pdev->dev, chip->irq, sunxi_rtc_alarmirq,
462 0, dev_name(&pdev->dev), chip);
463 if (ret) {
464 dev_err(&pdev->dev, "Could not request IRQ\n");
465 return ret;
466 }
467
468 of_id = of_match_device(sunxi_rtc_dt_ids, &pdev->dev);
469 if (!of_id) {
470 dev_err(&pdev->dev, "Unable to setup RTC data\n");
471 return -ENODEV;
472 }
473 chip->data_year = (struct sunxi_rtc_data_year *) of_id->data;
474
475 /* clear the alarm count value */
476 writel(0, chip->base + SUNXI_ALRM_DHMS);
477
478 /* disable alarm, not generate irq pending */
479 writel(0, chip->base + SUNXI_ALRM_EN);
480
481 /* disable alarm week/cnt irq, unset to cpu */
482 writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
483
484 /* clear alarm week/cnt irq pending */
485 writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND, chip->base +
486 SUNXI_ALRM_IRQ_STA);
487
488 chip->rtc = rtc_device_register("rtc-sunxi", &pdev->dev,
489 &sunxi_rtc_ops, THIS_MODULE);
490 if (IS_ERR(chip->rtc)) {
491 dev_err(&pdev->dev, "unable to register device\n");
492 return PTR_ERR(chip->rtc);
493 }
494
495 dev_info(&pdev->dev, "RTC enabled\n");
496
497 return 0;
498}
499
500static int sunxi_rtc_remove(struct platform_device *pdev)
501{
502 struct sunxi_rtc_dev *chip = platform_get_drvdata(pdev);
503
504 rtc_device_unregister(chip->rtc);
505
506 return 0;
507}
508
509static struct platform_driver sunxi_rtc_driver = {
510 .probe = sunxi_rtc_probe,
511 .remove = sunxi_rtc_remove,
512 .driver = {
513 .name = "sunxi-rtc",
514 .owner = THIS_MODULE,
515 .of_match_table = sunxi_rtc_dt_ids,
516 },
517};
518
519module_platform_driver(sunxi_rtc_driver);
520
521MODULE_DESCRIPTION("sunxi RTC driver");
522MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
523MODULE_LICENSE("GPL");