Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 1 | /* |
| 2 | * sh73a0 processor support |
| 3 | * |
| 4 | * Copyright (C) 2010 Takashi Yoshii |
| 5 | * Copyright (C) 2010 Magnus Damm |
| 6 | * Copyright (C) 2008 Yoshihiro Shimoda |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 20 | */ |
| 21 | #include <linux/kernel.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/irq.h> |
| 25 | #include <linux/platform_device.h> |
| 26 | #include <linux/delay.h> |
| 27 | #include <linux/input.h> |
| 28 | #include <linux/io.h> |
| 29 | #include <linux/serial_sci.h> |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 30 | #include <linux/sh_dma.h> |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 31 | #include <linux/sh_intc.h> |
| 32 | #include <linux/sh_timer.h> |
| 33 | #include <mach/hardware.h> |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 34 | #include <mach/sh73a0.h> |
Magnus Damm | 50e15c3 | 2012-02-29 21:37:27 +0900 | [diff] [blame^] | 35 | #include <mach/common.h> |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 36 | #include <asm/mach-types.h> |
Magnus Damm | 50e15c3 | 2012-02-29 21:37:27 +0900 | [diff] [blame^] | 37 | #include <asm/mach/map.h> |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 38 | #include <asm/mach/arch.h> |
| 39 | |
Magnus Damm | 50e15c3 | 2012-02-29 21:37:27 +0900 | [diff] [blame^] | 40 | static struct map_desc sh73a0_io_desc[] __initdata = { |
| 41 | /* create a 1:1 entity map for 0xe6xxxxxx |
| 42 | * used by CPGA, INTC and PFC. |
| 43 | */ |
| 44 | { |
| 45 | .virtual = 0xe6000000, |
| 46 | .pfn = __phys_to_pfn(0xe6000000), |
| 47 | .length = 256 << 20, |
| 48 | .type = MT_DEVICE_NONSHARED |
| 49 | }, |
| 50 | }; |
| 51 | |
| 52 | void __init sh73a0_map_io(void) |
| 53 | { |
| 54 | iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); |
| 55 | } |
| 56 | |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 57 | static struct plat_sci_port scif0_platform_data = { |
| 58 | .mapbase = 0xe6c40000, |
| 59 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 60 | .scscr = SCSCR_RE | SCSCR_TE, |
| 61 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 62 | .type = PORT_SCIFA, |
| 63 | .irqs = { gic_spi(72), gic_spi(72), |
| 64 | gic_spi(72), gic_spi(72) }, |
| 65 | }; |
| 66 | |
| 67 | static struct platform_device scif0_device = { |
| 68 | .name = "sh-sci", |
| 69 | .id = 0, |
| 70 | .dev = { |
| 71 | .platform_data = &scif0_platform_data, |
| 72 | }, |
| 73 | }; |
| 74 | |
| 75 | static struct plat_sci_port scif1_platform_data = { |
| 76 | .mapbase = 0xe6c50000, |
| 77 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 78 | .scscr = SCSCR_RE | SCSCR_TE, |
| 79 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 80 | .type = PORT_SCIFA, |
| 81 | .irqs = { gic_spi(73), gic_spi(73), |
| 82 | gic_spi(73), gic_spi(73) }, |
| 83 | }; |
| 84 | |
| 85 | static struct platform_device scif1_device = { |
| 86 | .name = "sh-sci", |
| 87 | .id = 1, |
| 88 | .dev = { |
| 89 | .platform_data = &scif1_platform_data, |
| 90 | }, |
| 91 | }; |
| 92 | |
| 93 | static struct plat_sci_port scif2_platform_data = { |
| 94 | .mapbase = 0xe6c60000, |
| 95 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 96 | .scscr = SCSCR_RE | SCSCR_TE, |
| 97 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 98 | .type = PORT_SCIFA, |
| 99 | .irqs = { gic_spi(74), gic_spi(74), |
| 100 | gic_spi(74), gic_spi(74) }, |
| 101 | }; |
| 102 | |
| 103 | static struct platform_device scif2_device = { |
| 104 | .name = "sh-sci", |
| 105 | .id = 2, |
| 106 | .dev = { |
| 107 | .platform_data = &scif2_platform_data, |
| 108 | }, |
| 109 | }; |
| 110 | |
| 111 | static struct plat_sci_port scif3_platform_data = { |
| 112 | .mapbase = 0xe6c70000, |
| 113 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 114 | .scscr = SCSCR_RE | SCSCR_TE, |
| 115 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 116 | .type = PORT_SCIFA, |
| 117 | .irqs = { gic_spi(75), gic_spi(75), |
| 118 | gic_spi(75), gic_spi(75) }, |
| 119 | }; |
| 120 | |
| 121 | static struct platform_device scif3_device = { |
| 122 | .name = "sh-sci", |
| 123 | .id = 3, |
| 124 | .dev = { |
| 125 | .platform_data = &scif3_platform_data, |
| 126 | }, |
| 127 | }; |
| 128 | |
| 129 | static struct plat_sci_port scif4_platform_data = { |
| 130 | .mapbase = 0xe6c80000, |
| 131 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 132 | .scscr = SCSCR_RE | SCSCR_TE, |
| 133 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 134 | .type = PORT_SCIFA, |
| 135 | .irqs = { gic_spi(78), gic_spi(78), |
| 136 | gic_spi(78), gic_spi(78) }, |
| 137 | }; |
| 138 | |
| 139 | static struct platform_device scif4_device = { |
| 140 | .name = "sh-sci", |
| 141 | .id = 4, |
| 142 | .dev = { |
| 143 | .platform_data = &scif4_platform_data, |
| 144 | }, |
| 145 | }; |
| 146 | |
| 147 | static struct plat_sci_port scif5_platform_data = { |
| 148 | .mapbase = 0xe6cb0000, |
| 149 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 150 | .scscr = SCSCR_RE | SCSCR_TE, |
| 151 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 152 | .type = PORT_SCIFA, |
| 153 | .irqs = { gic_spi(79), gic_spi(79), |
| 154 | gic_spi(79), gic_spi(79) }, |
| 155 | }; |
| 156 | |
| 157 | static struct platform_device scif5_device = { |
| 158 | .name = "sh-sci", |
| 159 | .id = 5, |
| 160 | .dev = { |
| 161 | .platform_data = &scif5_platform_data, |
| 162 | }, |
| 163 | }; |
| 164 | |
| 165 | static struct plat_sci_port scif6_platform_data = { |
| 166 | .mapbase = 0xe6cc0000, |
| 167 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 168 | .scscr = SCSCR_RE | SCSCR_TE, |
| 169 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 170 | .type = PORT_SCIFA, |
| 171 | .irqs = { gic_spi(156), gic_spi(156), |
| 172 | gic_spi(156), gic_spi(156) }, |
| 173 | }; |
| 174 | |
| 175 | static struct platform_device scif6_device = { |
| 176 | .name = "sh-sci", |
| 177 | .id = 6, |
| 178 | .dev = { |
| 179 | .platform_data = &scif6_platform_data, |
| 180 | }, |
| 181 | }; |
| 182 | |
| 183 | static struct plat_sci_port scif7_platform_data = { |
| 184 | .mapbase = 0xe6cd0000, |
| 185 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 186 | .scscr = SCSCR_RE | SCSCR_TE, |
| 187 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 188 | .type = PORT_SCIFA, |
| 189 | .irqs = { gic_spi(143), gic_spi(143), |
| 190 | gic_spi(143), gic_spi(143) }, |
| 191 | }; |
| 192 | |
| 193 | static struct platform_device scif7_device = { |
| 194 | .name = "sh-sci", |
| 195 | .id = 7, |
| 196 | .dev = { |
| 197 | .platform_data = &scif7_platform_data, |
| 198 | }, |
| 199 | }; |
| 200 | |
| 201 | static struct plat_sci_port scif8_platform_data = { |
| 202 | .mapbase = 0xe6c30000, |
| 203 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 204 | .scscr = SCSCR_RE | SCSCR_TE, |
| 205 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 206 | .type = PORT_SCIFB, |
| 207 | .irqs = { gic_spi(80), gic_spi(80), |
| 208 | gic_spi(80), gic_spi(80) }, |
| 209 | }; |
| 210 | |
| 211 | static struct platform_device scif8_device = { |
| 212 | .name = "sh-sci", |
| 213 | .id = 8, |
| 214 | .dev = { |
| 215 | .platform_data = &scif8_platform_data, |
| 216 | }, |
| 217 | }; |
| 218 | |
| 219 | static struct sh_timer_config cmt10_platform_data = { |
| 220 | .name = "CMT10", |
| 221 | .channel_offset = 0x10, |
| 222 | .timer_bit = 0, |
| 223 | .clockevent_rating = 125, |
| 224 | .clocksource_rating = 125, |
| 225 | }; |
| 226 | |
| 227 | static struct resource cmt10_resources[] = { |
| 228 | [0] = { |
| 229 | .name = "CMT10", |
| 230 | .start = 0xe6138010, |
| 231 | .end = 0xe613801b, |
| 232 | .flags = IORESOURCE_MEM, |
| 233 | }, |
| 234 | [1] = { |
| 235 | .start = gic_spi(65), |
| 236 | .flags = IORESOURCE_IRQ, |
| 237 | }, |
| 238 | }; |
| 239 | |
| 240 | static struct platform_device cmt10_device = { |
| 241 | .name = "sh_cmt", |
| 242 | .id = 10, |
| 243 | .dev = { |
| 244 | .platform_data = &cmt10_platform_data, |
| 245 | }, |
| 246 | .resource = cmt10_resources, |
| 247 | .num_resources = ARRAY_SIZE(cmt10_resources), |
| 248 | }; |
| 249 | |
Magnus Damm | 5010f3d | 2010-12-21 08:40:59 +0000 | [diff] [blame] | 250 | /* TMU */ |
| 251 | static struct sh_timer_config tmu00_platform_data = { |
| 252 | .name = "TMU00", |
| 253 | .channel_offset = 0x4, |
| 254 | .timer_bit = 0, |
| 255 | .clockevent_rating = 200, |
| 256 | }; |
| 257 | |
| 258 | static struct resource tmu00_resources[] = { |
| 259 | [0] = { |
| 260 | .name = "TMU00", |
| 261 | .start = 0xfff60008, |
| 262 | .end = 0xfff60013, |
| 263 | .flags = IORESOURCE_MEM, |
| 264 | }, |
| 265 | [1] = { |
| 266 | .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */ |
| 267 | .flags = IORESOURCE_IRQ, |
| 268 | }, |
| 269 | }; |
| 270 | |
| 271 | static struct platform_device tmu00_device = { |
| 272 | .name = "sh_tmu", |
| 273 | .id = 0, |
| 274 | .dev = { |
| 275 | .platform_data = &tmu00_platform_data, |
| 276 | }, |
| 277 | .resource = tmu00_resources, |
| 278 | .num_resources = ARRAY_SIZE(tmu00_resources), |
| 279 | }; |
| 280 | |
| 281 | static struct sh_timer_config tmu01_platform_data = { |
| 282 | .name = "TMU01", |
| 283 | .channel_offset = 0x10, |
| 284 | .timer_bit = 1, |
| 285 | .clocksource_rating = 200, |
| 286 | }; |
| 287 | |
| 288 | static struct resource tmu01_resources[] = { |
| 289 | [0] = { |
| 290 | .name = "TMU01", |
| 291 | .start = 0xfff60014, |
| 292 | .end = 0xfff6001f, |
| 293 | .flags = IORESOURCE_MEM, |
| 294 | }, |
| 295 | [1] = { |
| 296 | .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */ |
| 297 | .flags = IORESOURCE_IRQ, |
| 298 | }, |
| 299 | }; |
| 300 | |
| 301 | static struct platform_device tmu01_device = { |
| 302 | .name = "sh_tmu", |
| 303 | .id = 1, |
| 304 | .dev = { |
| 305 | .platform_data = &tmu01_platform_data, |
| 306 | }, |
| 307 | .resource = tmu01_resources, |
| 308 | .num_resources = ARRAY_SIZE(tmu01_resources), |
| 309 | }; |
| 310 | |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 311 | static struct resource i2c0_resources[] = { |
| 312 | [0] = { |
| 313 | .name = "IIC0", |
| 314 | .start = 0xe6820000, |
| 315 | .end = 0xe6820425 - 1, |
| 316 | .flags = IORESOURCE_MEM, |
| 317 | }, |
| 318 | [1] = { |
| 319 | .start = gic_spi(167), |
| 320 | .end = gic_spi(170), |
| 321 | .flags = IORESOURCE_IRQ, |
| 322 | }, |
| 323 | }; |
| 324 | |
| 325 | static struct resource i2c1_resources[] = { |
| 326 | [0] = { |
| 327 | .name = "IIC1", |
| 328 | .start = 0xe6822000, |
| 329 | .end = 0xe6822425 - 1, |
| 330 | .flags = IORESOURCE_MEM, |
| 331 | }, |
| 332 | [1] = { |
| 333 | .start = gic_spi(51), |
| 334 | .end = gic_spi(54), |
| 335 | .flags = IORESOURCE_IRQ, |
| 336 | }, |
| 337 | }; |
| 338 | |
| 339 | static struct resource i2c2_resources[] = { |
| 340 | [0] = { |
| 341 | .name = "IIC2", |
| 342 | .start = 0xe6824000, |
| 343 | .end = 0xe6824425 - 1, |
| 344 | .flags = IORESOURCE_MEM, |
| 345 | }, |
| 346 | [1] = { |
| 347 | .start = gic_spi(171), |
| 348 | .end = gic_spi(174), |
| 349 | .flags = IORESOURCE_IRQ, |
| 350 | }, |
| 351 | }; |
| 352 | |
| 353 | static struct resource i2c3_resources[] = { |
| 354 | [0] = { |
| 355 | .name = "IIC3", |
| 356 | .start = 0xe6826000, |
| 357 | .end = 0xe6826425 - 1, |
| 358 | .flags = IORESOURCE_MEM, |
| 359 | }, |
| 360 | [1] = { |
| 361 | .start = gic_spi(183), |
| 362 | .end = gic_spi(186), |
| 363 | .flags = IORESOURCE_IRQ, |
| 364 | }, |
| 365 | }; |
| 366 | |
| 367 | static struct resource i2c4_resources[] = { |
| 368 | [0] = { |
| 369 | .name = "IIC4", |
| 370 | .start = 0xe6828000, |
| 371 | .end = 0xe6828425 - 1, |
| 372 | .flags = IORESOURCE_MEM, |
| 373 | }, |
| 374 | [1] = { |
| 375 | .start = gic_spi(187), |
| 376 | .end = gic_spi(190), |
| 377 | .flags = IORESOURCE_IRQ, |
| 378 | }, |
| 379 | }; |
| 380 | |
| 381 | static struct platform_device i2c0_device = { |
| 382 | .name = "i2c-sh_mobile", |
| 383 | .id = 0, |
| 384 | .resource = i2c0_resources, |
| 385 | .num_resources = ARRAY_SIZE(i2c0_resources), |
| 386 | }; |
| 387 | |
| 388 | static struct platform_device i2c1_device = { |
| 389 | .name = "i2c-sh_mobile", |
| 390 | .id = 1, |
| 391 | .resource = i2c1_resources, |
| 392 | .num_resources = ARRAY_SIZE(i2c1_resources), |
| 393 | }; |
| 394 | |
| 395 | static struct platform_device i2c2_device = { |
| 396 | .name = "i2c-sh_mobile", |
| 397 | .id = 2, |
| 398 | .resource = i2c2_resources, |
| 399 | .num_resources = ARRAY_SIZE(i2c2_resources), |
| 400 | }; |
| 401 | |
| 402 | static struct platform_device i2c3_device = { |
| 403 | .name = "i2c-sh_mobile", |
| 404 | .id = 3, |
| 405 | .resource = i2c3_resources, |
| 406 | .num_resources = ARRAY_SIZE(i2c3_resources), |
| 407 | }; |
| 408 | |
| 409 | static struct platform_device i2c4_device = { |
| 410 | .name = "i2c-sh_mobile", |
| 411 | .id = 4, |
| 412 | .resource = i2c4_resources, |
| 413 | .num_resources = ARRAY_SIZE(i2c4_resources), |
| 414 | }; |
| 415 | |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 416 | /* Transmit sizes and respective CHCR register values */ |
| 417 | enum { |
| 418 | XMIT_SZ_8BIT = 0, |
| 419 | XMIT_SZ_16BIT = 1, |
| 420 | XMIT_SZ_32BIT = 2, |
| 421 | XMIT_SZ_64BIT = 7, |
| 422 | XMIT_SZ_128BIT = 3, |
| 423 | XMIT_SZ_256BIT = 4, |
| 424 | XMIT_SZ_512BIT = 5, |
| 425 | }; |
| 426 | |
| 427 | /* log2(size / 8) - used to calculate number of transfers */ |
| 428 | #define TS_SHIFT { \ |
| 429 | [XMIT_SZ_8BIT] = 0, \ |
| 430 | [XMIT_SZ_16BIT] = 1, \ |
| 431 | [XMIT_SZ_32BIT] = 2, \ |
| 432 | [XMIT_SZ_64BIT] = 3, \ |
| 433 | [XMIT_SZ_128BIT] = 4, \ |
| 434 | [XMIT_SZ_256BIT] = 5, \ |
| 435 | [XMIT_SZ_512BIT] = 6, \ |
| 436 | } |
| 437 | |
| 438 | #define TS_INDEX2VAL(i) ((((i) & 3) << 3) | (((i) & 0xc) << (20 - 2))) |
| 439 | #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz))) |
| 440 | #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz))) |
| 441 | |
| 442 | static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { |
| 443 | { |
| 444 | .slave_id = SHDMA_SLAVE_SCIF0_TX, |
| 445 | .addr = 0xe6c40020, |
| 446 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 447 | .mid_rid = 0x21, |
| 448 | }, { |
| 449 | .slave_id = SHDMA_SLAVE_SCIF0_RX, |
| 450 | .addr = 0xe6c40024, |
| 451 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 452 | .mid_rid = 0x22, |
| 453 | }, { |
| 454 | .slave_id = SHDMA_SLAVE_SCIF1_TX, |
| 455 | .addr = 0xe6c50020, |
| 456 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 457 | .mid_rid = 0x25, |
| 458 | }, { |
| 459 | .slave_id = SHDMA_SLAVE_SCIF1_RX, |
| 460 | .addr = 0xe6c50024, |
| 461 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 462 | .mid_rid = 0x26, |
| 463 | }, { |
| 464 | .slave_id = SHDMA_SLAVE_SCIF2_TX, |
| 465 | .addr = 0xe6c60020, |
| 466 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 467 | .mid_rid = 0x29, |
| 468 | }, { |
| 469 | .slave_id = SHDMA_SLAVE_SCIF2_RX, |
| 470 | .addr = 0xe6c60024, |
| 471 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 472 | .mid_rid = 0x2a, |
| 473 | }, { |
| 474 | .slave_id = SHDMA_SLAVE_SCIF3_TX, |
| 475 | .addr = 0xe6c70020, |
| 476 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 477 | .mid_rid = 0x2d, |
| 478 | }, { |
| 479 | .slave_id = SHDMA_SLAVE_SCIF3_RX, |
| 480 | .addr = 0xe6c70024, |
| 481 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 482 | .mid_rid = 0x2e, |
| 483 | }, { |
| 484 | .slave_id = SHDMA_SLAVE_SCIF4_TX, |
| 485 | .addr = 0xe6c80020, |
| 486 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 487 | .mid_rid = 0x39, |
| 488 | }, { |
| 489 | .slave_id = SHDMA_SLAVE_SCIF4_RX, |
| 490 | .addr = 0xe6c80024, |
| 491 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 492 | .mid_rid = 0x3a, |
| 493 | }, { |
| 494 | .slave_id = SHDMA_SLAVE_SCIF5_TX, |
| 495 | .addr = 0xe6cb0020, |
| 496 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 497 | .mid_rid = 0x35, |
| 498 | }, { |
| 499 | .slave_id = SHDMA_SLAVE_SCIF5_RX, |
| 500 | .addr = 0xe6cb0024, |
| 501 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 502 | .mid_rid = 0x36, |
| 503 | }, { |
| 504 | .slave_id = SHDMA_SLAVE_SCIF6_TX, |
| 505 | .addr = 0xe6cc0020, |
| 506 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 507 | .mid_rid = 0x1d, |
| 508 | }, { |
| 509 | .slave_id = SHDMA_SLAVE_SCIF6_RX, |
| 510 | .addr = 0xe6cc0024, |
| 511 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 512 | .mid_rid = 0x1e, |
| 513 | }, { |
| 514 | .slave_id = SHDMA_SLAVE_SCIF7_TX, |
| 515 | .addr = 0xe6cd0020, |
| 516 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 517 | .mid_rid = 0x19, |
| 518 | }, { |
| 519 | .slave_id = SHDMA_SLAVE_SCIF7_RX, |
| 520 | .addr = 0xe6cd0024, |
| 521 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 522 | .mid_rid = 0x1a, |
| 523 | }, { |
| 524 | .slave_id = SHDMA_SLAVE_SCIF8_TX, |
| 525 | .addr = 0xe6c30040, |
| 526 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 527 | .mid_rid = 0x3d, |
| 528 | }, { |
| 529 | .slave_id = SHDMA_SLAVE_SCIF8_RX, |
| 530 | .addr = 0xe6c30060, |
| 531 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 532 | .mid_rid = 0x3e, |
| 533 | }, { |
| 534 | .slave_id = SHDMA_SLAVE_SDHI0_TX, |
| 535 | .addr = 0xee100030, |
| 536 | .chcr = CHCR_TX(XMIT_SZ_16BIT), |
| 537 | .mid_rid = 0xc1, |
| 538 | }, { |
| 539 | .slave_id = SHDMA_SLAVE_SDHI0_RX, |
| 540 | .addr = 0xee100030, |
| 541 | .chcr = CHCR_RX(XMIT_SZ_16BIT), |
| 542 | .mid_rid = 0xc2, |
| 543 | }, { |
| 544 | .slave_id = SHDMA_SLAVE_SDHI1_TX, |
| 545 | .addr = 0xee120030, |
| 546 | .chcr = CHCR_TX(XMIT_SZ_16BIT), |
| 547 | .mid_rid = 0xc9, |
| 548 | }, { |
| 549 | .slave_id = SHDMA_SLAVE_SDHI1_RX, |
| 550 | .addr = 0xee120030, |
| 551 | .chcr = CHCR_RX(XMIT_SZ_16BIT), |
| 552 | .mid_rid = 0xca, |
| 553 | }, { |
| 554 | .slave_id = SHDMA_SLAVE_SDHI2_TX, |
| 555 | .addr = 0xee140030, |
| 556 | .chcr = CHCR_TX(XMIT_SZ_16BIT), |
| 557 | .mid_rid = 0xcd, |
| 558 | }, { |
| 559 | .slave_id = SHDMA_SLAVE_SDHI2_RX, |
| 560 | .addr = 0xee140030, |
| 561 | .chcr = CHCR_RX(XMIT_SZ_16BIT), |
| 562 | .mid_rid = 0xce, |
| 563 | }, { |
| 564 | .slave_id = SHDMA_SLAVE_MMCIF_TX, |
| 565 | .addr = 0xe6bd0034, |
| 566 | .chcr = CHCR_TX(XMIT_SZ_32BIT), |
| 567 | .mid_rid = 0xd1, |
| 568 | }, { |
| 569 | .slave_id = SHDMA_SLAVE_MMCIF_RX, |
| 570 | .addr = 0xe6bd0034, |
| 571 | .chcr = CHCR_RX(XMIT_SZ_32BIT), |
| 572 | .mid_rid = 0xd2, |
| 573 | }, |
| 574 | }; |
| 575 | |
| 576 | #define DMAE_CHANNEL(_offset) \ |
| 577 | { \ |
| 578 | .offset = _offset - 0x20, \ |
| 579 | .dmars = _offset - 0x20 + 0x40, \ |
| 580 | } |
| 581 | |
| 582 | static const struct sh_dmae_channel sh73a0_dmae_channels[] = { |
| 583 | DMAE_CHANNEL(0x8000), |
| 584 | DMAE_CHANNEL(0x8080), |
| 585 | DMAE_CHANNEL(0x8100), |
| 586 | DMAE_CHANNEL(0x8180), |
| 587 | DMAE_CHANNEL(0x8200), |
| 588 | DMAE_CHANNEL(0x8280), |
| 589 | DMAE_CHANNEL(0x8300), |
| 590 | DMAE_CHANNEL(0x8380), |
| 591 | DMAE_CHANNEL(0x8400), |
| 592 | DMAE_CHANNEL(0x8480), |
| 593 | DMAE_CHANNEL(0x8500), |
| 594 | DMAE_CHANNEL(0x8580), |
| 595 | DMAE_CHANNEL(0x8600), |
| 596 | DMAE_CHANNEL(0x8680), |
| 597 | DMAE_CHANNEL(0x8700), |
| 598 | DMAE_CHANNEL(0x8780), |
| 599 | DMAE_CHANNEL(0x8800), |
| 600 | DMAE_CHANNEL(0x8880), |
| 601 | DMAE_CHANNEL(0x8900), |
| 602 | DMAE_CHANNEL(0x8980), |
| 603 | }; |
| 604 | |
| 605 | static const unsigned int ts_shift[] = TS_SHIFT; |
| 606 | |
| 607 | static struct sh_dmae_pdata sh73a0_dmae_platform_data = { |
| 608 | .slave = sh73a0_dmae_slaves, |
| 609 | .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), |
| 610 | .channel = sh73a0_dmae_channels, |
| 611 | .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), |
| 612 | .ts_low_shift = 3, |
| 613 | .ts_low_mask = 0x18, |
| 614 | .ts_high_shift = (20 - 2), /* 2 bits for shifted low TS */ |
| 615 | .ts_high_mask = 0x00300000, |
| 616 | .ts_shift = ts_shift, |
| 617 | .ts_shift_num = ARRAY_SIZE(ts_shift), |
| 618 | .dmaor_init = DMAOR_DME, |
| 619 | }; |
| 620 | |
| 621 | static struct resource sh73a0_dmae_resources[] = { |
| 622 | { |
| 623 | /* Registers including DMAOR and channels including DMARSx */ |
| 624 | .start = 0xfe000020, |
| 625 | .end = 0xfe008a00 - 1, |
| 626 | .flags = IORESOURCE_MEM, |
| 627 | }, |
| 628 | { |
Shimoda, Yoshihiro | 2005246 | 2012-01-10 14:21:31 +0900 | [diff] [blame] | 629 | .name = "error_irq", |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 630 | .start = gic_spi(129), |
| 631 | .end = gic_spi(129), |
| 632 | .flags = IORESOURCE_IRQ, |
| 633 | }, |
| 634 | { |
| 635 | /* IRQ for channels 0-19 */ |
| 636 | .start = gic_spi(109), |
| 637 | .end = gic_spi(128), |
| 638 | .flags = IORESOURCE_IRQ, |
| 639 | }, |
| 640 | }; |
| 641 | |
| 642 | static struct platform_device dma0_device = { |
| 643 | .name = "sh-dma-engine", |
| 644 | .id = 0, |
| 645 | .resource = sh73a0_dmae_resources, |
| 646 | .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), |
| 647 | .dev = { |
| 648 | .platform_data = &sh73a0_dmae_platform_data, |
| 649 | }, |
| 650 | }; |
| 651 | |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 652 | static struct platform_device *sh73a0_early_devices[] __initdata = { |
| 653 | &scif0_device, |
| 654 | &scif1_device, |
| 655 | &scif2_device, |
| 656 | &scif3_device, |
| 657 | &scif4_device, |
| 658 | &scif5_device, |
| 659 | &scif6_device, |
| 660 | &scif7_device, |
| 661 | &scif8_device, |
| 662 | &cmt10_device, |
Magnus Damm | 5010f3d | 2010-12-21 08:40:59 +0000 | [diff] [blame] | 663 | &tmu00_device, |
| 664 | &tmu01_device, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 665 | }; |
| 666 | |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 667 | static struct platform_device *sh73a0_late_devices[] __initdata = { |
| 668 | &i2c0_device, |
| 669 | &i2c1_device, |
| 670 | &i2c2_device, |
| 671 | &i2c3_device, |
| 672 | &i2c4_device, |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 673 | &dma0_device, |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 674 | }; |
| 675 | |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 676 | #define SRCR2 0xe61580b0 |
| 677 | |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 678 | void __init sh73a0_add_standard_devices(void) |
| 679 | { |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 680 | /* Clear software reset bit on SY-DMAC module */ |
| 681 | __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); |
| 682 | |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 683 | platform_add_devices(sh73a0_early_devices, |
| 684 | ARRAY_SIZE(sh73a0_early_devices)); |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 685 | platform_add_devices(sh73a0_late_devices, |
| 686 | ARRAY_SIZE(sh73a0_late_devices)); |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 687 | } |
| 688 | |
| 689 | void __init sh73a0_add_early_devices(void) |
| 690 | { |
| 691 | early_platform_add_devices(sh73a0_early_devices, |
| 692 | ARRAY_SIZE(sh73a0_early_devices)); |
Magnus Damm | 50e15c3 | 2012-02-29 21:37:27 +0900 | [diff] [blame^] | 693 | |
| 694 | /* setup early console here as well */ |
| 695 | shmobile_setup_console(); |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 696 | } |