Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008-2009 Atheros Communications Inc. |
| 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
Joe Perches | 516304b | 2012-03-18 17:30:52 -0700 | [diff] [blame^] | 17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 18 | |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 19 | #include <linux/nl80211.h> |
| 20 | #include <linux/pci.h> |
| 21 | #include <linux/pci-aspm.h> |
Felix Fietkau | fa9bfd6 | 2011-04-13 21:56:44 +0200 | [diff] [blame] | 22 | #include <linux/etherdevice.h> |
Paul Gortmaker | 9d9779e | 2011-07-03 15:21:01 -0400 | [diff] [blame] | 23 | #include <linux/module.h> |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 24 | #include "../ath.h" |
| 25 | #include "ath5k.h" |
| 26 | #include "debug.h" |
| 27 | #include "base.h" |
| 28 | #include "reg.h" |
| 29 | |
| 30 | /* Known PCI ids */ |
| 31 | static DEFINE_PCI_DEVICE_TABLE(ath5k_pci_id_table) = { |
| 32 | { PCI_VDEVICE(ATHEROS, 0x0207) }, /* 5210 early */ |
| 33 | { PCI_VDEVICE(ATHEROS, 0x0007) }, /* 5210 */ |
| 34 | { PCI_VDEVICE(ATHEROS, 0x0011) }, /* 5311 - this is on AHB bus !*/ |
| 35 | { PCI_VDEVICE(ATHEROS, 0x0012) }, /* 5211 */ |
| 36 | { PCI_VDEVICE(ATHEROS, 0x0013) }, /* 5212 */ |
| 37 | { PCI_VDEVICE(3COM_2, 0x0013) }, /* 3com 5212 */ |
| 38 | { PCI_VDEVICE(3COM, 0x0013) }, /* 3com 3CRDAG675 5212 */ |
| 39 | { PCI_VDEVICE(ATHEROS, 0x1014) }, /* IBM minipci 5212 */ |
Pavel Roskin | 6a2a0e7 | 2011-07-09 00:17:51 -0400 | [diff] [blame] | 40 | { PCI_VDEVICE(ATHEROS, 0x0014) }, /* 5212 compatible */ |
| 41 | { PCI_VDEVICE(ATHEROS, 0x0015) }, /* 5212 compatible */ |
| 42 | { PCI_VDEVICE(ATHEROS, 0x0016) }, /* 5212 compatible */ |
| 43 | { PCI_VDEVICE(ATHEROS, 0x0017) }, /* 5212 compatible */ |
| 44 | { PCI_VDEVICE(ATHEROS, 0x0018) }, /* 5212 compatible */ |
| 45 | { PCI_VDEVICE(ATHEROS, 0x0019) }, /* 5212 compatible */ |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 46 | { PCI_VDEVICE(ATHEROS, 0x001a) }, /* 2413 Griffin-lite */ |
| 47 | { PCI_VDEVICE(ATHEROS, 0x001b) }, /* 5413 Eagle */ |
| 48 | { PCI_VDEVICE(ATHEROS, 0x001c) }, /* PCI-E cards */ |
| 49 | { PCI_VDEVICE(ATHEROS, 0x001d) }, /* 2417 Nala */ |
| 50 | { 0 } |
| 51 | }; |
Sedat Dilek | b7ee1d0 | 2010-12-07 22:35:50 +0100 | [diff] [blame] | 52 | MODULE_DEVICE_TABLE(pci, ath5k_pci_id_table); |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 53 | |
| 54 | /* return bus cachesize in 4B word units */ |
| 55 | static void ath5k_pci_read_cachesize(struct ath_common *common, int *csz) |
| 56 | { |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 57 | struct ath5k_hw *ah = (struct ath5k_hw *) common->priv; |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 58 | u8 u8tmp; |
| 59 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 60 | pci_read_config_byte(ah->pdev, PCI_CACHE_LINE_SIZE, &u8tmp); |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 61 | *csz = (int)u8tmp; |
| 62 | |
| 63 | /* |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 64 | * This check was put in to avoid "unpleasant" consequences if |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 65 | * the bootrom has not fully initialized all PCI devices. |
| 66 | * Sometimes the cache line size register is not set |
| 67 | */ |
| 68 | |
| 69 | if (*csz == 0) |
| 70 | *csz = L1_CACHE_BYTES >> 2; /* Use the default size */ |
| 71 | } |
| 72 | |
Felix Fietkau | 4aa5d78 | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 73 | /* |
| 74 | * Read from eeprom |
| 75 | */ |
Wojciech Dubowik | fda9b7a | 2011-01-11 09:00:31 +0100 | [diff] [blame] | 76 | static bool |
| 77 | ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data) |
Felix Fietkau | 4aa5d78 | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 78 | { |
| 79 | struct ath5k_hw *ah = (struct ath5k_hw *) common->ah; |
| 80 | u32 status, timeout; |
| 81 | |
| 82 | /* |
| 83 | * Initialize EEPROM access |
| 84 | */ |
| 85 | if (ah->ah_version == AR5K_AR5210) { |
| 86 | AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_EEAE); |
| 87 | (void)ath5k_hw_reg_read(ah, AR5K_EEPROM_BASE + (4 * offset)); |
| 88 | } else { |
| 89 | ath5k_hw_reg_write(ah, offset, AR5K_EEPROM_BASE); |
| 90 | AR5K_REG_ENABLE_BITS(ah, AR5K_EEPROM_CMD, |
| 91 | AR5K_EEPROM_CMD_READ); |
| 92 | } |
| 93 | |
| 94 | for (timeout = AR5K_TUNE_REGISTER_TIMEOUT; timeout > 0; timeout--) { |
| 95 | status = ath5k_hw_reg_read(ah, AR5K_EEPROM_STATUS); |
| 96 | if (status & AR5K_EEPROM_STAT_RDDONE) { |
| 97 | if (status & AR5K_EEPROM_STAT_RDERR) |
Wojciech Dubowik | fda9b7a | 2011-01-11 09:00:31 +0100 | [diff] [blame] | 98 | return false; |
Felix Fietkau | 4aa5d78 | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 99 | *data = (u16)(ath5k_hw_reg_read(ah, AR5K_EEPROM_DATA) & |
| 100 | 0xffff); |
Wojciech Dubowik | fda9b7a | 2011-01-11 09:00:31 +0100 | [diff] [blame] | 101 | return true; |
Felix Fietkau | 4aa5d78 | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 102 | } |
Nick Kossifidis | 1846ac3 | 2011-11-25 20:40:24 +0200 | [diff] [blame] | 103 | usleep_range(15, 20); |
Felix Fietkau | 4aa5d78 | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 104 | } |
| 105 | |
Wojciech Dubowik | fda9b7a | 2011-01-11 09:00:31 +0100 | [diff] [blame] | 106 | return false; |
Felix Fietkau | 4aa5d78 | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 107 | } |
| 108 | |
Felix Fietkau | e7aecd3 | 2010-12-02 10:27:06 +0100 | [diff] [blame] | 109 | int ath5k_hw_read_srev(struct ath5k_hw *ah) |
| 110 | { |
| 111 | ah->ah_mac_srev = ath5k_hw_reg_read(ah, AR5K_SREV); |
| 112 | return 0; |
| 113 | } |
| 114 | |
Felix Fietkau | fa9bfd6 | 2011-04-13 21:56:44 +0200 | [diff] [blame] | 115 | /* |
| 116 | * Read the MAC address from eeprom or platform_data |
| 117 | */ |
| 118 | static int ath5k_pci_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac) |
| 119 | { |
| 120 | u8 mac_d[ETH_ALEN] = {}; |
| 121 | u32 total, offset; |
| 122 | u16 data; |
| 123 | int octet; |
| 124 | |
| 125 | AR5K_EEPROM_READ(0x20, data); |
| 126 | |
| 127 | for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) { |
| 128 | AR5K_EEPROM_READ(offset, data); |
| 129 | |
| 130 | total += data; |
| 131 | mac_d[octet + 1] = data & 0xff; |
| 132 | mac_d[octet] = data >> 8; |
| 133 | octet += 2; |
| 134 | } |
| 135 | |
| 136 | if (!total || total == 3 * 0xffff) |
| 137 | return -EINVAL; |
| 138 | |
| 139 | memcpy(mac, mac_d, ETH_ALEN); |
| 140 | |
| 141 | return 0; |
| 142 | } |
| 143 | |
| 144 | |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 145 | /* Common ath_bus_opts structure */ |
| 146 | static const struct ath_bus_ops ath_pci_bus_ops = { |
| 147 | .ath_bus_type = ATH_PCI, |
| 148 | .read_cachesize = ath5k_pci_read_cachesize, |
Felix Fietkau | 4aa5d78 | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 149 | .eeprom_read = ath5k_pci_eeprom_read, |
Felix Fietkau | fa9bfd6 | 2011-04-13 21:56:44 +0200 | [diff] [blame] | 150 | .eeprom_read_mac = ath5k_pci_eeprom_read_mac, |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 151 | }; |
| 152 | |
| 153 | /********************\ |
| 154 | * PCI Initialization * |
| 155 | \********************/ |
| 156 | |
| 157 | static int __devinit |
| 158 | ath5k_pci_probe(struct pci_dev *pdev, |
| 159 | const struct pci_device_id *id) |
| 160 | { |
| 161 | void __iomem *mem; |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 162 | struct ath5k_hw *ah; |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 163 | struct ieee80211_hw *hw; |
| 164 | int ret; |
| 165 | u8 csz; |
| 166 | |
| 167 | /* |
| 168 | * L0s needs to be disabled on all ath5k cards. |
| 169 | * |
| 170 | * For distributions shipping with CONFIG_PCIEASPM (this will be enabled |
| 171 | * by default in the future in 2.6.36) this will also mean both L1 and |
| 172 | * L0s will be disabled when a pre 1.1 PCIe device is detected. We do |
| 173 | * know L1 works correctly even for all ath5k pre 1.1 PCIe devices |
| 174 | * though but cannot currently undue the effect of a blacklist, for |
| 175 | * details you can read pcie_aspm_sanity_check() and see how it adjusts |
| 176 | * the device link capability. |
| 177 | * |
| 178 | * It may be possible in the future to implement some PCI API to allow |
| 179 | * drivers to override blacklists for pre 1.1 PCIe but for now it is |
| 180 | * best to accept that both L0s and L1 will be disabled completely for |
| 181 | * distributions shipping with CONFIG_PCIEASPM rather than having this |
| 182 | * issue present. Motivation for adding this new API will be to help |
| 183 | * with power consumption for some of these devices. |
| 184 | */ |
| 185 | pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S); |
| 186 | |
| 187 | ret = pci_enable_device(pdev); |
| 188 | if (ret) { |
| 189 | dev_err(&pdev->dev, "can't enable device\n"); |
| 190 | goto err; |
| 191 | } |
| 192 | |
| 193 | /* XXX 32-bit addressing only */ |
| 194 | ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
| 195 | if (ret) { |
| 196 | dev_err(&pdev->dev, "32-bit DMA not available\n"); |
| 197 | goto err_dis; |
| 198 | } |
| 199 | |
| 200 | /* |
| 201 | * Cache line size is used to size and align various |
| 202 | * structures used to communicate with the hardware. |
| 203 | */ |
| 204 | pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz); |
| 205 | if (csz == 0) { |
| 206 | /* |
| 207 | * Linux 2.4.18 (at least) writes the cache line size |
| 208 | * register as a 16-bit wide register which is wrong. |
| 209 | * We must have this setup properly for rx buffer |
| 210 | * DMA to work so force a reasonable value here if it |
| 211 | * comes up zero. |
| 212 | */ |
| 213 | csz = L1_CACHE_BYTES >> 2; |
| 214 | pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz); |
| 215 | } |
| 216 | /* |
| 217 | * The default setting of latency timer yields poor results, |
| 218 | * set it to the value used by other systems. It may be worth |
| 219 | * tweaking this setting more. |
| 220 | */ |
| 221 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8); |
| 222 | |
| 223 | /* Enable bus mastering */ |
| 224 | pci_set_master(pdev); |
| 225 | |
| 226 | /* |
| 227 | * Disable the RETRY_TIMEOUT register (0x41) to keep |
| 228 | * PCI Tx retries from interfering with C3 CPU state. |
| 229 | */ |
| 230 | pci_write_config_byte(pdev, 0x41, 0); |
| 231 | |
| 232 | ret = pci_request_region(pdev, 0, "ath5k"); |
| 233 | if (ret) { |
| 234 | dev_err(&pdev->dev, "cannot reserve PCI memory region\n"); |
| 235 | goto err_dis; |
| 236 | } |
| 237 | |
| 238 | mem = pci_iomap(pdev, 0, 0); |
| 239 | if (!mem) { |
Pavel Roskin | e4bbf2f | 2011-07-07 18:14:13 -0400 | [diff] [blame] | 240 | dev_err(&pdev->dev, "cannot remap PCI memory region\n"); |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 241 | ret = -EIO; |
| 242 | goto err_reg; |
| 243 | } |
| 244 | |
| 245 | /* |
| 246 | * Allocate hw (mac80211 main struct) |
| 247 | * and hw->priv (driver private data) |
| 248 | */ |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 249 | hw = ieee80211_alloc_hw(sizeof(*ah), &ath5k_hw_ops); |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 250 | if (hw == NULL) { |
| 251 | dev_err(&pdev->dev, "cannot allocate ieee80211_hw\n"); |
| 252 | ret = -ENOMEM; |
| 253 | goto err_map; |
| 254 | } |
| 255 | |
| 256 | dev_info(&pdev->dev, "registered as '%s'\n", wiphy_name(hw->wiphy)); |
| 257 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 258 | ah = hw->priv; |
| 259 | ah->hw = hw; |
| 260 | ah->pdev = pdev; |
| 261 | ah->dev = &pdev->dev; |
| 262 | ah->irq = pdev->irq; |
| 263 | ah->devid = id->device; |
| 264 | ah->iobase = mem; /* So we can unmap it on detach */ |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 265 | |
| 266 | /* Initialize */ |
Pavel Roskin | bb1f3ad | 2011-07-26 22:27:05 -0400 | [diff] [blame] | 267 | ret = ath5k_init_ah(ah, &ath_pci_bus_ops); |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 268 | if (ret) |
| 269 | goto err_free; |
| 270 | |
| 271 | /* Set private data */ |
| 272 | pci_set_drvdata(pdev, hw); |
| 273 | |
| 274 | return 0; |
| 275 | err_free: |
| 276 | ieee80211_free_hw(hw); |
| 277 | err_map: |
| 278 | pci_iounmap(pdev, mem); |
| 279 | err_reg: |
| 280 | pci_release_region(pdev, 0); |
| 281 | err_dis: |
| 282 | pci_disable_device(pdev); |
| 283 | err: |
| 284 | return ret; |
| 285 | } |
| 286 | |
| 287 | static void __devexit |
| 288 | ath5k_pci_remove(struct pci_dev *pdev) |
| 289 | { |
| 290 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 291 | struct ath5k_hw *ah = hw->priv; |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 292 | |
Pavel Roskin | bb1f3ad | 2011-07-26 22:27:05 -0400 | [diff] [blame] | 293 | ath5k_deinit_ah(ah); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 294 | pci_iounmap(pdev, ah->iobase); |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 295 | pci_release_region(pdev, 0); |
| 296 | pci_disable_device(pdev); |
| 297 | ieee80211_free_hw(hw); |
| 298 | } |
| 299 | |
| 300 | #ifdef CONFIG_PM_SLEEP |
| 301 | static int ath5k_pci_suspend(struct device *dev) |
| 302 | { |
Pavel Roskin | 37000b3 | 2011-06-29 15:39:43 -0400 | [diff] [blame] | 303 | struct pci_dev *pdev = to_pci_dev(dev); |
| 304 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 305 | struct ath5k_hw *ah = hw->priv; |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 306 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 307 | ath5k_led_off(ah); |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 308 | return 0; |
| 309 | } |
| 310 | |
| 311 | static int ath5k_pci_resume(struct device *dev) |
| 312 | { |
| 313 | struct pci_dev *pdev = to_pci_dev(dev); |
Pavel Roskin | 37000b3 | 2011-06-29 15:39:43 -0400 | [diff] [blame] | 314 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 315 | struct ath5k_hw *ah = hw->priv; |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 316 | |
| 317 | /* |
| 318 | * Suspend/Resume resets the PCI configuration space, so we have to |
| 319 | * re-disable the RETRY_TIMEOUT register (0x41) to keep |
| 320 | * PCI Tx retries from interfering with C3 CPU state |
| 321 | */ |
| 322 | pci_write_config_byte(pdev, 0x41, 0); |
| 323 | |
Pavel Roskin | e0d687b | 2011-07-14 20:21:55 -0400 | [diff] [blame] | 324 | ath5k_led_enable(ah); |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 325 | return 0; |
| 326 | } |
| 327 | |
| 328 | static SIMPLE_DEV_PM_OPS(ath5k_pm_ops, ath5k_pci_suspend, ath5k_pci_resume); |
| 329 | #define ATH5K_PM_OPS (&ath5k_pm_ops) |
| 330 | #else |
| 331 | #define ATH5K_PM_OPS NULL |
| 332 | #endif /* CONFIG_PM_SLEEP */ |
| 333 | |
| 334 | static struct pci_driver ath5k_pci_driver = { |
| 335 | .name = KBUILD_MODNAME, |
| 336 | .id_table = ath5k_pci_id_table, |
| 337 | .probe = ath5k_pci_probe, |
| 338 | .remove = __devexit_p(ath5k_pci_remove), |
| 339 | .driver.pm = ATH5K_PM_OPS, |
| 340 | }; |
| 341 | |
| 342 | /* |
| 343 | * Module init/exit functions |
| 344 | */ |
| 345 | static int __init |
| 346 | init_ath5k_pci(void) |
| 347 | { |
| 348 | int ret; |
| 349 | |
| 350 | ret = pci_register_driver(&ath5k_pci_driver); |
| 351 | if (ret) { |
Joe Perches | 516304b | 2012-03-18 17:30:52 -0700 | [diff] [blame^] | 352 | pr_err("pci: can't register pci driver\n"); |
Felix Fietkau | e5b046d | 2010-12-02 10:27:01 +0100 | [diff] [blame] | 353 | return ret; |
| 354 | } |
| 355 | |
| 356 | return 0; |
| 357 | } |
| 358 | |
| 359 | static void __exit |
| 360 | exit_ath5k_pci(void) |
| 361 | { |
| 362 | pci_unregister_driver(&ath5k_pci_driver); |
| 363 | } |
| 364 | |
| 365 | module_init(init_ath5k_pci); |
| 366 | module_exit(exit_ath5k_pci); |