Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1 | /* |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 2 | * Support functions for OMAP GPIO |
| 3 | * |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 4 | * Copyright (C) 2003-2005 Nokia Corporation |
Jan Engelhardt | 96de0e2 | 2007-10-19 23:21:04 +0200 | [diff] [blame] | 5 | * Written by Juha Yrjölä <juha.yrjola@nokia.com> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 6 | * |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 7 | * Copyright (C) 2009 Texas Instruments |
| 8 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 9 | * |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 15 | #include <linux/init.h> |
| 16 | #include <linux/module.h> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 17 | #include <linux/interrupt.h> |
Rafael J. Wysocki | 3c437ff | 2011-04-22 22:02:46 +0200 | [diff] [blame] | 18 | #include <linux/syscore_ops.h> |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 19 | #include <linux/err.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 20 | #include <linux/clk.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 21 | #include <linux/io.h> |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 22 | #include <linux/device.h> |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 23 | #include <linux/pm_runtime.h> |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 24 | #include <linux/pm.h> |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 25 | #include <linux/of.h> |
| 26 | #include <linux/of_device.h> |
Tony Lindgren | 4b25408 | 2012-08-30 15:37:24 -0700 | [diff] [blame] | 27 | #include <linux/gpio.h> |
Yegor Yefremov | 9370084 | 2014-04-24 08:57:39 +0200 | [diff] [blame] | 28 | #include <linux/bitops.h> |
Tony Lindgren | 4b25408 | 2012-08-30 15:37:24 -0700 | [diff] [blame] | 29 | #include <linux/platform_data/gpio-omap.h> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 30 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 31 | #define OFF_MODE 1 |
Grygorii Strashko | e85ec6c | 2015-08-18 14:10:54 +0300 | [diff] [blame] | 32 | #define OMAP4_GPIO_DEBOUNCINGTIME_MASK 0xFF |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 33 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 34 | static LIST_HEAD(omap_gpio_list); |
| 35 | |
Charulatha V | 6d62e21 | 2011-04-18 15:06:51 +0000 | [diff] [blame] | 36 | struct gpio_regs { |
| 37 | u32 irqenable1; |
| 38 | u32 irqenable2; |
| 39 | u32 wake_en; |
| 40 | u32 ctrl; |
| 41 | u32 oe; |
| 42 | u32 leveldetect0; |
| 43 | u32 leveldetect1; |
| 44 | u32 risingdetect; |
| 45 | u32 fallingdetect; |
| 46 | u32 dataout; |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 47 | u32 debounce; |
| 48 | u32 debounce_en; |
Charulatha V | 6d62e21 | 2011-04-18 15:06:51 +0000 | [diff] [blame] | 49 | }; |
| 50 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 51 | struct gpio_bank { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 52 | struct list_head node; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 53 | void __iomem *base; |
Grygorii Strashko | 30cefea | 2015-09-25 12:06:02 -0700 | [diff] [blame] | 54 | int irq; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 55 | u32 non_wakeup_gpios; |
| 56 | u32 enabled_non_wakeup_gpios; |
Charulatha V | 6d62e21 | 2011-04-18 15:06:51 +0000 | [diff] [blame] | 57 | struct gpio_regs context; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 58 | u32 saved_datain; |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 59 | u32 level_mask; |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 60 | u32 toggle_mask; |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 61 | raw_spinlock_t lock; |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 62 | raw_spinlock_t wa_lock; |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 63 | struct gpio_chip chip; |
Jouni Hogander | 89db948 | 2008-12-10 17:35:24 -0800 | [diff] [blame] | 64 | struct clk *dbck; |
Charulatha V | 058af1e | 2009-11-22 10:11:25 -0800 | [diff] [blame] | 65 | u32 mod_usage; |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 66 | u32 irq_usage; |
Kevin Hilman | 8865b9b | 2009-01-27 11:15:34 -0800 | [diff] [blame] | 67 | u32 dbck_enable_mask; |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 68 | bool dbck_enabled; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 69 | struct device *dev; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 70 | bool is_mpuio; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 71 | bool dbck_flag; |
Charulatha V | 0cde8d0 | 2011-05-05 20:15:16 +0530 | [diff] [blame] | 72 | bool loses_context; |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 73 | bool context_valid; |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 74 | int stride; |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 75 | u32 width; |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 76 | int context_loss_count; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 77 | int power_mode; |
| 78 | bool workaround_enabled; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 79 | |
Grygorii Strashko | 04ebcbd | 2015-03-23 14:18:24 +0200 | [diff] [blame] | 80 | void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 81 | int (*get_context_loss_count)(struct device *dev); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 82 | |
| 83 | struct omap_gpio_reg_offs *regs; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 84 | }; |
| 85 | |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 86 | #define GPIO_MOD_CTRL_BIT BIT(0) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 87 | |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 88 | #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 89 | #define LINE_USED(line, offset) (line & (BIT(offset))) |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 90 | |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 91 | static void omap_gpio_unmask_irq(struct irq_data *d); |
| 92 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 93 | static inline struct gpio_bank *omap_irq_data_get_bank(struct irq_data *d) |
Jon Hunter | ede4d7a | 2013-03-01 11:22:47 -0600 | [diff] [blame] | 94 | { |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 95 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); |
| 96 | return container_of(chip, struct gpio_bank, chip); |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 97 | } |
| 98 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 99 | static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, |
| 100 | int is_input) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 101 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 102 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 103 | u32 l; |
| 104 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 105 | reg += bank->regs->direction; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 106 | l = readl_relaxed(reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 107 | if (is_input) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 108 | l |= BIT(gpio); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 109 | else |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 110 | l &= ~(BIT(gpio)); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 111 | writel_relaxed(l, reg); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 112 | bank->context.oe = l; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 113 | } |
| 114 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 115 | |
| 116 | /* set data out value using dedicate set/clear register */ |
Grygorii Strashko | 04ebcbd | 2015-03-23 14:18:24 +0200 | [diff] [blame] | 117 | static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 118 | int enable) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 119 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 120 | void __iomem *reg = bank->base; |
Grygorii Strashko | 04ebcbd | 2015-03-23 14:18:24 +0200 | [diff] [blame] | 121 | u32 l = BIT(offset); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 122 | |
Tarun Kanti DebBarma | 2c836f7 | 2012-03-02 12:52:52 +0530 | [diff] [blame] | 123 | if (enable) { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 124 | reg += bank->regs->set_dataout; |
Tarun Kanti DebBarma | 2c836f7 | 2012-03-02 12:52:52 +0530 | [diff] [blame] | 125 | bank->context.dataout |= l; |
| 126 | } else { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 127 | reg += bank->regs->clr_dataout; |
Tarun Kanti DebBarma | 2c836f7 | 2012-03-02 12:52:52 +0530 | [diff] [blame] | 128 | bank->context.dataout &= ~l; |
| 129 | } |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 130 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 131 | writel_relaxed(l, reg); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 132 | } |
| 133 | |
| 134 | /* set data out value using mask register */ |
Grygorii Strashko | 04ebcbd | 2015-03-23 14:18:24 +0200 | [diff] [blame] | 135 | static void omap_set_gpio_dataout_mask(struct gpio_bank *bank, unsigned offset, |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 136 | int enable) |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 137 | { |
| 138 | void __iomem *reg = bank->base + bank->regs->dataout; |
Grygorii Strashko | 04ebcbd | 2015-03-23 14:18:24 +0200 | [diff] [blame] | 139 | u32 gpio_bit = BIT(offset); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 140 | u32 l; |
| 141 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 142 | l = readl_relaxed(reg); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 143 | if (enable) |
| 144 | l |= gpio_bit; |
| 145 | else |
| 146 | l &= ~gpio_bit; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 147 | writel_relaxed(l, reg); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 148 | bank->context.dataout = l; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 149 | } |
| 150 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 151 | static int omap_get_gpio_datain(struct gpio_bank *bank, int offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 152 | { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 153 | void __iomem *reg = bank->base + bank->regs->datain; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 154 | |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 155 | return (readl_relaxed(reg) & (BIT(offset))) != 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 156 | } |
| 157 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 158 | static int omap_get_gpio_dataout(struct gpio_bank *bank, int offset) |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 159 | { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 160 | void __iomem *reg = bank->base + bank->regs->dataout; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 161 | |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 162 | return (readl_relaxed(reg) & (BIT(offset))) != 0; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 163 | } |
| 164 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 165 | static inline void omap_gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) |
Kevin Hilman | ece9528 | 2011-07-12 08:18:15 -0700 | [diff] [blame] | 166 | { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 167 | int l = readl_relaxed(base + reg); |
Kevin Hilman | ece9528 | 2011-07-12 08:18:15 -0700 | [diff] [blame] | 168 | |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 169 | if (set) |
Kevin Hilman | ece9528 | 2011-07-12 08:18:15 -0700 | [diff] [blame] | 170 | l |= mask; |
| 171 | else |
| 172 | l &= ~mask; |
| 173 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 174 | writel_relaxed(l, base + reg); |
Kevin Hilman | ece9528 | 2011-07-12 08:18:15 -0700 | [diff] [blame] | 175 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 176 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 177 | static inline void omap_gpio_dbck_enable(struct gpio_bank *bank) |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 178 | { |
| 179 | if (bank->dbck_enable_mask && !bank->dbck_enabled) { |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 180 | clk_enable(bank->dbck); |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 181 | bank->dbck_enabled = true; |
Grazvydas Ignotas | 9e303f2 | 2012-06-16 22:01:25 +0300 | [diff] [blame] | 182 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 183 | writel_relaxed(bank->dbck_enable_mask, |
Grazvydas Ignotas | 9e303f2 | 2012-06-16 22:01:25 +0300 | [diff] [blame] | 184 | bank->base + bank->regs->debounce_en); |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 185 | } |
| 186 | } |
| 187 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 188 | static inline void omap_gpio_dbck_disable(struct gpio_bank *bank) |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 189 | { |
| 190 | if (bank->dbck_enable_mask && bank->dbck_enabled) { |
Grazvydas Ignotas | 9e303f2 | 2012-06-16 22:01:25 +0300 | [diff] [blame] | 191 | /* |
| 192 | * Disable debounce before cutting it's clock. If debounce is |
| 193 | * enabled but the clock is not, GPIO module seems to be unable |
| 194 | * to detect events and generate interrupts at least on OMAP3. |
| 195 | */ |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 196 | writel_relaxed(0, bank->base + bank->regs->debounce_en); |
Grazvydas Ignotas | 9e303f2 | 2012-06-16 22:01:25 +0300 | [diff] [blame] | 197 | |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 198 | clk_disable(bank->dbck); |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 199 | bank->dbck_enabled = false; |
| 200 | } |
| 201 | } |
| 202 | |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 203 | /** |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 204 | * omap2_set_gpio_debounce - low level gpio debounce time |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 205 | * @bank: the gpio bank we're acting upon |
Grygorii Strashko | 4a58d22 | 2015-03-23 14:18:25 +0200 | [diff] [blame] | 206 | * @offset: the gpio number on this @bank |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 207 | * @debounce: debounce time to use |
| 208 | * |
Grygorii Strashko | e85ec6c | 2015-08-18 14:10:54 +0300 | [diff] [blame] | 209 | * OMAP's debounce time is in 31us steps |
| 210 | * <debounce time> = (GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME + 1) x 31 |
| 211 | * so we need to convert and round up to the closest unit. |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 212 | */ |
Grygorii Strashko | 4a58d22 | 2015-03-23 14:18:25 +0200 | [diff] [blame] | 213 | static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 214 | unsigned debounce) |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 215 | { |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 216 | void __iomem *reg; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 217 | u32 val; |
| 218 | u32 l; |
Grygorii Strashko | e85ec6c | 2015-08-18 14:10:54 +0300 | [diff] [blame] | 219 | bool enable = !!debounce; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 220 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 221 | if (!bank->dbck_flag) |
| 222 | return; |
| 223 | |
Grygorii Strashko | e85ec6c | 2015-08-18 14:10:54 +0300 | [diff] [blame] | 224 | if (enable) { |
| 225 | debounce = DIV_ROUND_UP(debounce, 31) - 1; |
| 226 | debounce &= OMAP4_GPIO_DEBOUNCINGTIME_MASK; |
| 227 | } |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 228 | |
Grygorii Strashko | 4a58d22 | 2015-03-23 14:18:25 +0200 | [diff] [blame] | 229 | l = BIT(offset); |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 230 | |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 231 | clk_enable(bank->dbck); |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 232 | reg = bank->base + bank->regs->debounce; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 233 | writel_relaxed(debounce, reg); |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 234 | |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 235 | reg = bank->base + bank->regs->debounce_en; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 236 | val = readl_relaxed(reg); |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 237 | |
Grygorii Strashko | e85ec6c | 2015-08-18 14:10:54 +0300 | [diff] [blame] | 238 | if (enable) |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 239 | val |= l; |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame] | 240 | else |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 241 | val &= ~l; |
Kevin Hilman | f7ec0b0 | 2010-06-09 13:53:07 +0300 | [diff] [blame] | 242 | bank->dbck_enable_mask = val; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 243 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 244 | writel_relaxed(val, reg); |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 245 | clk_disable(bank->dbck); |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame] | 246 | /* |
| 247 | * Enable debounce clock per module. |
| 248 | * This call is mandatory because in omap_gpio_request() when |
| 249 | * *_runtime_get_sync() is called, _gpio_dbck_enable() within |
| 250 | * runtime callbck fails to turn on dbck because dbck_enable_mask |
| 251 | * used within _gpio_dbck_enable() is still not initialized at |
| 252 | * that point. Therefore we have to enable dbck here. |
| 253 | */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 254 | omap_gpio_dbck_enable(bank); |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 255 | if (bank->dbck_enable_mask) { |
| 256 | bank->context.debounce = debounce; |
| 257 | bank->context.debounce_en = val; |
| 258 | } |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 259 | } |
| 260 | |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 261 | /** |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 262 | * omap_clear_gpio_debounce - clear debounce settings for a gpio |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 263 | * @bank: the gpio bank we're acting upon |
Grygorii Strashko | 4a58d22 | 2015-03-23 14:18:25 +0200 | [diff] [blame] | 264 | * @offset: the gpio number on this @bank |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 265 | * |
| 266 | * If a gpio is using debounce, then clear the debounce enable bit and if |
| 267 | * this is the only gpio in this bank using debounce, then clear the debounce |
| 268 | * time too. The debounce clock will also be disabled when calling this function |
| 269 | * if this is the only gpio in the bank using debounce. |
| 270 | */ |
Grygorii Strashko | 4a58d22 | 2015-03-23 14:18:25 +0200 | [diff] [blame] | 271 | static void omap_clear_gpio_debounce(struct gpio_bank *bank, unsigned offset) |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 272 | { |
Grygorii Strashko | 4a58d22 | 2015-03-23 14:18:25 +0200 | [diff] [blame] | 273 | u32 gpio_bit = BIT(offset); |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 274 | |
| 275 | if (!bank->dbck_flag) |
| 276 | return; |
| 277 | |
| 278 | if (!(bank->dbck_enable_mask & gpio_bit)) |
| 279 | return; |
| 280 | |
| 281 | bank->dbck_enable_mask &= ~gpio_bit; |
| 282 | bank->context.debounce_en &= ~gpio_bit; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 283 | writel_relaxed(bank->context.debounce_en, |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 284 | bank->base + bank->regs->debounce_en); |
| 285 | |
| 286 | if (!bank->dbck_enable_mask) { |
| 287 | bank->context.debounce = 0; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 288 | writel_relaxed(bank->context.debounce, bank->base + |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 289 | bank->regs->debounce); |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 290 | clk_disable(bank->dbck); |
Jon Hunter | c9c55d9 | 2012-10-26 14:26:04 -0500 | [diff] [blame] | 291 | bank->dbck_enabled = false; |
| 292 | } |
| 293 | } |
| 294 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 295 | static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, |
Tarun Kanti DebBarma | 00ece7e | 2011-11-25 15:41:06 +0530 | [diff] [blame] | 296 | unsigned trigger) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 297 | { |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 298 | void __iomem *base = bank->base; |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 299 | u32 gpio_bit = BIT(gpio); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 300 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 301 | omap_gpio_rmw(base, bank->regs->leveldetect0, gpio_bit, |
| 302 | trigger & IRQ_TYPE_LEVEL_LOW); |
| 303 | omap_gpio_rmw(base, bank->regs->leveldetect1, gpio_bit, |
| 304 | trigger & IRQ_TYPE_LEVEL_HIGH); |
| 305 | omap_gpio_rmw(base, bank->regs->risingdetect, gpio_bit, |
| 306 | trigger & IRQ_TYPE_EDGE_RISING); |
| 307 | omap_gpio_rmw(base, bank->regs->fallingdetect, gpio_bit, |
| 308 | trigger & IRQ_TYPE_EDGE_FALLING); |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 309 | |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 310 | bank->context.leveldetect0 = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 311 | readl_relaxed(bank->base + bank->regs->leveldetect0); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 312 | bank->context.leveldetect1 = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 313 | readl_relaxed(bank->base + bank->regs->leveldetect1); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 314 | bank->context.risingdetect = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 315 | readl_relaxed(bank->base + bank->regs->risingdetect); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 316 | bank->context.fallingdetect = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 317 | readl_relaxed(bank->base + bank->regs->fallingdetect); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 318 | |
| 319 | if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 320 | omap_gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 321 | bank->context.wake_en = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 322 | readl_relaxed(bank->base + bank->regs->wkup_en); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 323 | } |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 324 | |
Ambresh K | 55b220c | 2011-06-15 13:40:45 -0700 | [diff] [blame] | 325 | /* This part needs to be executed always for OMAP{34xx, 44xx} */ |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 326 | if (!bank->regs->irqctrl) { |
| 327 | /* On omap24xx proceed only when valid GPIO bit is set */ |
| 328 | if (bank->non_wakeup_gpios) { |
| 329 | if (!(bank->non_wakeup_gpios & gpio_bit)) |
| 330 | goto exit; |
| 331 | } |
| 332 | |
Chunqiu Wang | 699117a6 | 2009-06-24 17:13:39 +0000 | [diff] [blame] | 333 | /* |
| 334 | * Log the edge gpio and manually trigger the IRQ |
| 335 | * after resume if the input level changes |
| 336 | * to avoid irq lost during PER RET/OFF mode |
| 337 | * Applies for omap2 non-wakeup gpio and all omap3 gpios |
| 338 | */ |
| 339 | if (trigger & IRQ_TYPE_EDGE_BOTH) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 340 | bank->enabled_non_wakeup_gpios |= gpio_bit; |
| 341 | else |
| 342 | bank->enabled_non_wakeup_gpios &= ~gpio_bit; |
| 343 | } |
Kevin Hilman | 5eb3bb9 | 2007-05-05 11:40:29 -0700 | [diff] [blame] | 344 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 345 | exit: |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 346 | bank->level_mask = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 347 | readl_relaxed(bank->base + bank->regs->leveldetect0) | |
| 348 | readl_relaxed(bank->base + bank->regs->leveldetect1); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 349 | } |
| 350 | |
Uwe Kleine-König | 9198bcd | 2010-01-29 14:20:05 -0800 | [diff] [blame] | 351 | #ifdef CONFIG_ARCH_OMAP1 |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 352 | /* |
| 353 | * This only applies to chips that can't do both rising and falling edge |
| 354 | * detection at once. For all other chips, this function is a noop. |
| 355 | */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 356 | static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 357 | { |
| 358 | void __iomem *reg = bank->base; |
| 359 | u32 l = 0; |
| 360 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 361 | if (!bank->regs->irqctrl) |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 362 | return; |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 363 | |
| 364 | reg += bank->regs->irqctrl; |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 365 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 366 | l = readl_relaxed(reg); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 367 | if ((l >> gpio) & 1) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 368 | l &= ~(BIT(gpio)); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 369 | else |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 370 | l |= BIT(gpio); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 371 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 372 | writel_relaxed(l, reg); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 373 | } |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 374 | #else |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 375 | static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {} |
Uwe Kleine-König | 9198bcd | 2010-01-29 14:20:05 -0800 | [diff] [blame] | 376 | #endif |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 377 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 378 | static int omap_set_gpio_triggering(struct gpio_bank *bank, int gpio, |
| 379 | unsigned trigger) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 380 | { |
| 381 | void __iomem *reg = bank->base; |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 382 | void __iomem *base = bank->base; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 383 | u32 l = 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 384 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 385 | if (bank->regs->leveldetect0 && bank->regs->wkup_en) { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 386 | omap_set_gpio_trigger(bank, gpio, trigger); |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 387 | } else if (bank->regs->irqctrl) { |
| 388 | reg += bank->regs->irqctrl; |
| 389 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 390 | l = readl_relaxed(reg); |
Janusz Krzysztofik | 2950157 | 2010-04-05 11:38:06 +0000 | [diff] [blame] | 391 | if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 392 | bank->toggle_mask |= BIT(gpio); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 393 | if (trigger & IRQ_TYPE_EDGE_RISING) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 394 | l |= BIT(gpio); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 395 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 396 | l &= ~(BIT(gpio)); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 397 | else |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 398 | return -EINVAL; |
| 399 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 400 | writel_relaxed(l, reg); |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 401 | } else if (bank->regs->edgectrl1) { |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 402 | if (gpio & 0x08) |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 403 | reg += bank->regs->edgectrl2; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 404 | else |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 405 | reg += bank->regs->edgectrl1; |
| 406 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 407 | gpio &= 0x07; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 408 | l = readl_relaxed(reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 409 | l &= ~(3 << (gpio << 1)); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 410 | if (trigger & IRQ_TYPE_EDGE_RISING) |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 411 | l |= 2 << (gpio << 1); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 412 | if (trigger & IRQ_TYPE_EDGE_FALLING) |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 413 | l |= BIT(gpio << 1); |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 414 | |
| 415 | /* Enable wake-up during idle for dynamic tick */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 416 | omap_gpio_rmw(base, bank->regs->wkup_en, BIT(gpio), trigger); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 417 | bank->context.wake_en = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 418 | readl_relaxed(bank->base + bank->regs->wkup_en); |
| 419 | writel_relaxed(l, reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 420 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 421 | return 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 422 | } |
| 423 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 424 | static void omap_enable_gpio_module(struct gpio_bank *bank, unsigned offset) |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 425 | { |
| 426 | if (bank->regs->pinctrl) { |
| 427 | void __iomem *reg = bank->base + bank->regs->pinctrl; |
| 428 | |
| 429 | /* Claim the pin for MPU */ |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 430 | writel_relaxed(readl_relaxed(reg) | (BIT(offset)), reg); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 431 | } |
| 432 | |
| 433 | if (bank->regs->ctrl && !BANK_USED(bank)) { |
| 434 | void __iomem *reg = bank->base + bank->regs->ctrl; |
| 435 | u32 ctrl; |
| 436 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 437 | ctrl = readl_relaxed(reg); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 438 | /* Module is enabled, clocks are not gated */ |
| 439 | ctrl &= ~GPIO_MOD_CTRL_BIT; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 440 | writel_relaxed(ctrl, reg); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 441 | bank->context.ctrl = ctrl; |
| 442 | } |
| 443 | } |
| 444 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 445 | static void omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset) |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 446 | { |
| 447 | void __iomem *base = bank->base; |
| 448 | |
| 449 | if (bank->regs->wkup_en && |
| 450 | !LINE_USED(bank->mod_usage, offset) && |
| 451 | !LINE_USED(bank->irq_usage, offset)) { |
| 452 | /* Disable wake-up during idle for dynamic tick */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 453 | omap_gpio_rmw(base, bank->regs->wkup_en, BIT(offset), 0); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 454 | bank->context.wake_en = |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 455 | readl_relaxed(bank->base + bank->regs->wkup_en); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 456 | } |
| 457 | |
| 458 | if (bank->regs->ctrl && !BANK_USED(bank)) { |
| 459 | void __iomem *reg = bank->base + bank->regs->ctrl; |
| 460 | u32 ctrl; |
| 461 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 462 | ctrl = readl_relaxed(reg); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 463 | /* Module is disabled, clocks are gated */ |
| 464 | ctrl |= GPIO_MOD_CTRL_BIT; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 465 | writel_relaxed(ctrl, reg); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 466 | bank->context.ctrl = ctrl; |
| 467 | } |
| 468 | } |
| 469 | |
Grygorii Strashko | b2b2004 | 2015-03-23 14:18:23 +0200 | [diff] [blame] | 470 | static int omap_gpio_is_input(struct gpio_bank *bank, unsigned offset) |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 471 | { |
| 472 | void __iomem *reg = bank->base + bank->regs->direction; |
| 473 | |
Grygorii Strashko | b2b2004 | 2015-03-23 14:18:23 +0200 | [diff] [blame] | 474 | return readl_relaxed(reg) & BIT(offset); |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 475 | } |
| 476 | |
Grygorii Strashko | 37e14ec | 2015-03-23 14:18:26 +0200 | [diff] [blame] | 477 | static void omap_gpio_init_irq(struct gpio_bank *bank, unsigned offset) |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 478 | { |
| 479 | if (!LINE_USED(bank->mod_usage, offset)) { |
| 480 | omap_enable_gpio_module(bank, offset); |
| 481 | omap_set_gpio_direction(bank, offset, 1); |
| 482 | } |
Grygorii Strashko | 37e14ec | 2015-03-23 14:18:26 +0200 | [diff] [blame] | 483 | bank->irq_usage |= BIT(offset); |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 484 | } |
| 485 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 486 | static int omap_gpio_irq_type(struct irq_data *d, unsigned type) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 487 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 488 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 489 | int retval; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 490 | unsigned long flags; |
Grygorii Strashko | ea5fbe8 | 2015-03-23 14:18:29 +0200 | [diff] [blame] | 491 | unsigned offset = d->hwirq; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 492 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 493 | if (type & ~IRQ_TYPE_SENSE_MASK) |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 494 | return -EINVAL; |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 495 | |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 496 | if (!bank->regs->leveldetect0 && |
| 497 | (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 498 | return -EINVAL; |
| 499 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 500 | raw_spin_lock_irqsave(&bank->lock, flags); |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 501 | retval = omap_set_gpio_triggering(bank, offset, type); |
Grygorii Strashko | 977bd8a | 2015-06-24 17:54:17 +0300 | [diff] [blame] | 502 | if (retval) { |
Axel Lin | 627c89b | 2015-08-05 22:37:41 +0800 | [diff] [blame] | 503 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Grygorii Strashko | 1562e46 | 2015-05-22 17:35:49 +0300 | [diff] [blame] | 504 | goto error; |
Grygorii Strashko | 977bd8a | 2015-06-24 17:54:17 +0300 | [diff] [blame] | 505 | } |
Grygorii Strashko | 37e14ec | 2015-03-23 14:18:26 +0200 | [diff] [blame] | 506 | omap_gpio_init_irq(bank, offset); |
Grygorii Strashko | b2b2004 | 2015-03-23 14:18:23 +0200 | [diff] [blame] | 507 | if (!omap_gpio_is_input(bank, offset)) { |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 508 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Grygorii Strashko | 1562e46 | 2015-05-22 17:35:49 +0300 | [diff] [blame] | 509 | retval = -EINVAL; |
| 510 | goto error; |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 511 | } |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 512 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 513 | |
| 514 | if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
Thomas Gleixner | 43ec2e4 | 2015-06-23 15:52:39 +0200 | [diff] [blame] | 515 | irq_set_handler_locked(d, handle_level_irq); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 516 | else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
Thomas Gleixner | 43ec2e4 | 2015-06-23 15:52:39 +0200 | [diff] [blame] | 517 | irq_set_handler_locked(d, handle_edge_irq); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 518 | |
Grygorii Strashko | 1562e46 | 2015-05-22 17:35:49 +0300 | [diff] [blame] | 519 | return 0; |
| 520 | |
| 521 | error: |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 522 | return retval; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 523 | } |
| 524 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 525 | static void omap_clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 526 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 527 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 528 | |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 529 | reg += bank->regs->irqstatus; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 530 | writel_relaxed(gpio_mask, reg); |
Hiroshi DOYU | bee7930 | 2006-09-25 12:41:46 +0300 | [diff] [blame] | 531 | |
| 532 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 533 | if (bank->regs->irqstatus2) { |
| 534 | reg = bank->base + bank->regs->irqstatus2; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 535 | writel_relaxed(gpio_mask, reg); |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 536 | } |
Roger Quadros | bedfd15 | 2009-04-23 11:10:50 -0700 | [diff] [blame] | 537 | |
| 538 | /* Flush posted write for the irq status to avoid spurious interrupts */ |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 539 | readl_relaxed(reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 540 | } |
| 541 | |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 542 | static inline void omap_clear_gpio_irqstatus(struct gpio_bank *bank, |
| 543 | unsigned offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 544 | { |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 545 | omap_clear_gpio_irqbank(bank, BIT(offset)); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 546 | } |
| 547 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 548 | static u32 omap_get_gpio_irqbank_mask(struct gpio_bank *bank) |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 549 | { |
| 550 | void __iomem *reg = bank->base; |
Imre Deak | 99c4770 | 2006-06-26 16:16:07 -0700 | [diff] [blame] | 551 | u32 l; |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 552 | u32 mask = (BIT(bank->width)) - 1; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 553 | |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 554 | reg += bank->regs->irqenable; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 555 | l = readl_relaxed(reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 556 | if (bank->regs->irqenable_inv) |
Imre Deak | 99c4770 | 2006-06-26 16:16:07 -0700 | [diff] [blame] | 557 | l = ~l; |
| 558 | l &= mask; |
| 559 | return l; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 560 | } |
| 561 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 562 | static void omap_enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 563 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 564 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 565 | u32 l; |
| 566 | |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 567 | if (bank->regs->set_irqenable) { |
| 568 | reg += bank->regs->set_irqenable; |
| 569 | l = gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 570 | bank->context.irqenable1 |= gpio_mask; |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 571 | } else { |
| 572 | reg += bank->regs->irqenable; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 573 | l = readl_relaxed(reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 574 | if (bank->regs->irqenable_inv) |
| 575 | l &= ~gpio_mask; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 576 | else |
| 577 | l |= gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 578 | bank->context.irqenable1 = l; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 579 | } |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 580 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 581 | writel_relaxed(l, reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 582 | } |
| 583 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 584 | static void omap_disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 585 | { |
| 586 | void __iomem *reg = bank->base; |
| 587 | u32 l; |
| 588 | |
| 589 | if (bank->regs->clr_irqenable) { |
| 590 | reg += bank->regs->clr_irqenable; |
| 591 | l = gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 592 | bank->context.irqenable1 &= ~gpio_mask; |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 593 | } else { |
| 594 | reg += bank->regs->irqenable; |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 595 | l = readl_relaxed(reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 596 | if (bank->regs->irqenable_inv) |
| 597 | l |= gpio_mask; |
| 598 | else |
| 599 | l &= ~gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 600 | bank->context.irqenable1 = l; |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 601 | } |
| 602 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 603 | writel_relaxed(l, reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 604 | } |
| 605 | |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 606 | static inline void omap_set_gpio_irqenable(struct gpio_bank *bank, |
| 607 | unsigned offset, int enable) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 608 | { |
Tarun Kanti DebBarma | 8276536c | 2011-11-25 15:27:37 +0530 | [diff] [blame] | 609 | if (enable) |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 610 | omap_enable_gpio_irqbank(bank, BIT(offset)); |
Tarun Kanti DebBarma | 8276536c | 2011-11-25 15:27:37 +0530 | [diff] [blame] | 611 | else |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 612 | omap_disable_gpio_irqbank(bank, BIT(offset)); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 613 | } |
| 614 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 615 | /* |
| 616 | * Note that ENAWAKEUP needs to be enabled in GPIO_SYSCONFIG register. |
| 617 | * 1510 does not seem to have a wake-up register. If JTAG is connected |
| 618 | * to the target, system will wake up always on GPIO events. While |
| 619 | * system is running all registered GPIO interrupts need to have wake-up |
| 620 | * enabled. When system is suspended, only selected GPIO interrupts need |
| 621 | * to have wake-up enabled. |
| 622 | */ |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 623 | static int omap_set_gpio_wakeup(struct gpio_bank *bank, unsigned offset, |
| 624 | int enable) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 625 | { |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 626 | u32 gpio_bit = BIT(offset); |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 627 | unsigned long flags; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 628 | |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 629 | if (bank->non_wakeup_gpios & gpio_bit) { |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 630 | dev_err(bank->dev, |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 631 | "Unable to modify wakeup on non-wakeup GPIO%d\n", |
| 632 | offset); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 633 | return -EINVAL; |
| 634 | } |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 635 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 636 | raw_spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 637 | if (enable) |
Tarun Kanti DebBarma | 0aa2727 | 2012-04-27 19:43:33 +0530 | [diff] [blame] | 638 | bank->context.wake_en |= gpio_bit; |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 639 | else |
Tarun Kanti DebBarma | 0aa2727 | 2012-04-27 19:43:33 +0530 | [diff] [blame] | 640 | bank->context.wake_en &= ~gpio_bit; |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 641 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 642 | writel_relaxed(bank->context.wake_en, bank->base + bank->regs->wkup_en); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 643 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 644 | |
| 645 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 646 | } |
| 647 | |
| 648 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 649 | static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 650 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 651 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 652 | unsigned offset = d->hwirq; |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 653 | int ret; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 654 | |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 655 | ret = omap_set_gpio_wakeup(bank, offset, enable); |
| 656 | if (!ret) |
| 657 | ret = irq_set_irq_wake(bank->irq, enable); |
| 658 | |
| 659 | return ret; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 660 | } |
| 661 | |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 662 | static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 663 | { |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 664 | struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 665 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 666 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 667 | /* |
| 668 | * If this is the first gpio_request for the bank, |
| 669 | * enable the bank module. |
| 670 | */ |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 671 | if (!BANK_USED(bank)) |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 672 | pm_runtime_get_sync(bank->dev); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 673 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 674 | raw_spin_lock_irqsave(&bank->lock, flags); |
Grygorii Strashko | c351817 | 2015-05-22 17:35:51 +0300 | [diff] [blame] | 675 | omap_enable_gpio_module(bank, offset); |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 676 | bank->mod_usage |= BIT(offset); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 677 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 678 | |
| 679 | return 0; |
| 680 | } |
| 681 | |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 682 | static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 683 | { |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 684 | struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 685 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 686 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 687 | raw_spin_lock_irqsave(&bank->lock, flags); |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 688 | bank->mod_usage &= ~(BIT(offset)); |
Grygorii Strashko | 5f982c7 | 2015-05-22 17:35:48 +0300 | [diff] [blame] | 689 | if (!LINE_USED(bank->irq_usage, offset)) { |
| 690 | omap_set_gpio_direction(bank, offset, 1); |
| 691 | omap_clear_gpio_debounce(bank, offset); |
| 692 | } |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 693 | omap_disable_gpio_module(bank, offset); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 694 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 695 | |
| 696 | /* |
| 697 | * If this is the last gpio to be freed in the bank, |
| 698 | * disable the bank module. |
| 699 | */ |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 700 | if (!BANK_USED(bank)) |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 701 | pm_runtime_put(bank->dev); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 702 | } |
| 703 | |
| 704 | /* |
| 705 | * We need to unmask the GPIO bank interrupt as soon as possible to |
| 706 | * avoid missing GPIO interrupts for other lines in the bank. |
| 707 | * Then we need to mask-read-clear-unmask the triggered GPIO lines |
| 708 | * in the bank to avoid missing nested interrupts for a GPIO line. |
| 709 | * If we wait to unmask individual GPIO lines in the bank after the |
| 710 | * line's interrupt handler has been run, we may miss some nested |
| 711 | * interrupts. |
| 712 | */ |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 713 | static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 714 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 715 | void __iomem *isr_reg = NULL; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 716 | u32 isr; |
Jon Hunter | 3513cde | 2013-04-04 15:16:14 -0500 | [diff] [blame] | 717 | unsigned int bit; |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 718 | struct gpio_bank *bank = gpiobank; |
| 719 | unsigned long wa_lock_flags; |
Grygorii Strashko | 235f1eb | 2015-08-18 14:10:55 +0300 | [diff] [blame] | 720 | unsigned long lock_flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 721 | |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 722 | isr_reg = bank->base + bank->regs->irqstatus; |
Evgeny Kuznetsov | b1cc4c5 | 2010-12-07 16:25:40 -0800 | [diff] [blame] | 723 | if (WARN_ON(!isr_reg)) |
| 724 | goto exit; |
| 725 | |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 726 | pm_runtime_get_sync(bank->dev); |
| 727 | |
Laurent Navet | e83507b | 2013-03-20 13:15:57 +0100 | [diff] [blame] | 728 | while (1) { |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 729 | u32 isr_saved, level_mask = 0; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 730 | u32 enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 731 | |
Grygorii Strashko | 235f1eb | 2015-08-18 14:10:55 +0300 | [diff] [blame] | 732 | raw_spin_lock_irqsave(&bank->lock, lock_flags); |
| 733 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 734 | enabled = omap_get_gpio_irqbank_mask(bank); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 735 | isr_saved = isr = readl_relaxed(isr_reg) & enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 736 | |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 737 | if (bank->level_mask) |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 738 | level_mask = bank->level_mask & enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 739 | |
| 740 | /* clear edge sensitive interrupts before handler(s) are |
| 741 | called so that we don't miss any interrupt occurred while |
| 742 | executing them */ |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 743 | omap_disable_gpio_irqbank(bank, isr_saved & ~level_mask); |
| 744 | omap_clear_gpio_irqbank(bank, isr_saved & ~level_mask); |
| 745 | omap_enable_gpio_irqbank(bank, isr_saved & ~level_mask); |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 746 | |
Grygorii Strashko | 235f1eb | 2015-08-18 14:10:55 +0300 | [diff] [blame] | 747 | raw_spin_unlock_irqrestore(&bank->lock, lock_flags); |
| 748 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 749 | if (!isr) |
| 750 | break; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 751 | |
Jon Hunter | 3513cde | 2013-04-04 15:16:14 -0500 | [diff] [blame] | 752 | while (isr) { |
| 753 | bit = __ffs(isr); |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 754 | isr &= ~(BIT(bit)); |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 755 | |
Grygorii Strashko | 235f1eb | 2015-08-18 14:10:55 +0300 | [diff] [blame] | 756 | raw_spin_lock_irqsave(&bank->lock, lock_flags); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 757 | /* |
| 758 | * Some chips can't respond to both rising and falling |
| 759 | * at the same time. If this irq was requested with |
| 760 | * both flags, we need to flip the ICR data for the IRQ |
| 761 | * to respond to the IRQ for the opposite direction. |
| 762 | * This will be indicated in the bank toggle_mask. |
| 763 | */ |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 764 | if (bank->toggle_mask & (BIT(bit))) |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 765 | omap_toggle_gpio_edge_triggering(bank, bit); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 766 | |
Grygorii Strashko | 235f1eb | 2015-08-18 14:10:55 +0300 | [diff] [blame] | 767 | raw_spin_unlock_irqrestore(&bank->lock, lock_flags); |
| 768 | |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 769 | raw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags); |
| 770 | |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 771 | generic_handle_irq(irq_find_mapping(bank->chip.irqdomain, |
| 772 | bit)); |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 773 | |
| 774 | raw_spin_unlock_irqrestore(&bank->wa_lock, |
| 775 | wa_lock_flags); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 776 | } |
Tony Lindgren | 1a8bfa1 | 2005-11-10 14:26:50 +0000 | [diff] [blame] | 777 | } |
Evgeny Kuznetsov | b1cc4c5 | 2010-12-07 16:25:40 -0800 | [diff] [blame] | 778 | exit: |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 779 | pm_runtime_put(bank->dev); |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 780 | return IRQ_HANDLED; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 781 | } |
| 782 | |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 783 | static unsigned int omap_gpio_irq_startup(struct irq_data *d) |
| 784 | { |
| 785 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 786 | unsigned long flags; |
Grygorii Strashko | 37e14ec | 2015-03-23 14:18:26 +0200 | [diff] [blame] | 787 | unsigned offset = d->hwirq; |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 788 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 789 | raw_spin_lock_irqsave(&bank->lock, flags); |
Grygorii Strashko | 121dcb7 | 2015-05-22 17:35:52 +0300 | [diff] [blame] | 790 | |
| 791 | if (!LINE_USED(bank->mod_usage, offset)) |
| 792 | omap_set_gpio_direction(bank, offset, 1); |
| 793 | else if (!omap_gpio_is_input(bank, offset)) |
| 794 | goto err; |
| 795 | omap_enable_gpio_module(bank, offset); |
| 796 | bank->irq_usage |= BIT(offset); |
| 797 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 798 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 799 | omap_gpio_unmask_irq(d); |
| 800 | |
| 801 | return 0; |
Grygorii Strashko | 121dcb7 | 2015-05-22 17:35:52 +0300 | [diff] [blame] | 802 | err: |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 803 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Grygorii Strashko | 121dcb7 | 2015-05-22 17:35:52 +0300 | [diff] [blame] | 804 | return -EINVAL; |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 805 | } |
| 806 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 807 | static void omap_gpio_irq_shutdown(struct irq_data *d) |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 808 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 809 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 810 | unsigned long flags; |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 811 | unsigned offset = d->hwirq; |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 812 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 813 | raw_spin_lock_irqsave(&bank->lock, flags); |
Javier Martinez Canillas | b1e9fec | 2014-04-27 02:00:49 +0200 | [diff] [blame] | 814 | bank->irq_usage &= ~(BIT(offset)); |
Grygorii Strashko | 6e96c1b | 2015-05-22 17:35:50 +0300 | [diff] [blame] | 815 | omap_set_gpio_irqenable(bank, offset, 0); |
| 816 | omap_clear_gpio_irqstatus(bank, offset); |
| 817 | omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); |
| 818 | if (!LINE_USED(bank->mod_usage, offset)) |
| 819 | omap_clear_gpio_debounce(bank, offset); |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 820 | omap_disable_gpio_module(bank, offset); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 821 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Grygorii Strashko | aca82d1 | 2015-09-25 12:28:02 -0700 | [diff] [blame] | 822 | } |
| 823 | |
| 824 | static void omap_gpio_irq_bus_lock(struct irq_data *data) |
| 825 | { |
| 826 | struct gpio_bank *bank = omap_irq_data_get_bank(data); |
| 827 | |
| 828 | if (!BANK_USED(bank)) |
| 829 | pm_runtime_get_sync(bank->dev); |
| 830 | } |
| 831 | |
| 832 | static void gpio_irq_bus_sync_unlock(struct irq_data *data) |
| 833 | { |
| 834 | struct gpio_bank *bank = omap_irq_data_get_bank(data); |
Javier Martinez Canillas | fac7fa1 | 2013-09-25 02:36:54 +0200 | [diff] [blame] | 835 | |
| 836 | /* |
| 837 | * If this is the last IRQ to be freed in the bank, |
| 838 | * disable the bank module. |
| 839 | */ |
| 840 | if (!BANK_USED(bank)) |
| 841 | pm_runtime_put(bank->dev); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 842 | } |
| 843 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 844 | static void omap_gpio_ack_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 845 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 846 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 847 | unsigned offset = d->hwirq; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 848 | |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 849 | omap_clear_gpio_irqstatus(bank, offset); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 850 | } |
| 851 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 852 | static void omap_gpio_mask_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 853 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 854 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 855 | unsigned offset = d->hwirq; |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 856 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 857 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 858 | raw_spin_lock_irqsave(&bank->lock, flags); |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 859 | omap_set_gpio_irqenable(bank, offset, 0); |
| 860 | omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 861 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 862 | } |
| 863 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 864 | static void omap_gpio_unmask_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 865 | { |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 866 | struct gpio_bank *bank = omap_irq_data_get_bank(d); |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 867 | unsigned offset = d->hwirq; |
Thomas Gleixner | 8c04a17 | 2011-03-24 12:40:15 +0100 | [diff] [blame] | 868 | u32 trigger = irqd_get_trigger_type(d); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 869 | unsigned long flags; |
Kevin Hilman | 55b6019 | 2009-06-04 15:57:10 -0700 | [diff] [blame] | 870 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 871 | raw_spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | 55b6019 | 2009-06-04 15:57:10 -0700 | [diff] [blame] | 872 | if (trigger) |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 873 | omap_set_gpio_triggering(bank, offset, trigger); |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 874 | |
| 875 | /* For level-triggered GPIOs, the clearing must be done after |
| 876 | * the HW source is cleared, thus after the handler has run */ |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 877 | if (bank->level_mask & BIT(offset)) { |
| 878 | omap_set_gpio_irqenable(bank, offset, 0); |
| 879 | omap_clear_gpio_irqstatus(bank, offset); |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 880 | } |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 881 | |
Grygorii Strashko | 9943f26 | 2015-03-23 14:18:27 +0200 | [diff] [blame] | 882 | omap_set_gpio_irqenable(bank, offset, 1); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 883 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 884 | } |
| 885 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 886 | /*---------------------------------------------------------------------*/ |
| 887 | |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 888 | static int omap_mpuio_suspend_noirq(struct device *dev) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 889 | { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 890 | struct platform_device *pdev = to_platform_device(dev); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 891 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 892 | void __iomem *mask_reg = bank->base + |
| 893 | OMAP_MPUIO_GPIO_MASKIT / bank->stride; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 894 | unsigned long flags; |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 895 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 896 | raw_spin_lock_irqsave(&bank->lock, flags); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 897 | writel_relaxed(0xffff & ~bank->context.wake_en, mask_reg); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 898 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 899 | |
| 900 | return 0; |
| 901 | } |
| 902 | |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 903 | static int omap_mpuio_resume_noirq(struct device *dev) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 904 | { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 905 | struct platform_device *pdev = to_platform_device(dev); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 906 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 907 | void __iomem *mask_reg = bank->base + |
| 908 | OMAP_MPUIO_GPIO_MASKIT / bank->stride; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 909 | unsigned long flags; |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 910 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 911 | raw_spin_lock_irqsave(&bank->lock, flags); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 912 | writel_relaxed(bank->context.wake_en, mask_reg); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 913 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 914 | |
| 915 | return 0; |
| 916 | } |
| 917 | |
Alexey Dobriyan | 4714521 | 2009-12-14 18:00:08 -0800 | [diff] [blame] | 918 | static const struct dev_pm_ops omap_mpuio_dev_pm_ops = { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 919 | .suspend_noirq = omap_mpuio_suspend_noirq, |
| 920 | .resume_noirq = omap_mpuio_resume_noirq, |
| 921 | }; |
| 922 | |
Rafael J. Wysocki | 3c437ff | 2011-04-22 22:02:46 +0200 | [diff] [blame] | 923 | /* use platform_driver for this. */ |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 924 | static struct platform_driver omap_mpuio_driver = { |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 925 | .driver = { |
| 926 | .name = "mpuio", |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 927 | .pm = &omap_mpuio_dev_pm_ops, |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 928 | }, |
| 929 | }; |
| 930 | |
| 931 | static struct platform_device omap_mpuio_device = { |
| 932 | .name = "mpuio", |
| 933 | .id = -1, |
| 934 | .dev = { |
| 935 | .driver = &omap_mpuio_driver.driver, |
| 936 | } |
| 937 | /* could list the /proc/iomem resources */ |
| 938 | }; |
| 939 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 940 | static inline void omap_mpuio_init(struct gpio_bank *bank) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 941 | { |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 942 | platform_set_drvdata(&omap_mpuio_device, bank); |
David Brownell | fcf126d | 2007-04-02 12:46:47 -0700 | [diff] [blame] | 943 | |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 944 | if (platform_driver_register(&omap_mpuio_driver) == 0) |
| 945 | (void) platform_device_register(&omap_mpuio_device); |
| 946 | } |
| 947 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 948 | /*---------------------------------------------------------------------*/ |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 949 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 950 | static int omap_gpio_get_direction(struct gpio_chip *chip, unsigned offset) |
Yegor Yefremov | 9370084 | 2014-04-24 08:57:39 +0200 | [diff] [blame] | 951 | { |
| 952 | struct gpio_bank *bank; |
| 953 | unsigned long flags; |
| 954 | void __iomem *reg; |
| 955 | int dir; |
| 956 | |
| 957 | bank = container_of(chip, struct gpio_bank, chip); |
| 958 | reg = bank->base + bank->regs->direction; |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 959 | raw_spin_lock_irqsave(&bank->lock, flags); |
Yegor Yefremov | 9370084 | 2014-04-24 08:57:39 +0200 | [diff] [blame] | 960 | dir = !!(readl_relaxed(reg) & BIT(offset)); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 961 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Yegor Yefremov | 9370084 | 2014-04-24 08:57:39 +0200 | [diff] [blame] | 962 | return dir; |
| 963 | } |
| 964 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 965 | static int omap_gpio_input(struct gpio_chip *chip, unsigned offset) |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 966 | { |
| 967 | struct gpio_bank *bank; |
| 968 | unsigned long flags; |
| 969 | |
| 970 | bank = container_of(chip, struct gpio_bank, chip); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 971 | raw_spin_lock_irqsave(&bank->lock, flags); |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 972 | omap_set_gpio_direction(bank, offset, 1); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 973 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 974 | return 0; |
| 975 | } |
| 976 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 977 | static int omap_gpio_get(struct gpio_chip *chip, unsigned offset) |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 978 | { |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 979 | struct gpio_bank *bank; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 980 | |
Charulatha V | a8be8da | 2011-04-22 16:38:16 +0530 | [diff] [blame] | 981 | bank = container_of(chip, struct gpio_bank, chip); |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 982 | |
Grygorii Strashko | b2b2004 | 2015-03-23 14:18:23 +0200 | [diff] [blame] | 983 | if (omap_gpio_is_input(bank, offset)) |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 984 | return omap_get_gpio_datain(bank, offset); |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 985 | else |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 986 | return omap_get_gpio_dataout(bank, offset); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 987 | } |
| 988 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 989 | static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value) |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 990 | { |
| 991 | struct gpio_bank *bank; |
| 992 | unsigned long flags; |
| 993 | |
| 994 | bank = container_of(chip, struct gpio_bank, chip); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 995 | raw_spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 996 | bank->set_dataout(bank, offset, value); |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 997 | omap_set_gpio_direction(bank, offset, 0); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 998 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Javier Martinez Canillas | 2f56e0a | 2013-10-16 02:47:30 +0200 | [diff] [blame] | 999 | return 0; |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 1000 | } |
| 1001 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1002 | static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset, |
| 1003 | unsigned debounce) |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 1004 | { |
| 1005 | struct gpio_bank *bank; |
| 1006 | unsigned long flags; |
| 1007 | |
| 1008 | bank = container_of(chip, struct gpio_bank, chip); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1009 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1010 | raw_spin_lock_irqsave(&bank->lock, flags); |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1011 | omap2_set_gpio_debounce(bank, offset, debounce); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1012 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 1013 | |
| 1014 | return 0; |
| 1015 | } |
| 1016 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1017 | static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 1018 | { |
| 1019 | struct gpio_bank *bank; |
| 1020 | unsigned long flags; |
| 1021 | |
| 1022 | bank = container_of(chip, struct gpio_bank, chip); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1023 | raw_spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 1024 | bank->set_dataout(bank, offset, value); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1025 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 1026 | } |
| 1027 | |
| 1028 | /*---------------------------------------------------------------------*/ |
| 1029 | |
Tony Lindgren | 9a74805 | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1030 | static void __init omap_gpio_show_rev(struct gpio_bank *bank) |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1031 | { |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 1032 | static bool called; |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1033 | u32 rev; |
| 1034 | |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 1035 | if (called || bank->regs->revision == USHRT_MAX) |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1036 | return; |
| 1037 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1038 | rev = readw_relaxed(bank->base + bank->regs->revision); |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 1039 | pr_info("OMAP GPIO hardware version %d.%d\n", |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1040 | (rev >> 4) & 0x0f, rev & 0x0f); |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 1041 | |
| 1042 | called = true; |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1043 | } |
| 1044 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1045 | static void omap_gpio_mod_init(struct gpio_bank *bank) |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1046 | { |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1047 | void __iomem *base = bank->base; |
| 1048 | u32 l = 0xffffffff; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1049 | |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1050 | if (bank->width == 16) |
| 1051 | l = 0xffff; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1052 | |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1053 | if (bank->is_mpuio) { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1054 | writel_relaxed(l, bank->base + bank->regs->irqenable); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1055 | return; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1056 | } |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1057 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1058 | omap_gpio_rmw(base, bank->regs->irqenable, l, |
| 1059 | bank->regs->irqenable_inv); |
| 1060 | omap_gpio_rmw(base, bank->regs->irqstatus, l, |
| 1061 | !bank->regs->irqenable_inv); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1062 | if (bank->regs->debounce_en) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1063 | writel_relaxed(0, base + bank->regs->debounce_en); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1064 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1065 | /* Save OE default value (0xffffffff) in the context */ |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1066 | bank->context.oe = readl_relaxed(bank->base + bank->regs->direction); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1067 | /* Initialize interface clk ungated, module enabled */ |
| 1068 | if (bank->regs->ctrl) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1069 | writel_relaxed(0, base + bank->regs->ctrl); |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1070 | } |
| 1071 | |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1072 | static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1073 | { |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1074 | static int gpio; |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1075 | int irq_base = 0; |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1076 | int ret; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1077 | |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1078 | /* |
| 1079 | * REVISIT eventually switch from OMAP-specific gpio structs |
| 1080 | * over to the generic ones |
| 1081 | */ |
| 1082 | bank->chip.request = omap_gpio_request; |
| 1083 | bank->chip.free = omap_gpio_free; |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1084 | bank->chip.get_direction = omap_gpio_get_direction; |
| 1085 | bank->chip.direction_input = omap_gpio_input; |
| 1086 | bank->chip.get = omap_gpio_get; |
| 1087 | bank->chip.direction_output = omap_gpio_output; |
| 1088 | bank->chip.set_debounce = omap_gpio_debounce; |
| 1089 | bank->chip.set = omap_gpio_set; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1090 | if (bank->is_mpuio) { |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1091 | bank->chip.label = "mpuio"; |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 1092 | if (bank->regs->wkup_en) |
| 1093 | bank->chip.dev = &omap_mpuio_device.dev; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1094 | bank->chip.base = OMAP_MPUIO(0); |
| 1095 | } else { |
| 1096 | bank->chip.label = "gpio"; |
| 1097 | bank->chip.base = gpio; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1098 | } |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 1099 | bank->chip.ngpio = bank->width; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1100 | |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1101 | ret = gpiochip_add(&bank->chip); |
| 1102 | if (ret) { |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1103 | dev_err(bank->dev, "Could not register gpio chip %d\n", ret); |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1104 | return ret; |
| 1105 | } |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1106 | |
Tony Lindgren | 46d4f7c | 2015-09-03 10:31:27 -0700 | [diff] [blame] | 1107 | if (!bank->is_mpuio) |
| 1108 | gpio += bank->width; |
| 1109 | |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1110 | #ifdef CONFIG_ARCH_OMAP1 |
| 1111 | /* |
| 1112 | * REVISIT: Once we have OMAP1 supporting SPARSE_IRQ, we can drop |
| 1113 | * irq_alloc_descs() since a base IRQ offset will no longer be needed. |
| 1114 | */ |
| 1115 | irq_base = irq_alloc_descs(-1, 0, bank->width, 0); |
| 1116 | if (irq_base < 0) { |
| 1117 | dev_err(bank->dev, "Couldn't allocate IRQ numbers\n"); |
| 1118 | return -ENODEV; |
| 1119 | } |
| 1120 | #endif |
| 1121 | |
Tony Lindgren | d2d05c6 | 2015-04-23 16:54:17 -0700 | [diff] [blame] | 1122 | /* MPUIO is a bit different, reading IRQ status clears it */ |
| 1123 | if (bank->is_mpuio) { |
| 1124 | irqc->irq_ack = dummy_irq_chip.irq_ack; |
Tony Lindgren | d2d05c6 | 2015-04-23 16:54:17 -0700 | [diff] [blame] | 1125 | if (!bank->regs->wkup_en) |
| 1126 | irqc->irq_set_wake = NULL; |
| 1127 | } |
| 1128 | |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1129 | ret = gpiochip_irqchip_add(&bank->chip, irqc, |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 1130 | irq_base, handle_bad_irq, |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1131 | IRQ_TYPE_NONE); |
| 1132 | |
| 1133 | if (ret) { |
| 1134 | dev_err(bank->dev, "Couldn't add irqchip to gpiochip %d\n", ret); |
Linus Walleij | da26d5d | 2014-09-16 15:11:41 -0700 | [diff] [blame] | 1135 | gpiochip_remove(&bank->chip); |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1136 | return -ENODEV; |
| 1137 | } |
| 1138 | |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 1139 | gpiochip_set_chained_irqchip(&bank->chip, irqc, bank->irq, NULL); |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1140 | |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 1141 | ret = devm_request_irq(bank->dev, bank->irq, omap_gpio_irq_handler, |
| 1142 | 0, dev_name(bank->dev), bank); |
| 1143 | if (ret) |
| 1144 | gpiochip_remove(&bank->chip); |
| 1145 | |
| 1146 | return ret; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1147 | } |
| 1148 | |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1149 | static const struct of_device_id omap_gpio_match[]; |
| 1150 | |
Bill Pemberton | 3836309 | 2012-11-19 13:22:34 -0500 | [diff] [blame] | 1151 | static int omap_gpio_probe(struct platform_device *pdev) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1152 | { |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 1153 | struct device *dev = &pdev->dev; |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1154 | struct device_node *node = dev->of_node; |
| 1155 | const struct of_device_id *match; |
Uwe Kleine-König | f6817a2 | 2012-05-21 21:57:39 +0200 | [diff] [blame] | 1156 | const struct omap_gpio_platform_data *pdata; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1157 | struct resource *res; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1158 | struct gpio_bank *bank; |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1159 | struct irq_chip *irqc; |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1160 | int ret; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1161 | |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1162 | match = of_match_device(of_match_ptr(omap_gpio_match), dev); |
| 1163 | |
Jingoo Han | e56aee1 | 2013-07-30 17:08:05 +0900 | [diff] [blame] | 1164 | pdata = match ? match->data : dev_get_platdata(dev); |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1165 | if (!pdata) |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 1166 | return -EINVAL; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1167 | |
Tobias Klauser | 086d585 | 2012-10-05 11:37:38 +0200 | [diff] [blame] | 1168 | bank = devm_kzalloc(dev, sizeof(struct gpio_bank), GFP_KERNEL); |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1169 | if (!bank) { |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 1170 | dev_err(dev, "Memory alloc failed\n"); |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 1171 | return -ENOMEM; |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1172 | } |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1173 | |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1174 | irqc = devm_kzalloc(dev, sizeof(*irqc), GFP_KERNEL); |
| 1175 | if (!irqc) |
| 1176 | return -ENOMEM; |
| 1177 | |
Tony Lindgren | 3d009c8 | 2015-01-16 14:50:50 -0800 | [diff] [blame] | 1178 | irqc->irq_startup = omap_gpio_irq_startup, |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1179 | irqc->irq_shutdown = omap_gpio_irq_shutdown, |
| 1180 | irqc->irq_ack = omap_gpio_ack_irq, |
| 1181 | irqc->irq_mask = omap_gpio_mask_irq, |
| 1182 | irqc->irq_unmask = omap_gpio_unmask_irq, |
| 1183 | irqc->irq_set_type = omap_gpio_irq_type, |
| 1184 | irqc->irq_set_wake = omap_gpio_wake_enable, |
Grygorii Strashko | aca82d1 | 2015-09-25 12:28:02 -0700 | [diff] [blame] | 1185 | irqc->irq_bus_lock = omap_gpio_irq_bus_lock, |
| 1186 | irqc->irq_bus_sync_unlock = gpio_irq_bus_sync_unlock, |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1187 | irqc->name = dev_name(&pdev->dev); |
| 1188 | |
Grygorii Strashko | 89d18e3 | 2015-08-18 14:10:53 +0300 | [diff] [blame] | 1189 | bank->irq = platform_get_irq(pdev, 0); |
| 1190 | if (bank->irq <= 0) { |
| 1191 | if (!bank->irq) |
| 1192 | bank->irq = -ENXIO; |
| 1193 | if (bank->irq != -EPROBE_DEFER) |
| 1194 | dev_err(dev, |
| 1195 | "can't get irq resource ret=%d\n", bank->irq); |
| 1196 | return bank->irq; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1197 | } |
| 1198 | |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 1199 | bank->dev = dev; |
Javier Martinez Canillas | fb655f5 | 2014-04-06 16:58:16 +0200 | [diff] [blame] | 1200 | bank->chip.dev = dev; |
Grygorii Strashko | c23837c | 2015-06-25 18:13:33 +0300 | [diff] [blame] | 1201 | bank->chip.owner = THIS_MODULE; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1202 | bank->dbck_flag = pdata->dbck_flag; |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 1203 | bank->stride = pdata->bank_stride; |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 1204 | bank->width = pdata->bank_width; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1205 | bank->is_mpuio = pdata->is_mpuio; |
Charulatha V | 803a243 | 2011-05-05 17:04:12 +0530 | [diff] [blame] | 1206 | bank->non_wakeup_gpios = pdata->non_wakeup_gpios; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 1207 | bank->regs = pdata->regs; |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1208 | #ifdef CONFIG_OF_GPIO |
| 1209 | bank->chip.of_node = of_node_get(node); |
| 1210 | #endif |
Jon Hunter | a2797be | 2013-04-04 15:16:15 -0500 | [diff] [blame] | 1211 | if (node) { |
| 1212 | if (!of_property_read_bool(node, "ti,gpio-always-on")) |
| 1213 | bank->loses_context = true; |
| 1214 | } else { |
| 1215 | bank->loses_context = pdata->loses_context; |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1216 | |
| 1217 | if (bank->loses_context) |
| 1218 | bank->get_context_loss_count = |
| 1219 | pdata->get_context_loss_count; |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1220 | } |
| 1221 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 1222 | if (bank->regs->set_dataout && bank->regs->clr_dataout) |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1223 | bank->set_dataout = omap_set_gpio_dataout_reg; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 1224 | else |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1225 | bank->set_dataout = omap_set_gpio_dataout_mask; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1226 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1227 | raw_spin_lock_init(&bank->lock); |
Grygorii Strashko | 450fa54 | 2015-09-25 12:28:03 -0700 | [diff] [blame] | 1228 | raw_spin_lock_init(&bank->wa_lock); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1229 | |
| 1230 | /* Static mapping, never released */ |
| 1231 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Jingoo Han | 717f70e | 2014-02-12 11:51:38 +0900 | [diff] [blame] | 1232 | bank->base = devm_ioremap_resource(dev, res); |
| 1233 | if (IS_ERR(bank->base)) { |
Jingoo Han | 717f70e | 2014-02-12 11:51:38 +0900 | [diff] [blame] | 1234 | return PTR_ERR(bank->base); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1235 | } |
| 1236 | |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 1237 | if (bank->dbck_flag) { |
| 1238 | bank->dbck = devm_clk_get(bank->dev, "dbclk"); |
| 1239 | if (IS_ERR(bank->dbck)) { |
| 1240 | dev_err(bank->dev, |
| 1241 | "Could not get gpio dbck. Disable debounce\n"); |
| 1242 | bank->dbck_flag = false; |
| 1243 | } else { |
| 1244 | clk_prepare(bank->dbck); |
| 1245 | } |
| 1246 | } |
| 1247 | |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1248 | platform_set_drvdata(pdev, bank); |
| 1249 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1250 | pm_runtime_enable(bank->dev); |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1251 | pm_runtime_irq_safe(bank->dev); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1252 | pm_runtime_get_sync(bank->dev); |
| 1253 | |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1254 | if (bank->is_mpuio) |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1255 | omap_mpuio_init(bank); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1256 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1257 | omap_gpio_mod_init(bank); |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1258 | |
Nishanth Menon | 46824e2 | 2014-09-05 14:52:55 -0500 | [diff] [blame] | 1259 | ret = omap_gpio_chip_init(bank, irqc); |
Tony Lindgren | 5e606ab | 2015-08-28 11:44:49 -0700 | [diff] [blame] | 1260 | if (ret) { |
| 1261 | pm_runtime_put_sync(bank->dev); |
| 1262 | pm_runtime_disable(bank->dev); |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1263 | return ret; |
Tony Lindgren | 5e606ab | 2015-08-28 11:44:49 -0700 | [diff] [blame] | 1264 | } |
Javier Martinez Canillas | 6ef7f38 | 2014-04-06 16:58:14 +0200 | [diff] [blame] | 1265 | |
Tony Lindgren | 9a74805 | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1266 | omap_gpio_show_rev(bank); |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1267 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1268 | pm_runtime_put(bank->dev); |
| 1269 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1270 | list_add_tail(&bank->node, &omap_gpio_list); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1271 | |
Jon Hunter | 879fe32 | 2013-04-04 15:16:12 -0500 | [diff] [blame] | 1272 | return 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1273 | } |
| 1274 | |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1275 | static int omap_gpio_remove(struct platform_device *pdev) |
| 1276 | { |
| 1277 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
| 1278 | |
| 1279 | list_del(&bank->node); |
| 1280 | gpiochip_remove(&bank->chip); |
| 1281 | pm_runtime_disable(bank->dev); |
Grygorii Strashko | 5d9452e | 2015-08-18 14:10:56 +0300 | [diff] [blame] | 1282 | if (bank->dbck_flag) |
| 1283 | clk_unprepare(bank->dbck); |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1284 | |
| 1285 | return 0; |
| 1286 | } |
| 1287 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1288 | #ifdef CONFIG_ARCH_OMAP2PLUS |
| 1289 | |
Rafael J. Wysocki | ecb2312 | 2014-12-04 01:03:40 +0100 | [diff] [blame] | 1290 | #if defined(CONFIG_PM) |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1291 | static void omap_gpio_restore_context(struct gpio_bank *bank); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1292 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1293 | static int omap_gpio_runtime_suspend(struct device *dev) |
| 1294 | { |
| 1295 | struct platform_device *pdev = to_platform_device(dev); |
| 1296 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
| 1297 | u32 l1 = 0, l2 = 0; |
| 1298 | unsigned long flags; |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1299 | u32 wake_low, wake_hi; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1300 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1301 | raw_spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1302 | |
| 1303 | /* |
| 1304 | * Only edges can generate a wakeup event to the PRCM. |
| 1305 | * |
| 1306 | * Therefore, ensure any wake-up capable GPIOs have |
| 1307 | * edge-detection enabled before going idle to ensure a wakeup |
| 1308 | * to the PRCM is generated on a GPIO transition. (c.f. 34xx |
| 1309 | * NDA TRM 25.5.3.1) |
| 1310 | * |
| 1311 | * The normal values will be restored upon ->runtime_resume() |
| 1312 | * by writing back the values saved in bank->context. |
| 1313 | */ |
| 1314 | wake_low = bank->context.leveldetect0 & bank->context.wake_en; |
| 1315 | if (wake_low) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1316 | writel_relaxed(wake_low | bank->context.fallingdetect, |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1317 | bank->base + bank->regs->fallingdetect); |
| 1318 | wake_hi = bank->context.leveldetect1 & bank->context.wake_en; |
| 1319 | if (wake_hi) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1320 | writel_relaxed(wake_hi | bank->context.risingdetect, |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1321 | bank->base + bank->regs->risingdetect); |
| 1322 | |
Kevin Hilman | b3c64bc | 2012-05-17 16:42:16 -0700 | [diff] [blame] | 1323 | if (!bank->enabled_non_wakeup_gpios) |
| 1324 | goto update_gpio_context_count; |
| 1325 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1326 | if (bank->power_mode != OFF_MODE) { |
| 1327 | bank->power_mode = 0; |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 1328 | goto update_gpio_context_count; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1329 | } |
| 1330 | /* |
| 1331 | * If going to OFF, remove triggering for all |
| 1332 | * non-wakeup GPIOs. Otherwise spurious IRQs will be |
| 1333 | * generated. See OMAP2420 Errata item 1.101. |
| 1334 | */ |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1335 | bank->saved_datain = readl_relaxed(bank->base + |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1336 | bank->regs->datain); |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1337 | l1 = bank->context.fallingdetect; |
| 1338 | l2 = bank->context.risingdetect; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1339 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1340 | l1 &= ~bank->enabled_non_wakeup_gpios; |
| 1341 | l2 &= ~bank->enabled_non_wakeup_gpios; |
| 1342 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1343 | writel_relaxed(l1, bank->base + bank->regs->fallingdetect); |
| 1344 | writel_relaxed(l2, bank->base + bank->regs->risingdetect); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1345 | |
| 1346 | bank->workaround_enabled = true; |
| 1347 | |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 1348 | update_gpio_context_count: |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1349 | if (bank->get_context_loss_count) |
| 1350 | bank->context_loss_count = |
| 1351 | bank->get_context_loss_count(bank->dev); |
| 1352 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1353 | omap_gpio_dbck_disable(bank); |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1354 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1355 | |
| 1356 | return 0; |
| 1357 | } |
| 1358 | |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1359 | static void omap_gpio_init_context(struct gpio_bank *p); |
| 1360 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1361 | static int omap_gpio_runtime_resume(struct device *dev) |
| 1362 | { |
| 1363 | struct platform_device *pdev = to_platform_device(dev); |
| 1364 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1365 | u32 l = 0, gen, gen0, gen1; |
| 1366 | unsigned long flags; |
Jon Hunter | a2797be | 2013-04-04 15:16:15 -0500 | [diff] [blame] | 1367 | int c; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1368 | |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1369 | raw_spin_lock_irqsave(&bank->lock, flags); |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1370 | |
| 1371 | /* |
| 1372 | * On the first resume during the probe, the context has not |
| 1373 | * been initialised and so initialise it now. Also initialise |
| 1374 | * the context loss count. |
| 1375 | */ |
| 1376 | if (bank->loses_context && !bank->context_valid) { |
| 1377 | omap_gpio_init_context(bank); |
| 1378 | |
| 1379 | if (bank->get_context_loss_count) |
| 1380 | bank->context_loss_count = |
| 1381 | bank->get_context_loss_count(bank->dev); |
| 1382 | } |
| 1383 | |
Javier Martinez Canillas | a0e827c | 2014-06-27 22:17:37 +0200 | [diff] [blame] | 1384 | omap_gpio_dbck_enable(bank); |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1385 | |
| 1386 | /* |
| 1387 | * In ->runtime_suspend(), level-triggered, wakeup-enabled |
| 1388 | * GPIOs were set to edge trigger also in order to be able to |
| 1389 | * generate a PRCM wakeup. Here we restore the |
| 1390 | * pre-runtime_suspend() values for edge triggering. |
| 1391 | */ |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1392 | writel_relaxed(bank->context.fallingdetect, |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1393 | bank->base + bank->regs->fallingdetect); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1394 | writel_relaxed(bank->context.risingdetect, |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1395 | bank->base + bank->regs->risingdetect); |
| 1396 | |
Jon Hunter | a2797be | 2013-04-04 15:16:15 -0500 | [diff] [blame] | 1397 | if (bank->loses_context) { |
| 1398 | if (!bank->get_context_loss_count) { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1399 | omap_gpio_restore_context(bank); |
| 1400 | } else { |
Jon Hunter | a2797be | 2013-04-04 15:16:15 -0500 | [diff] [blame] | 1401 | c = bank->get_context_loss_count(bank->dev); |
| 1402 | if (c != bank->context_loss_count) { |
| 1403 | omap_gpio_restore_context(bank); |
| 1404 | } else { |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1405 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Jon Hunter | a2797be | 2013-04-04 15:16:15 -0500 | [diff] [blame] | 1406 | return 0; |
| 1407 | } |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1408 | } |
| 1409 | } |
| 1410 | |
Tarun Kanti DebBarma | 1b128703 | 2012-04-27 19:43:38 +0530 | [diff] [blame] | 1411 | if (!bank->workaround_enabled) { |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1412 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tarun Kanti DebBarma | 1b128703 | 2012-04-27 19:43:38 +0530 | [diff] [blame] | 1413 | return 0; |
| 1414 | } |
| 1415 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1416 | l = readl_relaxed(bank->base + bank->regs->datain); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1417 | |
| 1418 | /* |
| 1419 | * Check if any of the non-wakeup interrupt GPIOs have changed |
| 1420 | * state. If so, generate an IRQ by software. This is |
| 1421 | * horribly racy, but it's the best we can do to work around |
| 1422 | * this silicon bug. |
| 1423 | */ |
| 1424 | l ^= bank->saved_datain; |
| 1425 | l &= bank->enabled_non_wakeup_gpios; |
| 1426 | |
| 1427 | /* |
| 1428 | * No need to generate IRQs for the rising edge for gpio IRQs |
| 1429 | * configured with falling edge only; and vice versa. |
| 1430 | */ |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1431 | gen0 = l & bank->context.fallingdetect; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1432 | gen0 &= bank->saved_datain; |
| 1433 | |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1434 | gen1 = l & bank->context.risingdetect; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1435 | gen1 &= ~(bank->saved_datain); |
| 1436 | |
| 1437 | /* FIXME: Consider GPIO IRQs with level detections properly! */ |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1438 | gen = l & (~(bank->context.fallingdetect) & |
| 1439 | ~(bank->context.risingdetect)); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1440 | /* Consider all GPIO IRQs needed to be updated */ |
| 1441 | gen |= gen0 | gen1; |
| 1442 | |
| 1443 | if (gen) { |
| 1444 | u32 old0, old1; |
| 1445 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1446 | old0 = readl_relaxed(bank->base + bank->regs->leveldetect0); |
| 1447 | old1 = readl_relaxed(bank->base + bank->regs->leveldetect1); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1448 | |
Tarun Kanti DebBarma | 4e962e8 | 2012-04-27 19:43:37 +0530 | [diff] [blame] | 1449 | if (!bank->regs->irqstatus_raw0) { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1450 | writel_relaxed(old0 | gen, bank->base + |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1451 | bank->regs->leveldetect0); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1452 | writel_relaxed(old1 | gen, bank->base + |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1453 | bank->regs->leveldetect1); |
| 1454 | } |
| 1455 | |
Tarun Kanti DebBarma | 4e962e8 | 2012-04-27 19:43:37 +0530 | [diff] [blame] | 1456 | if (bank->regs->irqstatus_raw0) { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1457 | writel_relaxed(old0 | l, bank->base + |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1458 | bank->regs->leveldetect0); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1459 | writel_relaxed(old1 | l, bank->base + |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1460 | bank->regs->leveldetect1); |
| 1461 | } |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1462 | writel_relaxed(old0, bank->base + bank->regs->leveldetect0); |
| 1463 | writel_relaxed(old1, bank->base + bank->regs->leveldetect1); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1464 | } |
| 1465 | |
| 1466 | bank->workaround_enabled = false; |
Sebastian Andrzej Siewior | 4dbada2 | 2015-07-21 18:26:51 +0200 | [diff] [blame] | 1467 | raw_spin_unlock_irqrestore(&bank->lock, flags); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1468 | |
| 1469 | return 0; |
| 1470 | } |
Rafael J. Wysocki | ecb2312 | 2014-12-04 01:03:40 +0100 | [diff] [blame] | 1471 | #endif /* CONFIG_PM */ |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1472 | |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1473 | #if IS_BUILTIN(CONFIG_GPIO_OMAP) |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1474 | void omap2_gpio_prepare_for_idle(int pwr_mode) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1475 | { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1476 | struct gpio_bank *bank; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1477 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1478 | list_for_each_entry(bank, &omap_gpio_list, node) { |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 1479 | if (!BANK_USED(bank) || !bank->loses_context) |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1480 | continue; |
| 1481 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1482 | bank->power_mode = pwr_mode; |
| 1483 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1484 | pm_runtime_put_sync_suspend(bank->dev); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1485 | } |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1486 | } |
| 1487 | |
Kevin Hilman | 43ffcd9 | 2009-01-27 11:09:24 -0800 | [diff] [blame] | 1488 | void omap2_gpio_resume_after_idle(void) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1489 | { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1490 | struct gpio_bank *bank; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1491 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1492 | list_for_each_entry(bank, &omap_gpio_list, node) { |
Javier Martinez Canillas | fa365e4 | 2013-09-25 02:36:52 +0200 | [diff] [blame] | 1493 | if (!BANK_USED(bank) || !bank->loses_context) |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1494 | continue; |
| 1495 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1496 | pm_runtime_get_sync(bank->dev); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1497 | } |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1498 | } |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1499 | #endif |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1500 | |
Rafael J. Wysocki | ecb2312 | 2014-12-04 01:03:40 +0100 | [diff] [blame] | 1501 | #if defined(CONFIG_PM) |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1502 | static void omap_gpio_init_context(struct gpio_bank *p) |
| 1503 | { |
| 1504 | struct omap_gpio_reg_offs *regs = p->regs; |
| 1505 | void __iomem *base = p->base; |
| 1506 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1507 | p->context.ctrl = readl_relaxed(base + regs->ctrl); |
| 1508 | p->context.oe = readl_relaxed(base + regs->direction); |
| 1509 | p->context.wake_en = readl_relaxed(base + regs->wkup_en); |
| 1510 | p->context.leveldetect0 = readl_relaxed(base + regs->leveldetect0); |
| 1511 | p->context.leveldetect1 = readl_relaxed(base + regs->leveldetect1); |
| 1512 | p->context.risingdetect = readl_relaxed(base + regs->risingdetect); |
| 1513 | p->context.fallingdetect = readl_relaxed(base + regs->fallingdetect); |
| 1514 | p->context.irqenable1 = readl_relaxed(base + regs->irqenable); |
| 1515 | p->context.irqenable2 = readl_relaxed(base + regs->irqenable2); |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1516 | |
| 1517 | if (regs->set_dataout && p->regs->clr_dataout) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1518 | p->context.dataout = readl_relaxed(base + regs->set_dataout); |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1519 | else |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1520 | p->context.dataout = readl_relaxed(base + regs->dataout); |
Jon Hunter | 352a2d5 | 2013-04-15 13:06:54 -0500 | [diff] [blame] | 1521 | |
| 1522 | p->context_valid = true; |
| 1523 | } |
| 1524 | |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1525 | static void omap_gpio_restore_context(struct gpio_bank *bank) |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1526 | { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1527 | writel_relaxed(bank->context.wake_en, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1528 | bank->base + bank->regs->wkup_en); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1529 | writel_relaxed(bank->context.ctrl, bank->base + bank->regs->ctrl); |
| 1530 | writel_relaxed(bank->context.leveldetect0, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1531 | bank->base + bank->regs->leveldetect0); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1532 | writel_relaxed(bank->context.leveldetect1, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1533 | bank->base + bank->regs->leveldetect1); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1534 | writel_relaxed(bank->context.risingdetect, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1535 | bank->base + bank->regs->risingdetect); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1536 | writel_relaxed(bank->context.fallingdetect, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1537 | bank->base + bank->regs->fallingdetect); |
Nishanth Menon | f86bcc3 | 2011-09-09 19:14:08 +0530 | [diff] [blame] | 1538 | if (bank->regs->set_dataout && bank->regs->clr_dataout) |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1539 | writel_relaxed(bank->context.dataout, |
Nishanth Menon | f86bcc3 | 2011-09-09 19:14:08 +0530 | [diff] [blame] | 1540 | bank->base + bank->regs->set_dataout); |
| 1541 | else |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1542 | writel_relaxed(bank->context.dataout, |
Nishanth Menon | f86bcc3 | 2011-09-09 19:14:08 +0530 | [diff] [blame] | 1543 | bank->base + bank->regs->dataout); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1544 | writel_relaxed(bank->context.oe, bank->base + bank->regs->direction); |
Nishanth Menon | 6d13eaa | 2011-08-29 18:54:50 +0530 | [diff] [blame] | 1545 | |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 1546 | if (bank->dbck_enable_mask) { |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1547 | writel_relaxed(bank->context.debounce, bank->base + |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 1548 | bank->regs->debounce); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1549 | writel_relaxed(bank->context.debounce_en, |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 1550 | bank->base + bank->regs->debounce_en); |
| 1551 | } |
Nishanth Menon | ba805be | 2011-08-29 18:41:08 +0530 | [diff] [blame] | 1552 | |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1553 | writel_relaxed(bank->context.irqenable1, |
Nishanth Menon | ba805be | 2011-08-29 18:41:08 +0530 | [diff] [blame] | 1554 | bank->base + bank->regs->irqenable); |
Victor Kamensky | 661553b | 2013-11-16 02:01:04 +0200 | [diff] [blame] | 1555 | writel_relaxed(bank->context.irqenable2, |
Nishanth Menon | ba805be | 2011-08-29 18:41:08 +0530 | [diff] [blame] | 1556 | bank->base + bank->regs->irqenable2); |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1557 | } |
Rafael J. Wysocki | ecb2312 | 2014-12-04 01:03:40 +0100 | [diff] [blame] | 1558 | #endif /* CONFIG_PM */ |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1559 | #else |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1560 | #define omap_gpio_runtime_suspend NULL |
| 1561 | #define omap_gpio_runtime_resume NULL |
Arnd Bergmann | ea4a21a | 2013-05-31 17:59:46 +0200 | [diff] [blame] | 1562 | static inline void omap_gpio_init_context(struct gpio_bank *p) {} |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1563 | #endif |
| 1564 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1565 | static const struct dev_pm_ops gpio_pm_ops = { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1566 | SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume, |
| 1567 | NULL) |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1568 | }; |
| 1569 | |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1570 | #if defined(CONFIG_OF) |
| 1571 | static struct omap_gpio_reg_offs omap2_gpio_regs = { |
| 1572 | .revision = OMAP24XX_GPIO_REVISION, |
| 1573 | .direction = OMAP24XX_GPIO_OE, |
| 1574 | .datain = OMAP24XX_GPIO_DATAIN, |
| 1575 | .dataout = OMAP24XX_GPIO_DATAOUT, |
| 1576 | .set_dataout = OMAP24XX_GPIO_SETDATAOUT, |
| 1577 | .clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT, |
| 1578 | .irqstatus = OMAP24XX_GPIO_IRQSTATUS1, |
| 1579 | .irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2, |
| 1580 | .irqenable = OMAP24XX_GPIO_IRQENABLE1, |
| 1581 | .irqenable2 = OMAP24XX_GPIO_IRQENABLE2, |
| 1582 | .set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1, |
| 1583 | .clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1, |
| 1584 | .debounce = OMAP24XX_GPIO_DEBOUNCE_VAL, |
| 1585 | .debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN, |
| 1586 | .ctrl = OMAP24XX_GPIO_CTRL, |
| 1587 | .wkup_en = OMAP24XX_GPIO_WAKE_EN, |
| 1588 | .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0, |
| 1589 | .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1, |
| 1590 | .risingdetect = OMAP24XX_GPIO_RISINGDETECT, |
| 1591 | .fallingdetect = OMAP24XX_GPIO_FALLINGDETECT, |
| 1592 | }; |
| 1593 | |
| 1594 | static struct omap_gpio_reg_offs omap4_gpio_regs = { |
| 1595 | .revision = OMAP4_GPIO_REVISION, |
| 1596 | .direction = OMAP4_GPIO_OE, |
| 1597 | .datain = OMAP4_GPIO_DATAIN, |
| 1598 | .dataout = OMAP4_GPIO_DATAOUT, |
| 1599 | .set_dataout = OMAP4_GPIO_SETDATAOUT, |
| 1600 | .clr_dataout = OMAP4_GPIO_CLEARDATAOUT, |
| 1601 | .irqstatus = OMAP4_GPIO_IRQSTATUS0, |
| 1602 | .irqstatus2 = OMAP4_GPIO_IRQSTATUS1, |
| 1603 | .irqenable = OMAP4_GPIO_IRQSTATUSSET0, |
| 1604 | .irqenable2 = OMAP4_GPIO_IRQSTATUSSET1, |
| 1605 | .set_irqenable = OMAP4_GPIO_IRQSTATUSSET0, |
| 1606 | .clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0, |
| 1607 | .debounce = OMAP4_GPIO_DEBOUNCINGTIME, |
| 1608 | .debounce_en = OMAP4_GPIO_DEBOUNCENABLE, |
| 1609 | .ctrl = OMAP4_GPIO_CTRL, |
| 1610 | .wkup_en = OMAP4_GPIO_IRQWAKEN0, |
| 1611 | .leveldetect0 = OMAP4_GPIO_LEVELDETECT0, |
| 1612 | .leveldetect1 = OMAP4_GPIO_LEVELDETECT1, |
| 1613 | .risingdetect = OMAP4_GPIO_RISINGDETECT, |
| 1614 | .fallingdetect = OMAP4_GPIO_FALLINGDETECT, |
| 1615 | }; |
| 1616 | |
Chen Gang | e9a65bb | 2013-02-06 18:44:32 +0800 | [diff] [blame] | 1617 | static const struct omap_gpio_platform_data omap2_pdata = { |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1618 | .regs = &omap2_gpio_regs, |
| 1619 | .bank_width = 32, |
| 1620 | .dbck_flag = false, |
| 1621 | }; |
| 1622 | |
Chen Gang | e9a65bb | 2013-02-06 18:44:32 +0800 | [diff] [blame] | 1623 | static const struct omap_gpio_platform_data omap3_pdata = { |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1624 | .regs = &omap2_gpio_regs, |
| 1625 | .bank_width = 32, |
| 1626 | .dbck_flag = true, |
| 1627 | }; |
| 1628 | |
Chen Gang | e9a65bb | 2013-02-06 18:44:32 +0800 | [diff] [blame] | 1629 | static const struct omap_gpio_platform_data omap4_pdata = { |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1630 | .regs = &omap4_gpio_regs, |
| 1631 | .bank_width = 32, |
| 1632 | .dbck_flag = true, |
| 1633 | }; |
| 1634 | |
| 1635 | static const struct of_device_id omap_gpio_match[] = { |
| 1636 | { |
| 1637 | .compatible = "ti,omap4-gpio", |
| 1638 | .data = &omap4_pdata, |
| 1639 | }, |
| 1640 | { |
| 1641 | .compatible = "ti,omap3-gpio", |
| 1642 | .data = &omap3_pdata, |
| 1643 | }, |
| 1644 | { |
| 1645 | .compatible = "ti,omap2-gpio", |
| 1646 | .data = &omap2_pdata, |
| 1647 | }, |
| 1648 | { }, |
| 1649 | }; |
| 1650 | MODULE_DEVICE_TABLE(of, omap_gpio_match); |
| 1651 | #endif |
| 1652 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1653 | static struct platform_driver omap_gpio_driver = { |
| 1654 | .probe = omap_gpio_probe, |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1655 | .remove = omap_gpio_remove, |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1656 | .driver = { |
| 1657 | .name = "omap_gpio", |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1658 | .pm = &gpio_pm_ops, |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1659 | .of_match_table = of_match_ptr(omap_gpio_match), |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1660 | }, |
| 1661 | }; |
| 1662 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1663 | /* |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1664 | * gpio driver register needs to be done before |
| 1665 | * machine_init functions access gpio APIs. |
| 1666 | * Hence omap_gpio_drv_reg() is a postcore_initcall. |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1667 | */ |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1668 | static int __init omap_gpio_drv_reg(void) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1669 | { |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1670 | return platform_driver_register(&omap_gpio_driver); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1671 | } |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1672 | postcore_initcall(omap_gpio_drv_reg); |
Tony Lindgren | cac089f | 2015-04-23 16:56:22 -0700 | [diff] [blame] | 1673 | |
| 1674 | static void __exit omap_gpio_exit(void) |
| 1675 | { |
| 1676 | platform_driver_unregister(&omap_gpio_driver); |
| 1677 | } |
| 1678 | module_exit(omap_gpio_exit); |
| 1679 | |
| 1680 | MODULE_DESCRIPTION("omap gpio driver"); |
| 1681 | MODULE_ALIAS("platform:gpio-omap"); |
| 1682 | MODULE_LICENSE("GPL v2"); |