Marc Singer | 51cb21a | 2006-05-16 11:41:43 +0100 | [diff] [blame^] | 1 | README on the LCD Panels |
| 2 | ======================== |
| 3 | |
| 4 | Configuration options for several LCD panels, available from Logic PD, |
| 5 | are included in the kernel source. This README will help you |
| 6 | understand the configuration data and give you some guidance for |
| 7 | adding support for other panels if you wish. |
| 8 | |
| 9 | |
| 10 | lcd-panels.h |
| 11 | ------------ |
| 12 | |
| 13 | There is no way, at present, to detect which panel is attached to the |
| 14 | system at runtime. Thus the kernel configuration is static. The file |
| 15 | arch/arm/mach-ld7a40x/lcd-panels.h (or similar) defines all of the |
| 16 | panel specific parameters. |
| 17 | |
| 18 | It should be possible for this data to be shared among several device |
| 19 | families. The current layout may be insufficiently general, but it is |
| 20 | amenable to improvement. |
| 21 | |
| 22 | |
| 23 | PIXEL_CLOCK |
| 24 | ----------- |
| 25 | |
| 26 | The panel data sheets will give a range of acceptable pixel clocks. |
| 27 | The fundamental LCDCLK input frequency is divided down by a PCD |
| 28 | constant in field '.tim2'. It may happen that it is impossible to set |
| 29 | the pixel clock within this range. A clock which is too slow will |
| 30 | tend to flicker. For the highest quality image, set the clock as high |
| 31 | as possible. |
| 32 | |
| 33 | |
| 34 | MARGINS |
| 35 | ------- |
| 36 | |
| 37 | These values may be difficult to glean from the panel data sheet. In |
| 38 | the case of the Sharp panels, the upper margin is explicitly called |
| 39 | out as a specific number of lines from the top of the frame. The |
| 40 | other values may not matter as much as the panels tend to |
| 41 | automatically center the image. |
| 42 | |
| 43 | |
| 44 | Sync Sense |
| 45 | ---------- |
| 46 | |
| 47 | The sense of the hsync and vsync pulses may be called out in the data |
| 48 | sheet. On one panel, the sense of these pulses determine the height |
| 49 | of the visible region on the panel. Most of the Sharp panels use |
| 50 | negative sense sync pulses set by the TIM2_IHS and TIM2_IVS bits in |
| 51 | '.tim2'. |
| 52 | |
| 53 | |
| 54 | Pel Layout |
| 55 | ---------- |
| 56 | |
| 57 | The Sharp color TFT panels are all configured for 16 bit direct color |
| 58 | modes. The amba-lcd driver sets the pel mode to 565 for 5 bits of |
| 59 | each red and blue and 6 bits of green. |