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Paul Mundtc2a560f2006-10-19 17:31:22 +09001#ifndef __ASM_SH_RENESAS_RTS7751R2D_H
2#define __ASM_SH_RENESAS_RTS7751R2D_H
3
4/*
5 * linux/include/asm-sh/renesas_rts7751r2d.h
6 *
7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd.
8 *
9 * Renesas Technology Sales RTS7751R2D support
10 */
11
Magnus Damm2eeec852007-08-12 15:29:16 +090012/* Board specific addresses. */
Paul Mundtc2a560f2006-10-19 17:31:22 +090013
14#define PA_BCR 0xa4000000 /* FPGA */
15#define PA_IRLMON 0xa4000002 /* Interrupt Status control */
16#define PA_CFCTL 0xa4000004 /* CF Timing control */
17#define PA_CFPOW 0xa4000006 /* CF Power control */
18#define PA_DISPCTL 0xa4000008 /* Display Timing control */
19#define PA_SDMPOW 0xa400000a /* SD Power control */
20#define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */
21#define PA_PCICD 0xa400000e /* PCI Extention detect control */
22#define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */
Magnus Damm2eeec852007-08-12 15:29:16 +090023
24#define PA_R2D1_AXRST 0xa4000022 /* AX_LAN Reset control */
25#define PA_R2D1_CFRST 0xa4000024 /* CF Reset control */
26#define PA_R2D1_ADMRTS 0xa4000026 /* SD Reset control */
27#define PA_R2D1_EXTRST 0xa4000028 /* Extention Reset control */
28#define PA_R2D1_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */
29
30#define PA_R2DPLUS_CFRST 0xa4000022 /* CF Reset control */
31#define PA_R2DPLUS_ADMRTS 0xa4000024 /* SD Reset control */
32#define PA_R2DPLUS_EXTRST 0xa4000026 /* Extention Reset control */
33#define PA_R2DPLUS_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */
34#define PA_R2DPLUS_KEYCTLCLR 0xa400002a /* Key Interrupt clear */
35
Paul Mundtc2a560f2006-10-19 17:31:22 +090036#define PA_POWOFF 0xa4000030 /* Board Power OFF control */
37#define PA_VERREG 0xa4000032 /* FPGA Version Register */
38#define PA_INPORT 0xa4000034 /* KEY Input Port control */
39#define PA_OUTPORT 0xa4000036 /* LED control */
Magnus Damm5ca95c42007-08-03 10:16:29 +090040#define PA_BVERREG 0xa4000038 /* Board Revision Register */
Paul Mundtc2a560f2006-10-19 17:31:22 +090041
42#define PA_AX88796L 0xaa000400 /* AX88796L Area */
43#define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */
44#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
45#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
46
47#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
48
Magnus Damm2eeec852007-08-12 15:29:16 +090049#define R2D_FPGA_IRQ_BASE 100
50
51#define IRQ_VOYAGER (R2D_FPGA_IRQ_BASE + 0)
52#define IRQ_EXT (R2D_FPGA_IRQ_BASE + 1)
53#define IRQ_TP (R2D_FPGA_IRQ_BASE + 2)
54#define IRQ_RTC_T (R2D_FPGA_IRQ_BASE + 3)
55#define IRQ_RTC_A (R2D_FPGA_IRQ_BASE + 4)
56#define IRQ_SDCARD (R2D_FPGA_IRQ_BASE + 5)
57#define IRQ_CF_CD (R2D_FPGA_IRQ_BASE + 6)
58#define IRQ_CF_IDE (R2D_FPGA_IRQ_BASE + 7)
59#define IRQ_AX88796 (R2D_FPGA_IRQ_BASE + 8)
60#define IRQ_KEY (R2D_FPGA_IRQ_BASE + 9)
61#define IRQ_PCI_INTA (R2D_FPGA_IRQ_BASE + 10)
62#define IRQ_PCI_INTB (R2D_FPGA_IRQ_BASE + 11)
63#define IRQ_PCI_INTC (R2D_FPGA_IRQ_BASE + 12)
64#define IRQ_PCI_INTD (R2D_FPGA_IRQ_BASE + 13)
Paul Mundtc2a560f2006-10-19 17:31:22 +090065
Paul Mundt9c575482007-02-15 18:20:52 +090066/* arch/sh/boards/renesas/rts7751r2d/irq.c */
67void init_rts7751r2d_IRQ(void);
68int rts7751r2d_irq_demux(int);
69
Paul Mundtc2a560f2006-10-19 17:31:22 +090070#define __IO_PREFIX rts7751r2d
71#include <asm/io_generic.h>
72
73#endif /* __ASM_SH_RENESAS_RTS7751R2D */