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Andy Fleming1577ece2009-02-04 16:42:12 -08001/*
2 * Freescale PowerQUICC Ethernet Driver -- MIIM bus implementation
3 * Provides Bus interface for MIIM regs
4 *
5 * Author: Andy Fleming <afleming@freescale.com>
Sandeep Gopalpet1d2397d2009-11-02 07:03:22 +00006 * Modifier: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Andy Fleming1577ece2009-02-04 16:42:12 -08007 *
Sandeep Gopalpet1d2397d2009-11-02 07:03:22 +00008 * Copyright 2002-2004, 2008-2009 Freescale Semiconductor, Inc.
Andy Fleming1577ece2009-02-04 16:42:12 -08009 *
10 * Based on gianfar_mii.c and ucc_geth_mii.c (Li Yang, Kim Phillips)
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/string.h>
21#include <linux/errno.h>
22#include <linux/unistd.h>
23#include <linux/slab.h>
24#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mm.h>
32#include <linux/module.h>
33#include <linux/platform_device.h>
34#include <linux/crc32.h>
35#include <linux/mii.h>
36#include <linux/phy.h>
37#include <linux/of.h>
Grant Likely324931b2009-04-25 12:53:07 +000038#include <linux/of_mdio.h>
Andy Fleming1577ece2009-02-04 16:42:12 -080039#include <linux/of_platform.h>
40
41#include <asm/io.h>
42#include <asm/irq.h>
43#include <asm/uaccess.h>
44#include <asm/ucc.h>
45
46#include "gianfar.h"
47#include "fsl_pq_mdio.h"
48
Anton Vorontsovb3319b12009-12-30 08:23:34 +000049struct fsl_pq_mdio_priv {
50 void __iomem *map;
51 struct fsl_pq_mdio __iomem *regs;
52};
53
Andy Fleming1577ece2009-02-04 16:42:12 -080054/*
55 * Write value to the PHY at mii_id at register regnum,
56 * on the bus attached to the local interface, which may be different from the
57 * generic mdio bus (tied to a single interface), waiting until the write is
58 * done before returning. This is helpful in programming interfaces like
59 * the TBI which control interfaces like onchip SERDES and are always tied to
60 * the local mdio pins, which may not be the same as system mdio bus, used for
61 * controlling the external PHYs, for example.
62 */
63int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id,
64 int regnum, u16 value)
65{
66 /* Set the PHY address and the register address we want to write */
67 out_be32(&regs->miimadd, (mii_id << 8) | regnum);
68
69 /* Write out the value we want */
70 out_be32(&regs->miimcon, value);
71
72 /* Wait for the transaction to finish */
73 while (in_be32(&regs->miimind) & MIIMIND_BUSY)
74 cpu_relax();
75
76 return 0;
77}
78
79/*
80 * Read the bus for PHY at addr mii_id, register regnum, and
81 * return the value. Clears miimcom first. All PHY operation
82 * done on the bus attached to the local interface,
83 * which may be different from the generic mdio bus
84 * This is helpful in programming interfaces like
85 * the TBI which, in turn, control interfaces like onchip SERDES
86 * and are always tied to the local mdio pins, which may not be the
87 * same as system mdio bus, used for controlling the external PHYs, for eg.
88 */
89int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs,
90 int mii_id, int regnum)
91{
92 u16 value;
93
94 /* Set the PHY address and the register address we want to read */
95 out_be32(&regs->miimadd, (mii_id << 8) | regnum);
96
97 /* Clear miimcom, and then initiate a read */
98 out_be32(&regs->miimcom, 0);
99 out_be32(&regs->miimcom, MII_READ_COMMAND);
100
101 /* Wait for the transaction to finish */
102 while (in_be32(&regs->miimind) & (MIIMIND_NOTVALID | MIIMIND_BUSY))
103 cpu_relax();
104
105 /* Grab the value of the register from miimstat */
106 value = in_be32(&regs->miimstat);
107
108 return value;
109}
110
Anton Vorontsov6748f602009-11-04 12:52:57 +0000111static struct fsl_pq_mdio __iomem *fsl_pq_mdio_get_regs(struct mii_bus *bus)
112{
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000113 struct fsl_pq_mdio_priv *priv = bus->priv;
114
115 return priv->regs;
Anton Vorontsov6748f602009-11-04 12:52:57 +0000116}
117
Andy Fleming1577ece2009-02-04 16:42:12 -0800118/*
119 * Write value to the PHY at mii_id at register regnum,
120 * on the bus, waiting until the write is done before returning.
121 */
122int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value)
123{
Anton Vorontsov6748f602009-11-04 12:52:57 +0000124 struct fsl_pq_mdio __iomem *regs = fsl_pq_mdio_get_regs(bus);
Andy Fleming1577ece2009-02-04 16:42:12 -0800125
126 /* Write to the local MII regs */
127 return(fsl_pq_local_mdio_write(regs, mii_id, regnum, value));
128}
129
130/*
131 * Read the bus for PHY at addr mii_id, register regnum, and
132 * return the value. Clears miimcom first.
133 */
134int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
135{
Anton Vorontsov6748f602009-11-04 12:52:57 +0000136 struct fsl_pq_mdio __iomem *regs = fsl_pq_mdio_get_regs(bus);
Andy Fleming1577ece2009-02-04 16:42:12 -0800137
138 /* Read the local MII regs */
139 return(fsl_pq_local_mdio_read(regs, mii_id, regnum));
140}
141
142/* Reset the MIIM registers, and wait for the bus to free */
143static int fsl_pq_mdio_reset(struct mii_bus *bus)
144{
Anton Vorontsov6748f602009-11-04 12:52:57 +0000145 struct fsl_pq_mdio __iomem *regs = fsl_pq_mdio_get_regs(bus);
David S. Miller508827f2009-03-05 02:06:47 -0800146 int timeout = PHY_INIT_TIMEOUT;
Andy Fleming1577ece2009-02-04 16:42:12 -0800147
148 mutex_lock(&bus->mdio_lock);
149
150 /* Reset the management interface */
151 out_be32(&regs->miimcfg, MIIMCFG_RESET);
152
153 /* Setup the MII Mgmt clock speed */
154 out_be32(&regs->miimcfg, MIIMCFG_INIT_VALUE);
155
156 /* Wait until the bus is free */
157 while ((in_be32(&regs->miimind) & MIIMIND_BUSY) && timeout--)
158 cpu_relax();
159
160 mutex_unlock(&bus->mdio_lock);
161
David S. Miller508827f2009-03-05 02:06:47 -0800162 if (timeout < 0) {
Andy Fleming1577ece2009-02-04 16:42:12 -0800163 printk(KERN_ERR "%s: The MII Bus is stuck!\n",
164 bus->name);
165 return -EBUSY;
166 }
167
168 return 0;
169}
170
Andy Fleming1577ece2009-02-04 16:42:12 -0800171void fsl_pq_mdio_bus_name(char *name, struct device_node *np)
172{
Anton Vorontsov18f27382009-03-19 06:48:08 +0000173 const u32 *addr;
174 u64 taddr = OF_BAD_ADDR;
Andy Fleming1577ece2009-02-04 16:42:12 -0800175
Anton Vorontsov18f27382009-03-19 06:48:08 +0000176 addr = of_get_address(np, 0, NULL, NULL);
177 if (addr)
178 taddr = of_translate_address(np, addr);
Andy Fleming1577ece2009-02-04 16:42:12 -0800179
Anton Vorontsov18f27382009-03-19 06:48:08 +0000180 snprintf(name, MII_BUS_ID_SIZE, "%s@%llx", np->name,
181 (unsigned long long)taddr);
Andy Fleming1577ece2009-02-04 16:42:12 -0800182}
Segher Boessenkoolb6bc9782009-04-02 13:57:30 -0700183EXPORT_SYMBOL_GPL(fsl_pq_mdio_bus_name);
Andy Fleming1577ece2009-02-04 16:42:12 -0800184
185/* Scan the bus in reverse, looking for an empty spot */
186static int fsl_pq_mdio_find_free(struct mii_bus *new_bus)
187{
188 int i;
189
190 for (i = PHY_MAX_ADDR; i > 0; i--) {
191 u32 phy_id;
192
193 if (get_phy_id(new_bus, i, &phy_id))
194 return -1;
195
196 if (phy_id == 0xffffffff)
197 break;
198 }
199
200 return i;
201}
202
203
Ionut Nicue2a61fa2009-06-24 22:23:39 +0000204#if defined(CONFIG_GIANFAR) || defined(CONFIG_GIANFAR_MODULE)
Sandeep Gopalpet1d2397d2009-11-02 07:03:22 +0000205static u32 __iomem *get_gfar_tbipa(struct fsl_pq_mdio __iomem *regs, struct device_node *np)
Andy Fleming1577ece2009-02-04 16:42:12 -0800206{
207 struct gfar __iomem *enet_regs;
208
209 /*
210 * This is mildly evil, but so is our hardware for doing this.
211 * Also, we have to cast back to struct gfar because of
212 * definition weirdness done in gianfar.h.
213 */
Sandeep Gopalpet1d2397d2009-11-02 07:03:22 +0000214 if(of_device_is_compatible(np, "fsl,gianfar-mdio") ||
215 of_device_is_compatible(np, "fsl,gianfar-tbi") ||
216 of_device_is_compatible(np, "gianfar")) {
217 enet_regs = (struct gfar __iomem *)regs;
218 return &enet_regs->tbipa;
219 } else if (of_device_is_compatible(np, "fsl,etsec2-mdio") ||
220 of_device_is_compatible(np, "fsl,etsec2-tbi")) {
Anton Vorontsov3b1fd3e2010-04-23 07:12:35 +0000221 return of_iomap(np, 1);
Sandeep Gopalpet1d2397d2009-11-02 07:03:22 +0000222 } else
223 return NULL;
Andy Fleming1577ece2009-02-04 16:42:12 -0800224}
225#endif
226
227
Ionut Nicue2a61fa2009-06-24 22:23:39 +0000228#if defined(CONFIG_UCC_GETH) || defined(CONFIG_UCC_GETH_MODULE)
Andy Fleming1577ece2009-02-04 16:42:12 -0800229static int get_ucc_id_for_range(u64 start, u64 end, u32 *ucc_id)
230{
231 struct device_node *np = NULL;
232 int err = 0;
233
234 for_each_compatible_node(np, NULL, "ucc_geth") {
235 struct resource tempres;
236
237 err = of_address_to_resource(np, 0, &tempres);
238 if (err)
239 continue;
240
241 /* if our mdio regs fall within this UCC regs range */
242 if ((start >= tempres.start) && (end <= tempres.end)) {
243 /* Find the id of the UCC */
244 const u32 *id;
245
246 id = of_get_property(np, "cell-index", NULL);
247 if (!id) {
248 id = of_get_property(np, "device-id", NULL);
249 if (!id)
250 continue;
251 }
252
253 *ucc_id = *id;
254
255 return 0;
256 }
257 }
258
259 if (err)
260 return err;
261 else
262 return -EINVAL;
263}
264#endif
265
266
267static int fsl_pq_mdio_probe(struct of_device *ofdev,
268 const struct of_device_id *match)
269{
270 struct device_node *np = ofdev->node;
271 struct device_node *tbi;
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000272 struct fsl_pq_mdio_priv *priv;
Sandeep Gopalpet1d2397d2009-11-02 07:03:22 +0000273 struct fsl_pq_mdio __iomem *regs = NULL;
Anton Vorontsov2951d642009-11-04 12:52:56 +0000274 void __iomem *map;
Andy Fleming1577ece2009-02-04 16:42:12 -0800275 u32 __iomem *tbipa;
276 struct mii_bus *new_bus;
277 int tbiaddr = -1;
Anton Vorontsov3b1fd3e2010-04-23 07:12:35 +0000278 const u32 *addrp;
Anton Vorontsov2951d642009-11-04 12:52:56 +0000279 u64 addr = 0, size = 0;
Andy Fleming1577ece2009-02-04 16:42:12 -0800280 int err = 0;
281
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000282 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
283 if (!priv)
284 return -ENOMEM;
285
Andy Fleming1577ece2009-02-04 16:42:12 -0800286 new_bus = mdiobus_alloc();
287 if (NULL == new_bus)
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000288 goto err_free_priv;
Andy Fleming1577ece2009-02-04 16:42:12 -0800289
290 new_bus->name = "Freescale PowerQUICC MII Bus",
291 new_bus->read = &fsl_pq_mdio_read,
292 new_bus->write = &fsl_pq_mdio_write,
293 new_bus->reset = &fsl_pq_mdio_reset,
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000294 new_bus->priv = priv;
Andy Fleming1577ece2009-02-04 16:42:12 -0800295 fsl_pq_mdio_bus_name(new_bus->id, np);
296
Anton Vorontsov3b1fd3e2010-04-23 07:12:35 +0000297 addrp = of_get_address(np, 0, &size, NULL);
298 if (!addrp) {
299 err = -EINVAL;
300 goto err_free_bus;
301 }
302
Andy Fleming1577ece2009-02-04 16:42:12 -0800303 /* Set the PHY base address */
Anton Vorontsov3b1fd3e2010-04-23 07:12:35 +0000304 addr = of_translate_address(np, addrp);
305 if (addr == OF_BAD_ADDR) {
306 err = -EINVAL;
307 goto err_free_bus;
308 }
309
Anton Vorontsov2951d642009-11-04 12:52:56 +0000310 map = ioremap(addr, size);
311 if (!map) {
Andy Fleming1577ece2009-02-04 16:42:12 -0800312 err = -ENOMEM;
313 goto err_free_bus;
314 }
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000315 priv->map = map;
Andy Fleming1577ece2009-02-04 16:42:12 -0800316
Anton Vorontsov2951d642009-11-04 12:52:56 +0000317 if (of_device_is_compatible(np, "fsl,gianfar-mdio") ||
318 of_device_is_compatible(np, "fsl,gianfar-tbi") ||
319 of_device_is_compatible(np, "fsl,ucc-mdio") ||
320 of_device_is_compatible(np, "ucc_geth_phy"))
321 map -= offsetof(struct fsl_pq_mdio, miimcfg);
322 regs = map;
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000323 priv->regs = regs;
Andy Fleming1577ece2009-02-04 16:42:12 -0800324
Grant Likely324931b2009-04-25 12:53:07 +0000325 new_bus->irq = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL);
Andy Fleming1577ece2009-02-04 16:42:12 -0800326
327 if (NULL == new_bus->irq) {
328 err = -ENOMEM;
329 goto err_unmap_regs;
330 }
331
332 new_bus->parent = &ofdev->dev;
333 dev_set_drvdata(&ofdev->dev, new_bus);
334
335 if (of_device_is_compatible(np, "fsl,gianfar-mdio") ||
Anton Vorontsov30196842009-03-21 13:30:05 -0700336 of_device_is_compatible(np, "fsl,gianfar-tbi") ||
Sandeep Gopalpet1d2397d2009-11-02 07:03:22 +0000337 of_device_is_compatible(np, "fsl,etsec2-mdio") ||
338 of_device_is_compatible(np, "fsl,etsec2-tbi") ||
Andy Fleming1577ece2009-02-04 16:42:12 -0800339 of_device_is_compatible(np, "gianfar")) {
Ionut Nicue2a61fa2009-06-24 22:23:39 +0000340#if defined(CONFIG_GIANFAR) || defined(CONFIG_GIANFAR_MODULE)
Sandeep Gopalpet1d2397d2009-11-02 07:03:22 +0000341 tbipa = get_gfar_tbipa(regs, np);
342 if (!tbipa) {
343 err = -EINVAL;
344 goto err_free_irqs;
345 }
Andy Fleming1577ece2009-02-04 16:42:12 -0800346#else
347 err = -ENODEV;
348 goto err_free_irqs;
349#endif
350 } else if (of_device_is_compatible(np, "fsl,ucc-mdio") ||
351 of_device_is_compatible(np, "ucc_geth_phy")) {
Ionut Nicue2a61fa2009-06-24 22:23:39 +0000352#if defined(CONFIG_UCC_GETH) || defined(CONFIG_UCC_GETH_MODULE)
Andy Fleming1577ece2009-02-04 16:42:12 -0800353 u32 id;
Haiying Wangfbcc0e22009-06-02 04:04:14 +0000354 static u32 mii_mng_master;
Andy Fleming1577ece2009-02-04 16:42:12 -0800355
356 tbipa = &regs->utbipar;
357
358 if ((err = get_ucc_id_for_range(addr, addr + size, &id)))
359 goto err_free_irqs;
360
Haiying Wangfbcc0e22009-06-02 04:04:14 +0000361 if (!mii_mng_master) {
362 mii_mng_master = id;
363 ucc_set_qe_mux_mii_mng(id - 1);
364 }
Andy Fleming1577ece2009-02-04 16:42:12 -0800365#else
366 err = -ENODEV;
367 goto err_free_irqs;
368#endif
369 } else {
370 err = -ENODEV;
371 goto err_free_irqs;
372 }
373
374 for_each_child_of_node(np, tbi) {
375 if (!strncmp(tbi->type, "tbi-phy", 8))
376 break;
377 }
378
379 if (tbi) {
380 const u32 *prop = of_get_property(tbi, "reg", NULL);
381
382 if (prop)
383 tbiaddr = *prop;
384 }
385
386 if (tbiaddr == -1) {
387 out_be32(tbipa, 0);
388
389 tbiaddr = fsl_pq_mdio_find_free(new_bus);
390 }
391
392 /*
393 * We define TBIPA at 0 to be illegal, opting to fail for boards that
394 * have PHYs at 1-31, rather than change tbipa and rescan.
395 */
396 if (tbiaddr == 0) {
397 err = -EBUSY;
398
399 goto err_free_irqs;
400 }
401
402 out_be32(tbipa, tbiaddr);
403
Grant Likely324931b2009-04-25 12:53:07 +0000404 err = of_mdiobus_register(new_bus, np);
Andy Fleming1577ece2009-02-04 16:42:12 -0800405 if (err) {
406 printk (KERN_ERR "%s: Cannot register as MDIO bus\n",
407 new_bus->name);
408 goto err_free_irqs;
409 }
410
411 return 0;
412
413err_free_irqs:
414 kfree(new_bus->irq);
415err_unmap_regs:
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000416 iounmap(priv->map);
Andy Fleming1577ece2009-02-04 16:42:12 -0800417err_free_bus:
418 kfree(new_bus);
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000419err_free_priv:
420 kfree(priv);
Andy Fleming1577ece2009-02-04 16:42:12 -0800421 return err;
422}
423
424
425static int fsl_pq_mdio_remove(struct of_device *ofdev)
426{
427 struct device *device = &ofdev->dev;
428 struct mii_bus *bus = dev_get_drvdata(device);
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000429 struct fsl_pq_mdio_priv *priv = bus->priv;
Andy Fleming1577ece2009-02-04 16:42:12 -0800430
431 mdiobus_unregister(bus);
432
433 dev_set_drvdata(device, NULL);
434
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000435 iounmap(priv->map);
Andy Fleming1577ece2009-02-04 16:42:12 -0800436 bus->priv = NULL;
437 mdiobus_free(bus);
Anton Vorontsovb3319b12009-12-30 08:23:34 +0000438 kfree(priv);
Andy Fleming1577ece2009-02-04 16:42:12 -0800439
440 return 0;
441}
442
443static struct of_device_id fsl_pq_mdio_match[] = {
444 {
445 .type = "mdio",
446 .compatible = "ucc_geth_phy",
447 },
448 {
449 .type = "mdio",
450 .compatible = "gianfar",
451 },
452 {
453 .compatible = "fsl,ucc-mdio",
454 },
455 {
456 .compatible = "fsl,gianfar-tbi",
457 },
458 {
459 .compatible = "fsl,gianfar-mdio",
460 },
Sandeep Gopalpet1d2397d2009-11-02 07:03:22 +0000461 {
462 .compatible = "fsl,etsec2-tbi",
463 },
464 {
465 .compatible = "fsl,etsec2-mdio",
466 },
Andy Fleming1577ece2009-02-04 16:42:12 -0800467 {},
468};
Anton Vorontsove72701a2009-10-14 14:54:52 -0700469MODULE_DEVICE_TABLE(of, fsl_pq_mdio_match);
Andy Fleming1577ece2009-02-04 16:42:12 -0800470
471static struct of_platform_driver fsl_pq_mdio_driver = {
472 .name = "fsl-pq_mdio",
473 .probe = fsl_pq_mdio_probe,
474 .remove = fsl_pq_mdio_remove,
475 .match_table = fsl_pq_mdio_match,
476};
477
478int __init fsl_pq_mdio_init(void)
479{
480 return of_register_platform_driver(&fsl_pq_mdio_driver);
481}
Grant Likely434e7b0d2009-04-25 12:53:44 +0000482module_init(fsl_pq_mdio_init);
Andy Fleming1577ece2009-02-04 16:42:12 -0800483
484void fsl_pq_mdio_exit(void)
485{
486 of_unregister_platform_driver(&fsl_pq_mdio_driver);
487}
Andy Fleming1577ece2009-02-04 16:42:12 -0800488module_exit(fsl_pq_mdio_exit);
Sebastian Siewior26062892009-11-06 08:50:28 +0000489MODULE_LICENSE("GPL");