| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * ATI PCI IDs from XFree86, kept here to make sync'ing with |
| 3 | * XFree much simpler. Currently, this list is only used by |
| 4 | * radeonfb |
| 5 | */ |
| 6 | |
| 7 | #define PCI_CHIP_RV380_3150 0x3150 |
| 8 | #define PCI_CHIP_RV380_3151 0x3151 |
| 9 | #define PCI_CHIP_RV380_3152 0x3152 |
| 10 | #define PCI_CHIP_RV380_3153 0x3153 |
| 11 | #define PCI_CHIP_RV380_3154 0x3154 |
| 12 | #define PCI_CHIP_RV380_3156 0x3156 |
| 13 | #define PCI_CHIP_RV380_3E50 0x3E50 |
| 14 | #define PCI_CHIP_RV380_3E51 0x3E51 |
| 15 | #define PCI_CHIP_RV380_3E52 0x3E52 |
| 16 | #define PCI_CHIP_RV380_3E53 0x3E53 |
| 17 | #define PCI_CHIP_RV380_3E54 0x3E54 |
| 18 | #define PCI_CHIP_RV380_3E56 0x3E56 |
| 19 | #define PCI_CHIP_RS100_4136 0x4136 |
| 20 | #define PCI_CHIP_RS200_4137 0x4137 |
| 21 | #define PCI_CHIP_R300_AD 0x4144 |
| 22 | #define PCI_CHIP_R300_AE 0x4145 |
| 23 | #define PCI_CHIP_R300_AF 0x4146 |
| 24 | #define PCI_CHIP_R300_AG 0x4147 |
| 25 | #define PCI_CHIP_R350_AH 0x4148 |
| 26 | #define PCI_CHIP_R350_AI 0x4149 |
| 27 | #define PCI_CHIP_R350_AJ 0x414A |
| 28 | #define PCI_CHIP_R350_AK 0x414B |
| 29 | #define PCI_CHIP_RV350_AP 0x4150 |
| 30 | #define PCI_CHIP_RV350_AQ 0x4151 |
| 31 | #define PCI_CHIP_RV360_AR 0x4152 |
| 32 | #define PCI_CHIP_RV350_AS 0x4153 |
| 33 | #define PCI_CHIP_RV350_AT 0x4154 |
| 34 | #define PCI_CHIP_RV350_AV 0x4156 |
| 35 | #define PCI_CHIP_MACH32 0x4158 |
| 36 | #define PCI_CHIP_RS250_4237 0x4237 |
| 37 | #define PCI_CHIP_R200_BB 0x4242 |
| 38 | #define PCI_CHIP_R200_BC 0x4243 |
| 39 | #define PCI_CHIP_RS100_4336 0x4336 |
| 40 | #define PCI_CHIP_RS200_4337 0x4337 |
| 41 | #define PCI_CHIP_MACH64CT 0x4354 |
| 42 | #define PCI_CHIP_MACH64CX 0x4358 |
| 43 | #define PCI_CHIP_RS250_4437 0x4437 |
| 44 | #define PCI_CHIP_MACH64ET 0x4554 |
| 45 | #define PCI_CHIP_MACH64GB 0x4742 |
| 46 | #define PCI_CHIP_MACH64GD 0x4744 |
| 47 | #define PCI_CHIP_MACH64GI 0x4749 |
| 48 | #define PCI_CHIP_MACH64GL 0x474C |
| 49 | #define PCI_CHIP_MACH64GM 0x474D |
| 50 | #define PCI_CHIP_MACH64GN 0x474E |
| 51 | #define PCI_CHIP_MACH64GO 0x474F |
| 52 | #define PCI_CHIP_MACH64GP 0x4750 |
| 53 | #define PCI_CHIP_MACH64GQ 0x4751 |
| 54 | #define PCI_CHIP_MACH64GR 0x4752 |
| 55 | #define PCI_CHIP_MACH64GS 0x4753 |
| 56 | #define PCI_CHIP_MACH64GT 0x4754 |
| 57 | #define PCI_CHIP_MACH64GU 0x4755 |
| 58 | #define PCI_CHIP_MACH64GV 0x4756 |
| 59 | #define PCI_CHIP_MACH64GW 0x4757 |
| 60 | #define PCI_CHIP_MACH64GX 0x4758 |
| 61 | #define PCI_CHIP_MACH64GY 0x4759 |
| 62 | #define PCI_CHIP_MACH64GZ 0x475A |
| 63 | #define PCI_CHIP_RV250_Id 0x4964 |
| 64 | #define PCI_CHIP_RV250_Ie 0x4965 |
| 65 | #define PCI_CHIP_RV250_If 0x4966 |
| 66 | #define PCI_CHIP_RV250_Ig 0x4967 |
| 67 | #define PCI_CHIP_R420_JH 0x4A48 |
| 68 | #define PCI_CHIP_R420_JI 0x4A49 |
| 69 | #define PCI_CHIP_R420_JJ 0x4A4A |
| 70 | #define PCI_CHIP_R420_JK 0x4A4B |
| 71 | #define PCI_CHIP_R420_JL 0x4A4C |
| 72 | #define PCI_CHIP_R420_JM 0x4A4D |
| 73 | #define PCI_CHIP_R420_JN 0x4A4E |
| 74 | #define PCI_CHIP_R420_JP 0x4A50 |
| 75 | #define PCI_CHIP_MACH64LB 0x4C42 |
| 76 | #define PCI_CHIP_MACH64LD 0x4C44 |
| 77 | #define PCI_CHIP_RAGE128LE 0x4C45 |
| 78 | #define PCI_CHIP_RAGE128LF 0x4C46 |
| 79 | #define PCI_CHIP_MACH64LG 0x4C47 |
| 80 | #define PCI_CHIP_MACH64LI 0x4C49 |
| 81 | #define PCI_CHIP_MACH64LM 0x4C4D |
| 82 | #define PCI_CHIP_MACH64LN 0x4C4E |
| 83 | #define PCI_CHIP_MACH64LP 0x4C50 |
| 84 | #define PCI_CHIP_MACH64LQ 0x4C51 |
| 85 | #define PCI_CHIP_MACH64LR 0x4C52 |
| 86 | #define PCI_CHIP_MACH64LS 0x4C53 |
| 87 | #define PCI_CHIP_MACH64LT 0x4C54 |
| 88 | #define PCI_CHIP_RADEON_LW 0x4C57 |
| 89 | #define PCI_CHIP_RADEON_LX 0x4C58 |
| 90 | #define PCI_CHIP_RADEON_LY 0x4C59 |
| 91 | #define PCI_CHIP_RADEON_LZ 0x4C5A |
| 92 | #define PCI_CHIP_RV250_Ld 0x4C64 |
| 93 | #define PCI_CHIP_RV250_Le 0x4C65 |
| 94 | #define PCI_CHIP_RV250_Lf 0x4C66 |
| 95 | #define PCI_CHIP_RV250_Lg 0x4C67 |
| 96 | #define PCI_CHIP_RV250_Ln 0x4C6E |
| 97 | #define PCI_CHIP_RAGE128MF 0x4D46 |
| 98 | #define PCI_CHIP_RAGE128ML 0x4D4C |
| 99 | #define PCI_CHIP_R300_ND 0x4E44 |
| 100 | #define PCI_CHIP_R300_NE 0x4E45 |
| 101 | #define PCI_CHIP_R300_NF 0x4E46 |
| 102 | #define PCI_CHIP_R300_NG 0x4E47 |
| 103 | #define PCI_CHIP_R350_NH 0x4E48 |
| 104 | #define PCI_CHIP_R350_NI 0x4E49 |
| 105 | #define PCI_CHIP_R360_NJ 0x4E4A |
| 106 | #define PCI_CHIP_R350_NK 0x4E4B |
| 107 | #define PCI_CHIP_RV350_NP 0x4E50 |
| 108 | #define PCI_CHIP_RV350_NQ 0x4E51 |
| 109 | #define PCI_CHIP_RV350_NR 0x4E52 |
| 110 | #define PCI_CHIP_RV350_NS 0x4E53 |
| 111 | #define PCI_CHIP_RV350_NT 0x4E54 |
| 112 | #define PCI_CHIP_RV350_NV 0x4E56 |
| 113 | #define PCI_CHIP_RAGE128PA 0x5041 |
| 114 | #define PCI_CHIP_RAGE128PB 0x5042 |
| 115 | #define PCI_CHIP_RAGE128PC 0x5043 |
| 116 | #define PCI_CHIP_RAGE128PD 0x5044 |
| 117 | #define PCI_CHIP_RAGE128PE 0x5045 |
| 118 | #define PCI_CHIP_RAGE128PF 0x5046 |
| 119 | #define PCI_CHIP_RAGE128PG 0x5047 |
| 120 | #define PCI_CHIP_RAGE128PH 0x5048 |
| 121 | #define PCI_CHIP_RAGE128PI 0x5049 |
| 122 | #define PCI_CHIP_RAGE128PJ 0x504A |
| 123 | #define PCI_CHIP_RAGE128PK 0x504B |
| 124 | #define PCI_CHIP_RAGE128PL 0x504C |
| 125 | #define PCI_CHIP_RAGE128PM 0x504D |
| 126 | #define PCI_CHIP_RAGE128PN 0x504E |
| 127 | #define PCI_CHIP_RAGE128PO 0x504F |
| 128 | #define PCI_CHIP_RAGE128PP 0x5050 |
| 129 | #define PCI_CHIP_RAGE128PQ 0x5051 |
| 130 | #define PCI_CHIP_RAGE128PR 0x5052 |
| 131 | #define PCI_CHIP_RAGE128PS 0x5053 |
| 132 | #define PCI_CHIP_RAGE128PT 0x5054 |
| 133 | #define PCI_CHIP_RAGE128PU 0x5055 |
| 134 | #define PCI_CHIP_RAGE128PV 0x5056 |
| 135 | #define PCI_CHIP_RAGE128PW 0x5057 |
| 136 | #define PCI_CHIP_RAGE128PX 0x5058 |
| 137 | #define PCI_CHIP_RADEON_QD 0x5144 |
| 138 | #define PCI_CHIP_RADEON_QE 0x5145 |
| 139 | #define PCI_CHIP_RADEON_QF 0x5146 |
| 140 | #define PCI_CHIP_RADEON_QG 0x5147 |
| 141 | #define PCI_CHIP_R200_QH 0x5148 |
| 142 | #define PCI_CHIP_R200_QI 0x5149 |
| 143 | #define PCI_CHIP_R200_QJ 0x514A |
| 144 | #define PCI_CHIP_R200_QK 0x514B |
| 145 | #define PCI_CHIP_R200_QL 0x514C |
| 146 | #define PCI_CHIP_R200_QM 0x514D |
| 147 | #define PCI_CHIP_R200_QN 0x514E |
| 148 | #define PCI_CHIP_R200_QO 0x514F |
| 149 | #define PCI_CHIP_RV200_QW 0x5157 |
| 150 | #define PCI_CHIP_RV200_QX 0x5158 |
| 151 | #define PCI_CHIP_RV100_QY 0x5159 |
| 152 | #define PCI_CHIP_RV100_QZ 0x515A |
| Jake Moilanen | 183dee0 | 2005-11-07 01:00:55 -0800 | [diff] [blame] | 153 | #define PCI_CHIP_RN50 0x515E |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | #define PCI_CHIP_RAGE128RE 0x5245 |
| 155 | #define PCI_CHIP_RAGE128RF 0x5246 |
| 156 | #define PCI_CHIP_RAGE128RG 0x5247 |
| 157 | #define PCI_CHIP_RAGE128RK 0x524B |
| 158 | #define PCI_CHIP_RAGE128RL 0x524C |
| 159 | #define PCI_CHIP_RAGE128SE 0x5345 |
| 160 | #define PCI_CHIP_RAGE128SF 0x5346 |
| 161 | #define PCI_CHIP_RAGE128SG 0x5347 |
| 162 | #define PCI_CHIP_RAGE128SH 0x5348 |
| 163 | #define PCI_CHIP_RAGE128SK 0x534B |
| 164 | #define PCI_CHIP_RAGE128SL 0x534C |
| 165 | #define PCI_CHIP_RAGE128SM 0x534D |
| 166 | #define PCI_CHIP_RAGE128SN 0x534E |
| 167 | #define PCI_CHIP_RAGE128TF 0x5446 |
| 168 | #define PCI_CHIP_RAGE128TL 0x544C |
| 169 | #define PCI_CHIP_RAGE128TR 0x5452 |
| 170 | #define PCI_CHIP_RAGE128TS 0x5453 |
| 171 | #define PCI_CHIP_RAGE128TT 0x5454 |
| 172 | #define PCI_CHIP_RAGE128TU 0x5455 |
| 173 | #define PCI_CHIP_RV370_5460 0x5460 |
| 174 | #define PCI_CHIP_RV370_5461 0x5461 |
| 175 | #define PCI_CHIP_RV370_5462 0x5462 |
| 176 | #define PCI_CHIP_RV370_5463 0x5463 |
| 177 | #define PCI_CHIP_RV370_5464 0x5464 |
| 178 | #define PCI_CHIP_RV370_5465 0x5465 |
| 179 | #define PCI_CHIP_RV370_5466 0x5466 |
| 180 | #define PCI_CHIP_RV370_5467 0x5467 |
| 181 | #define PCI_CHIP_R423_UH 0x5548 |
| 182 | #define PCI_CHIP_R423_UI 0x5549 |
| 183 | #define PCI_CHIP_R423_UJ 0x554A |
| 184 | #define PCI_CHIP_R423_UK 0x554B |
| 185 | #define PCI_CHIP_R423_UQ 0x5551 |
| 186 | #define PCI_CHIP_R423_UR 0x5552 |
| 187 | #define PCI_CHIP_R423_UT 0x5554 |
| 188 | #define PCI_CHIP_MACH64VT 0x5654 |
| 189 | #define PCI_CHIP_MACH64VU 0x5655 |
| 190 | #define PCI_CHIP_MACH64VV 0x5656 |
| Sellout Bessie | 0b693ea | 2007-10-16 01:29:30 -0700 | [diff] [blame] | 191 | #define PCI_CHIP_RC410_5A62 0x5A62 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 192 | #define PCI_CHIP_RS300_5834 0x5834 |
| 193 | #define PCI_CHIP_RS300_5835 0x5835 |
| 194 | #define PCI_CHIP_RS300_5836 0x5836 |
| 195 | #define PCI_CHIP_RS300_5837 0x5837 |
| aherrman@arcor.de | 106c4a9 | 2007-09-11 20:37:37 +0200 | [diff] [blame] | 196 | #define PCI_CHIP_RS480_5955 0x5955 |
| 197 | #define PCI_CHIP_RV280_5960 0x5960 |
| 198 | #define PCI_CHIP_RV280_5961 0x5961 |
| 199 | #define PCI_CHIP_RV280_5962 0x5962 |
| 200 | #define PCI_CHIP_RV280_5964 0x5964 |
| 201 | #define PCI_CHIP_RS482_5975 0x5975 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | #define PCI_CHIP_RV370_5B60 0x5B60 |
| 203 | #define PCI_CHIP_RV370_5B61 0x5B61 |
| 204 | #define PCI_CHIP_RV370_5B62 0x5B62 |
| 205 | #define PCI_CHIP_RV370_5B63 0x5B63 |
| 206 | #define PCI_CHIP_RV370_5B64 0x5B64 |
| 207 | #define PCI_CHIP_RV370_5B65 0x5B65 |
| 208 | #define PCI_CHIP_RV370_5B66 0x5B66 |
| 209 | #define PCI_CHIP_RV370_5B67 0x5B67 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | #define PCI_CHIP_RV280_5C61 0x5C61 |
| 211 | #define PCI_CHIP_RV280_5C63 0x5C63 |
| 212 | #define PCI_CHIP_R423_5D57 0x5D57 |
| 213 | #define PCI_CHIP_RS350_7834 0x7834 |
| 214 | #define PCI_CHIP_RS350_7835 0x7835 |