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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_PROCESSOR_H
2#define _ASM_X86_PROCESSOR_H
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +01003
Glauber de Oliveira Costa053de042008-01-30 13:31:27 +01004#include <asm/processor-flags.h>
5
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +01006/* Forward declaration, a strange C thing */
7struct task_struct;
8struct mm_struct;
9
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010010#include <asm/vm86.h>
11#include <asm/math_emu.h>
12#include <asm/segment.h>
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010013#include <asm/types.h>
14#include <asm/sigcontext.h>
15#include <asm/current.h>
16#include <asm/cpufeature.h>
17#include <asm/system.h>
Glauber de Oliveira Costac72dcf82008-01-30 13:31:27 +010018#include <asm/page.h>
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +010019#include <asm/percpu.h>
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010020#include <asm/msr.h>
21#include <asm/desc_defs.h>
Andi Kleenbd616432008-01-30 13:32:38 +010022#include <asm/nops.h>
Markus Metzger93fa7632008-04-08 11:01:58 +020023#include <asm/ds.h>
Ingo Molnar4d46a892008-02-21 04:24:40 +010024
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010025#include <linux/personality.h>
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010026#include <linux/cpumask.h>
27#include <linux/cache.h>
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010028#include <linux/threads.h>
29#include <linux/init.h>
Glauber de Oliveira Costac72dcf82008-01-30 13:31:27 +010030
Glauber de Oliveira Costa0ccb8ac2008-01-30 13:31:27 +010031/*
32 * Default implementation of macro that returns current
33 * instruction pointer ("program counter").
34 */
35static inline void *current_text_addr(void)
36{
37 void *pc;
Ingo Molnar4d46a892008-02-21 04:24:40 +010038
39 asm volatile("mov $1f, %0; 1:":"=r" (pc));
40
Glauber de Oliveira Costa0ccb8ac2008-01-30 13:31:27 +010041 return pc;
42}
43
Glauber de Oliveira Costadbcb4662008-01-30 13:31:31 +010044#ifdef CONFIG_X86_VSMP
Ingo Molnar4d46a892008-02-21 04:24:40 +010045# define ARCH_MIN_TASKALIGN (1 << INTERNODE_CACHE_SHIFT)
46# define ARCH_MIN_MMSTRUCT_ALIGN (1 << INTERNODE_CACHE_SHIFT)
Glauber de Oliveira Costadbcb4662008-01-30 13:31:31 +010047#else
Ingo Molnar4d46a892008-02-21 04:24:40 +010048# define ARCH_MIN_TASKALIGN 16
49# define ARCH_MIN_MMSTRUCT_ALIGN 0
Glauber de Oliveira Costadbcb4662008-01-30 13:31:31 +010050#endif
51
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010052/*
53 * CPU type and hardware bug flags. Kept separately for each CPU.
54 * Members of this structure are referenced in head.S, so think twice
55 * before touching them. [mj]
56 */
57
58struct cpuinfo_x86 {
Ingo Molnar4d46a892008-02-21 04:24:40 +010059 __u8 x86; /* CPU family */
60 __u8 x86_vendor; /* CPU vendor */
61 __u8 x86_model;
62 __u8 x86_mask;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010063#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +010064 char wp_works_ok; /* It doesn't on 386's */
65
66 /* Problems on some 486Dx4's and old 386's: */
67 char hlt_works_ok;
68 char hard_math;
69 char rfu;
70 char fdiv_bug;
71 char f00f_bug;
72 char coma_bug;
73 char pad0;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010074#else
Ingo Molnar4d46a892008-02-21 04:24:40 +010075 /* Number of 4K pages in DTLB/ITLB combined(in pages): */
76 int x86_tlbsize;
77 __u8 x86_virt_bits;
78 __u8 x86_phys_bits;
Yinghai Lu11fdd252008-09-07 17:58:50 -070079#endif
Ingo Molnar4d46a892008-02-21 04:24:40 +010080 /* CPUID returned core id bits: */
81 __u8 x86_coreid_bits;
82 /* Max extended CPUID function supported: */
83 __u32 extended_cpuid_level;
Ingo Molnar4d46a892008-02-21 04:24:40 +010084 /* Maximum supported CPUID level, -1=no CPUID: */
85 int cpuid_level;
86 __u32 x86_capability[NCAPINTS];
87 char x86_vendor_id[16];
88 char x86_model_id[64];
89 /* in KB - valid for CPUS which support this call: */
90 int x86_cache_size;
91 int x86_cache_alignment; /* In bytes */
92 int x86_power;
93 unsigned long loops_per_jiffy;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010094#ifdef CONFIG_SMP
Ingo Molnar4d46a892008-02-21 04:24:40 +010095 /* cpus sharing the last level cache: */
96 cpumask_t llc_shared_map;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010097#endif
Ingo Molnar4d46a892008-02-21 04:24:40 +010098 /* cpuid returned max cores value: */
99 u16 x86_max_cores;
100 u16 apicid;
Yinghai Lu01aaea12008-03-06 13:46:39 -0800101 u16 initial_apicid;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100102 u16 x86_clflush_size;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100103#ifdef CONFIG_SMP
Ingo Molnar4d46a892008-02-21 04:24:40 +0100104 /* number of cores as seen by the OS: */
105 u16 booted_cores;
106 /* Physical processor id: */
107 u16 phys_proc_id;
108 /* Core id: */
109 u16 cpu_core_id;
110 /* Index into per_cpu list: */
111 u16 cpu_index;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100112#endif
Alok Kataria88b094f2008-10-27 10:41:46 -0700113 unsigned int x86_hyper_vendor;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100114} __attribute__((__aligned__(SMP_CACHE_BYTES)));
115
Ingo Molnar4d46a892008-02-21 04:24:40 +0100116#define X86_VENDOR_INTEL 0
117#define X86_VENDOR_CYRIX 1
118#define X86_VENDOR_AMD 2
119#define X86_VENDOR_UMC 3
Ingo Molnar4d46a892008-02-21 04:24:40 +0100120#define X86_VENDOR_CENTAUR 5
121#define X86_VENDOR_TRANSMETA 7
122#define X86_VENDOR_NSC 8
123#define X86_VENDOR_NUM 9
124
125#define X86_VENDOR_UNKNOWN 0xff
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100126
Alok Kataria88b094f2008-10-27 10:41:46 -0700127#define X86_HYPER_VENDOR_NONE 0
128#define X86_HYPER_VENDOR_VMWARE 1
129
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100130/*
131 * capabilities of CPUs
132 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100133extern struct cpuinfo_x86 boot_cpu_data;
134extern struct cpuinfo_x86 new_cpu_data;
135
136extern struct tss_struct doublefault_tss;
137extern __u32 cleared_cpu_caps[NCAPINTS];
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100138
139#ifdef CONFIG_SMP
140DECLARE_PER_CPU(struct cpuinfo_x86, cpu_info);
141#define cpu_data(cpu) per_cpu(cpu_info, cpu)
Mike Travis94a1e862008-07-18 18:11:31 -0700142#define current_cpu_data __get_cpu_var(cpu_info)
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100143#else
144#define cpu_data(cpu) boot_cpu_data
145#define current_cpu_data boot_cpu_data
146#endif
147
Jaswinder Singh1c6c7272008-07-21 22:40:37 +0530148extern const struct seq_operations cpuinfo_op;
149
Glauber Costa3d3f4872008-03-03 14:12:48 -0300150static inline int hlt_works(int cpu)
151{
152#ifdef CONFIG_X86_32
153 return cpu_data(cpu).hlt_works_ok;
154#else
155 return 1;
156#endif
157}
158
Ingo Molnar4d46a892008-02-21 04:24:40 +0100159#define cache_line_size() (boot_cpu_data.x86_cache_alignment)
160
161extern void cpu_detect(struct cpuinfo_x86 *c);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100162
Jaswinder Singh8fd329a2008-07-21 22:54:56 +0530163extern struct pt_regs *idle_regs(struct pt_regs *);
164
Yinghai Luf5803662008-06-21 03:24:19 -0700165extern void early_cpu_init(void);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100166extern void identify_boot_cpu(void);
167extern void identify_secondary_cpu(struct cpuinfo_x86 *);
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100168extern void print_cpu_info(struct cpuinfo_x86 *);
169extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
170extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
171extern unsigned short num_cache_leaves;
172
Suresh Siddhabbb65d22008-08-23 17:47:10 +0200173extern void detect_extended_topology(struct cpuinfo_x86 *c);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100174extern void detect_ht(struct cpuinfo_x86 *c);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100175
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100176static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
Ingo Molnar4d46a892008-02-21 04:24:40 +0100177 unsigned int *ecx, unsigned int *edx)
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100178{
179 /* ecx is often an input as well as an output. */
Joe Perchescca2e6f2008-03-23 01:03:15 -0700180 asm("cpuid"
181 : "=a" (*eax),
182 "=b" (*ebx),
183 "=c" (*ecx),
184 "=d" (*edx)
185 : "0" (*eax), "2" (*ecx));
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100186}
187
Glauber de Oliveira Costac72dcf82008-01-30 13:31:27 +0100188static inline void load_cr3(pgd_t *pgdir)
189{
190 write_cr3(__pa(pgdir));
191}
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100192
Thomas Gleixner96a388d2007-10-11 11:20:03 +0200193#ifdef CONFIG_X86_32
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100194/* This is the TSS defined by the hardware. */
195struct x86_hw_tss {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100196 unsigned short back_link, __blh;
197 unsigned long sp0;
198 unsigned short ss0, __ss0h;
199 unsigned long sp1;
200 /* ss1 caches MSR_IA32_SYSENTER_CS: */
201 unsigned short ss1, __ss1h;
202 unsigned long sp2;
203 unsigned short ss2, __ss2h;
204 unsigned long __cr3;
205 unsigned long ip;
206 unsigned long flags;
207 unsigned long ax;
208 unsigned long cx;
209 unsigned long dx;
210 unsigned long bx;
211 unsigned long sp;
212 unsigned long bp;
213 unsigned long si;
214 unsigned long di;
215 unsigned short es, __esh;
216 unsigned short cs, __csh;
217 unsigned short ss, __ssh;
218 unsigned short ds, __dsh;
219 unsigned short fs, __fsh;
220 unsigned short gs, __gsh;
221 unsigned short ldt, __ldth;
222 unsigned short trace;
223 unsigned short io_bitmap_base;
224
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100225} __attribute__((packed));
226#else
227struct x86_hw_tss {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100228 u32 reserved1;
229 u64 sp0;
230 u64 sp1;
231 u64 sp2;
232 u64 reserved2;
233 u64 ist[7];
234 u32 reserved3;
235 u32 reserved4;
236 u16 reserved5;
237 u16 io_bitmap_base;
238
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100239} __attribute__((packed)) ____cacheline_aligned;
240#endif
241
242/*
Ingo Molnar4d46a892008-02-21 04:24:40 +0100243 * IO-bitmap sizes:
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100244 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100245#define IO_BITMAP_BITS 65536
246#define IO_BITMAP_BYTES (IO_BITMAP_BITS/8)
247#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
248#define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap)
249#define INVALID_IO_BITMAP_OFFSET 0x8000
250#define INVALID_IO_BITMAP_OFFSET_LAZY 0x9000
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100251
252struct tss_struct {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100253 /*
254 * The hardware state:
255 */
256 struct x86_hw_tss x86_tss;
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100257
258 /*
259 * The extra 1 is there because the CPU will access an
260 * additional byte beyond the end of the IO permission
261 * bitmap. The extra byte must be all 1 bits, and must
262 * be within the limit.
263 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100264 unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100265 /*
266 * Cache the current maximum and the last task that used the bitmap:
267 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100268 unsigned long io_bitmap_max;
269 struct thread_struct *io_bitmap_owner;
270
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100271 /*
Ingo Molnar4d46a892008-02-21 04:24:40 +0100272 * .. and then another 0x100 bytes for the emergency kernel stack:
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100273 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100274 unsigned long stack[64];
275
Richard Kennedy84e65b02008-07-04 13:56:16 +0100276} ____cacheline_aligned;
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100277
278DECLARE_PER_CPU(struct tss_struct, init_tss);
279
Ingo Molnar4d46a892008-02-21 04:24:40 +0100280/*
281 * Save the original ist values for checking stack pointers during debugging
282 */
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100283struct orig_ist {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100284 unsigned long ist[7];
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100285};
286
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100287#define MXCSR_DEFAULT 0x1f80
288
Glauber de Oliveira Costa46265df2008-01-30 13:31:41 +0100289struct i387_fsave_struct {
Ingo Molnarca9cda22008-03-05 15:15:42 +0100290 u32 cwd; /* FPU Control Word */
291 u32 swd; /* FPU Status Word */
292 u32 twd; /* FPU Tag Word */
293 u32 fip; /* FPU IP Offset */
294 u32 fcs; /* FPU IP Selector */
295 u32 foo; /* FPU Operand Pointer Offset */
296 u32 fos; /* FPU Operand Pointer Selector */
297
298 /* 8*10 bytes for each FP-reg = 80 bytes: */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100299 u32 st_space[20];
Ingo Molnarca9cda22008-03-05 15:15:42 +0100300
301 /* Software status information [not touched by FSAVE ]: */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100302 u32 status;
Glauber de Oliveira Costa46265df2008-01-30 13:31:41 +0100303};
304
305struct i387_fxsave_struct {
Ingo Molnarca9cda22008-03-05 15:15:42 +0100306 u16 cwd; /* Control Word */
307 u16 swd; /* Status Word */
308 u16 twd; /* Tag Word */
309 u16 fop; /* Last Instruction Opcode */
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100310 union {
311 struct {
Ingo Molnarca9cda22008-03-05 15:15:42 +0100312 u64 rip; /* Instruction Pointer */
313 u64 rdp; /* Data Pointer */
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100314 };
315 struct {
Ingo Molnarca9cda22008-03-05 15:15:42 +0100316 u32 fip; /* FPU IP Offset */
317 u32 fcs; /* FPU IP Selector */
318 u32 foo; /* FPU Operand Offset */
319 u32 fos; /* FPU Operand Selector */
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100320 };
321 };
Ingo Molnarca9cda22008-03-05 15:15:42 +0100322 u32 mxcsr; /* MXCSR Register State */
323 u32 mxcsr_mask; /* MXCSR Mask */
324
325 /* 8*16 bytes for each FP-reg = 128 bytes: */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100326 u32 st_space[32];
Ingo Molnarca9cda22008-03-05 15:15:42 +0100327
328 /* 16*16 bytes for each XMM-reg = 256 bytes: */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100329 u32 xmm_space[64];
Ingo Molnarca9cda22008-03-05 15:15:42 +0100330
Suresh Siddhabdd8cab2008-07-29 10:29:24 -0700331 u32 padding[12];
332
333 union {
334 u32 padding1[12];
335 u32 sw_reserved[12];
336 };
Ingo Molnar4d46a892008-02-21 04:24:40 +0100337
Glauber de Oliveira Costa46265df2008-01-30 13:31:41 +0100338} __attribute__((aligned(16)));
339
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100340struct i387_soft_struct {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100341 u32 cwd;
342 u32 swd;
343 u32 twd;
344 u32 fip;
345 u32 fcs;
346 u32 foo;
347 u32 fos;
348 /* 8*10 bytes for each FP-reg = 80 bytes: */
349 u32 st_space[20];
350 u8 ftop;
351 u8 changed;
352 u8 lookahead;
353 u8 no_update;
354 u8 rm;
355 u8 alimit;
356 struct info *info;
357 u32 entry_eip;
Glauber de Oliveira Costa46265df2008-01-30 13:31:41 +0100358};
359
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700360struct xsave_hdr_struct {
361 u64 xstate_bv;
362 u64 reserved1[2];
363 u64 reserved2[5];
364} __attribute__((packed));
365
366struct xsave_struct {
367 struct i387_fxsave_struct i387;
368 struct xsave_hdr_struct xsave_hdr;
369 /* new processor state extensions will go here */
370} __attribute__ ((packed, aligned (64)));
371
Suresh Siddha61c46282008-03-10 15:28:04 -0700372union thread_xstate {
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100373 struct i387_fsave_struct fsave;
374 struct i387_fxsave_struct fxsave;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100375 struct i387_soft_struct soft;
Suresh Siddhab359e8a2008-07-29 10:29:20 -0700376 struct xsave_struct xsave;
Roland McGrath99f8ecd2008-01-30 13:31:48 +0100377};
378
Glauber Costafe676202008-03-03 14:12:56 -0300379#ifdef CONFIG_X86_64
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100380DECLARE_PER_CPU(struct orig_ist, orig_ist);
Brian Gerst26f80bd2009-01-19 00:38:58 +0900381
Brian Gerst947e76c2009-01-19 12:21:28 +0900382union irq_stack_union {
383 char irq_stack[IRQ_STACK_SIZE];
384 /*
385 * GCC hardcodes the stack canary as %gs:40. Since the
386 * irq_stack is the object at %gs:0, we reserve the bottom
387 * 48 bytes of the irq stack for the canary.
388 */
389 struct {
390 char gs_base[40];
391 unsigned long stack_canary;
392 };
393};
394
395DECLARE_PER_CPU(union irq_stack_union, irq_stack_union);
Brian Gerst26f80bd2009-01-19 00:38:58 +0900396DECLARE_PER_CPU(char *, irq_stack_ptr);
Thomas Gleixner96a388d2007-10-11 11:20:03 +0200397#endif
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100398
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100399extern void print_cpu_info(struct cpuinfo_x86 *);
Suresh Siddha61c46282008-03-10 15:28:04 -0700400extern unsigned int xstate_size;
Suresh Siddhaaa283f42008-03-10 15:28:05 -0700401extern void free_thread_xstate(struct task_struct *);
402extern struct kmem_cache *task_xstate_cachep;
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100403extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
404extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
405extern unsigned short num_cache_leaves;
406
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100407struct thread_struct {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100408 /* Cached TLS descriptors: */
409 struct desc_struct tls_array[GDT_ENTRY_TLS_ENTRIES];
410 unsigned long sp0;
411 unsigned long sp;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100412#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +0100413 unsigned long sysenter_cs;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100414#else
Ingo Molnar4d46a892008-02-21 04:24:40 +0100415 unsigned long usersp; /* Copy from PDA */
416 unsigned short es;
417 unsigned short ds;
418 unsigned short fsindex;
419 unsigned short gsindex;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100420#endif
Ingo Molnar4d46a892008-02-21 04:24:40 +0100421 unsigned long ip;
422 unsigned long fs;
423 unsigned long gs;
424 /* Hardware debugging registers: */
425 unsigned long debugreg0;
426 unsigned long debugreg1;
427 unsigned long debugreg2;
428 unsigned long debugreg3;
429 unsigned long debugreg6;
430 unsigned long debugreg7;
431 /* Fault info: */
432 unsigned long cr2;
433 unsigned long trap_no;
434 unsigned long error_code;
Suresh Siddha61c46282008-03-10 15:28:04 -0700435 /* floating point and extended processor state */
436 union thread_xstate *xstate;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100437#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +0100438 /* Virtual 86 mode info */
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100439 struct vm86_struct __user *vm86_info;
440 unsigned long screen_bitmap;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100441 unsigned long v86flags;
442 unsigned long v86mask;
443 unsigned long saved_sp0;
444 unsigned int saved_fs;
445 unsigned int saved_gs;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100446#endif
Ingo Molnar4d46a892008-02-21 04:24:40 +0100447 /* IO permissions: */
448 unsigned long *io_bitmap_ptr;
449 unsigned long iopl;
450 /* Max allowed port in the bitmap, in bytes: */
451 unsigned io_bitmap_max;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100452/* MSR_IA32_DEBUGCTLMSR value to switch in if TIF_DEBUGCTLMSR is set. */
453 unsigned long debugctlmsr;
Markus Metzger93fa7632008-04-08 11:01:58 +0200454#ifdef CONFIG_X86_DS
455/* Debug Store context; see include/asm-x86/ds.h; goes into MSR_IA32_DS_AREA */
456 struct ds_context *ds_ctx;
457#endif /* CONFIG_X86_DS */
458#ifdef CONFIG_X86_PTRACE_BTS
459/* the signal to send on a bts buffer overflow */
460 unsigned int bts_ovfl_signal;
461#endif /* CONFIG_X86_PTRACE_BTS */
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100462};
463
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100464static inline unsigned long native_get_debugreg(int regno)
465{
Ingo Molnar4d46a892008-02-21 04:24:40 +0100466 unsigned long val = 0; /* Damn you, gcc! */
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100467
468 switch (regno) {
469 case 0:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700470 asm("mov %%db0, %0" :"=r" (val));
471 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100472 case 1:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700473 asm("mov %%db1, %0" :"=r" (val));
474 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100475 case 2:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700476 asm("mov %%db2, %0" :"=r" (val));
477 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100478 case 3:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700479 asm("mov %%db3, %0" :"=r" (val));
480 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100481 case 6:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700482 asm("mov %%db6, %0" :"=r" (val));
483 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100484 case 7:
Joe Perchescca2e6f2008-03-23 01:03:15 -0700485 asm("mov %%db7, %0" :"=r" (val));
486 break;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100487 default:
488 BUG();
489 }
490 return val;
491}
492
493static inline void native_set_debugreg(int regno, unsigned long value)
494{
495 switch (regno) {
496 case 0:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100497 asm("mov %0, %%db0" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100498 break;
499 case 1:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100500 asm("mov %0, %%db1" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100501 break;
502 case 2:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100503 asm("mov %0, %%db2" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100504 break;
505 case 3:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100506 asm("mov %0, %%db3" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100507 break;
508 case 6:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100509 asm("mov %0, %%db6" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100510 break;
511 case 7:
Ingo Molnar4d46a892008-02-21 04:24:40 +0100512 asm("mov %0, %%db7" ::"r" (value));
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100513 break;
514 default:
515 BUG();
516 }
517}
518
Glauber de Oliveira Costa62d7d7e2008-01-30 13:31:27 +0100519/*
520 * Set IOPL bits in EFLAGS from given mask
521 */
522static inline void native_set_iopl_mask(unsigned mask)
523{
524#ifdef CONFIG_X86_32
525 unsigned int reg;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100526
Joe Perchescca2e6f2008-03-23 01:03:15 -0700527 asm volatile ("pushfl;"
528 "popl %0;"
529 "andl %1, %0;"
530 "orl %2, %0;"
531 "pushl %0;"
532 "popfl"
533 : "=&r" (reg)
534 : "i" (~X86_EFLAGS_IOPL), "r" (mask));
Glauber de Oliveira Costa62d7d7e2008-01-30 13:31:27 +0100535#endif
536}
537
Ingo Molnar4d46a892008-02-21 04:24:40 +0100538static inline void
539native_load_sp0(struct tss_struct *tss, struct thread_struct *thread)
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100540{
541 tss->x86_tss.sp0 = thread->sp0;
542#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +0100543 /* Only happens when SEP is enabled, no need to test "SEP"arately: */
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100544 if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) {
545 tss->x86_tss.ss1 = thread->sysenter_cs;
546 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
547 }
548#endif
549}
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100550
Glauber de Oliveira Costae801f862008-01-30 13:32:08 +0100551static inline void native_swapgs(void)
552{
553#ifdef CONFIG_X86_64
554 asm volatile("swapgs" ::: "memory");
555#endif
556}
557
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100558#ifdef CONFIG_PARAVIRT
559#include <asm/paravirt.h>
560#else
Ingo Molnar4d46a892008-02-21 04:24:40 +0100561#define __cpuid native_cpuid
562#define paravirt_enabled() 0
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100563
564/*
565 * These special macros can be used to get or set a debugging register
566 */
567#define get_debugreg(var, register) \
568 (var) = native_get_debugreg(register)
569#define set_debugreg(value, register) \
570 native_set_debugreg(register, value)
571
Joe Perchescca2e6f2008-03-23 01:03:15 -0700572static inline void load_sp0(struct tss_struct *tss,
573 struct thread_struct *thread)
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100574{
575 native_load_sp0(tss, thread);
576}
577
Glauber de Oliveira Costa62d7d7e2008-01-30 13:31:27 +0100578#define set_iopl_mask native_set_iopl_mask
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100579#endif /* CONFIG_PARAVIRT */
580
581/*
582 * Save the cr4 feature set we're using (ie
583 * Pentium 4MB enable and PPro Global page
584 * enable), so that any CPU's that boot up
585 * after us can get the correct flags.
586 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100587extern unsigned long mmu_cr4_features;
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100588
589static inline void set_in_cr4(unsigned long mask)
590{
591 unsigned cr4;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100592
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100593 mmu_cr4_features |= mask;
594 cr4 = read_cr4();
595 cr4 |= mask;
596 write_cr4(cr4);
597}
598
599static inline void clear_in_cr4(unsigned long mask)
600{
601 unsigned cr4;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100602
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100603 mmu_cr4_features &= ~mask;
604 cr4 = read_cr4();
605 cr4 &= ~mask;
606 write_cr4(cr4);
607}
608
Glauber de Oliveira Costafc87e902008-01-30 13:31:38 +0100609typedef struct {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100610 unsigned long seg;
Glauber de Oliveira Costafc87e902008-01-30 13:31:38 +0100611} mm_segment_t;
612
613
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100614/*
615 * create a kernel thread without removing it from tasklists
616 */
617extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
618
619/* Free all resources held by a thread. */
620extern void release_thread(struct task_struct *);
621
Ingo Molnar4d46a892008-02-21 04:24:40 +0100622/* Prepare to copy thread state - unlazy all lazy state */
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100623extern void prepare_to_copy(struct task_struct *tsk);
624
625unsigned long get_wchan(struct task_struct *p);
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100626
627/*
628 * Generic CPUID function
629 * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
630 * resulting in stale register contents being returned.
631 */
632static inline void cpuid(unsigned int op,
633 unsigned int *eax, unsigned int *ebx,
634 unsigned int *ecx, unsigned int *edx)
635{
636 *eax = op;
637 *ecx = 0;
638 __cpuid(eax, ebx, ecx, edx);
639}
640
641/* Some CPUID calls want 'count' to be placed in ecx */
642static inline void cpuid_count(unsigned int op, int count,
643 unsigned int *eax, unsigned int *ebx,
644 unsigned int *ecx, unsigned int *edx)
645{
646 *eax = op;
647 *ecx = count;
648 __cpuid(eax, ebx, ecx, edx);
649}
650
651/*
652 * CPUID functions returning a single datum
653 */
654static inline unsigned int cpuid_eax(unsigned int op)
655{
656 unsigned int eax, ebx, ecx, edx;
657
658 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100659
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100660 return eax;
661}
Ingo Molnar4d46a892008-02-21 04:24:40 +0100662
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100663static inline unsigned int cpuid_ebx(unsigned int op)
664{
665 unsigned int eax, ebx, ecx, edx;
666
667 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100668
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100669 return ebx;
670}
Ingo Molnar4d46a892008-02-21 04:24:40 +0100671
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100672static inline unsigned int cpuid_ecx(unsigned int op)
673{
674 unsigned int eax, ebx, ecx, edx;
675
676 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100677
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100678 return ecx;
679}
Ingo Molnar4d46a892008-02-21 04:24:40 +0100680
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100681static inline unsigned int cpuid_edx(unsigned int op)
682{
683 unsigned int eax, ebx, ecx, edx;
684
685 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100686
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100687 return edx;
688}
689
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100690/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
691static inline void rep_nop(void)
692{
Joe Perchescca2e6f2008-03-23 01:03:15 -0700693 asm volatile("rep; nop" ::: "memory");
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100694}
695
Ingo Molnar4d46a892008-02-21 04:24:40 +0100696static inline void cpu_relax(void)
697{
698 rep_nop();
699}
700
701/* Stop speculative execution: */
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100702static inline void sync_core(void)
703{
704 int tmp;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100705
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100706 asm volatile("cpuid" : "=a" (tmp) : "0" (1)
Joe Perchescca2e6f2008-03-23 01:03:15 -0700707 : "ebx", "ecx", "edx", "memory");
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100708}
709
Joe Perchescca2e6f2008-03-23 01:03:15 -0700710static inline void __monitor(const void *eax, unsigned long ecx,
711 unsigned long edx)
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100712{
Ingo Molnar4d46a892008-02-21 04:24:40 +0100713 /* "monitor %eax, %ecx, %edx;" */
Joe Perchescca2e6f2008-03-23 01:03:15 -0700714 asm volatile(".byte 0x0f, 0x01, 0xc8;"
715 :: "a" (eax), "c" (ecx), "d"(edx));
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100716}
717
718static inline void __mwait(unsigned long eax, unsigned long ecx)
719{
Ingo Molnar4d46a892008-02-21 04:24:40 +0100720 /* "mwait %eax, %ecx;" */
Joe Perchescca2e6f2008-03-23 01:03:15 -0700721 asm volatile(".byte 0x0f, 0x01, 0xc9;"
722 :: "a" (eax), "c" (ecx));
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100723}
724
725static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
726{
Peter Zijlstra7f424a82008-04-25 17:39:01 +0200727 trace_hardirqs_on();
Ingo Molnar4d46a892008-02-21 04:24:40 +0100728 /* "mwait %eax, %ecx;" */
Joe Perchescca2e6f2008-03-23 01:03:15 -0700729 asm volatile("sti; .byte 0x0f, 0x01, 0xc9;"
730 :: "a" (eax), "c" (ecx));
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100731}
732
733extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);
734
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100735extern void select_idle_routine(const struct cpuinfo_x86 *c);
736
Ingo Molnar4d46a892008-02-21 04:24:40 +0100737extern unsigned long boot_option_idle_override;
Zhao Yakuic1e3b372008-06-24 17:58:53 +0800738extern unsigned long idle_halt;
Zhao Yakuida5e09a2008-06-24 18:01:09 +0800739extern unsigned long idle_nomwait;
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100740
Mark Langsdorf394a1502008-08-14 09:11:26 -0500741/*
742 * on systems with caches, caches must be flashed as the absolute
743 * last instruction before going into a suspended halt. Otherwise,
744 * dirty data can linger in the cache and become stale on resume,
745 * leading to strange errors.
746 *
747 * perform a variety of operations to guarantee that the compiler
748 * will not reorder instructions. wbinvd itself is serializing
749 * so the processor will not reorder.
750 *
751 * Systems without cache can just go into halt.
752 */
753static inline void wbinvd_halt(void)
754{
755 mb();
756 /* check for clflush to determine if wbinvd is legal */
757 if (cpu_has_clflush)
758 asm volatile("cli; wbinvd; 1: hlt; jmp 1b" : : : "memory");
759 else
760 while (1)
761 halt();
762}
763
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100764extern void enable_sep_cpu(void);
765extern int sysenter_setup(void);
766
767/* Defined in head.S */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100768extern struct desc_ptr early_gdt_descr;
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100769
770extern void cpu_set_gdt(int);
Brian Gerst552be872009-01-30 17:47:53 +0900771extern void switch_to_new_gdt(int);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100772extern void cpu_init(void);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100773
Markus Metzgerc2724772008-12-11 13:49:59 +0100774static inline unsigned long get_debugctlmsr(void)
775{
776 unsigned long debugctlmsr = 0;
777
778#ifndef CONFIG_X86_DEBUGCTLMSR
779 if (boot_cpu_data.x86 < 6)
780 return 0;
781#endif
782 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
783
784 return debugctlmsr;
785}
786
Jan Beulich5b0e5082008-03-10 13:11:17 +0000787static inline void update_debugctlmsr(unsigned long debugctlmsr)
788{
789#ifndef CONFIG_X86_DEBUGCTLMSR
790 if (boot_cpu_data.x86 < 6)
791 return;
792#endif
793 wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
794}
795
Ingo Molnar4d46a892008-02-21 04:24:40 +0100796/*
797 * from system description table in BIOS. Mostly for MCA use, but
798 * others may find it useful:
799 */
800extern unsigned int machine_id;
801extern unsigned int machine_submodel_id;
802extern unsigned int BIOS_revision;
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100803
Ingo Molnar4d46a892008-02-21 04:24:40 +0100804/* Boot loader type from the setup header: */
805extern int bootloader_type;
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100806
Ingo Molnar4d46a892008-02-21 04:24:40 +0100807extern char ignore_fpu_irq;
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100808
809#define HAVE_ARCH_PICK_MMAP_LAYOUT 1
810#define ARCH_HAS_PREFETCHW
811#define ARCH_HAS_SPINLOCK_PREFETCH
812
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100813#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +0100814# define BASE_PREFETCH ASM_NOP4
815# define ARCH_HAS_PREFETCH
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100816#else
Ingo Molnar4d46a892008-02-21 04:24:40 +0100817# define BASE_PREFETCH "prefetcht0 (%1)"
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100818#endif
819
Ingo Molnar4d46a892008-02-21 04:24:40 +0100820/*
821 * Prefetch instructions for Pentium III (+) and AMD Athlon (+)
822 *
823 * It's not worth to care about 3dnow prefetches for the K6
824 * because they are microcoded there and very slow.
825 */
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100826static inline void prefetch(const void *x)
827{
828 alternative_input(BASE_PREFETCH,
829 "prefetchnta (%1)",
830 X86_FEATURE_XMM,
831 "r" (x));
832}
833
Ingo Molnar4d46a892008-02-21 04:24:40 +0100834/*
835 * 3dnow prefetch to get an exclusive cache line.
836 * Useful for spinlocks to avoid one state transition in the
837 * cache coherency protocol:
838 */
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100839static inline void prefetchw(const void *x)
840{
841 alternative_input(BASE_PREFETCH,
842 "prefetchw (%1)",
843 X86_FEATURE_3DNOW,
844 "r" (x));
845}
846
Ingo Molnar4d46a892008-02-21 04:24:40 +0100847static inline void spin_lock_prefetch(const void *x)
848{
849 prefetchw(x);
850}
851
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100852#ifdef CONFIG_X86_32
853/*
854 * User space process size: 3GB (default).
855 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100856#define TASK_SIZE PAGE_OFFSET
857#define STACK_TOP TASK_SIZE
858#define STACK_TOP_MAX STACK_TOP
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100859
Ingo Molnar4d46a892008-02-21 04:24:40 +0100860#define INIT_THREAD { \
861 .sp0 = sizeof(init_stack) + (long)&init_stack, \
862 .vm86_info = NULL, \
863 .sysenter_cs = __KERNEL_CS, \
864 .io_bitmap_ptr = NULL, \
865 .fs = __KERNEL_PERCPU, \
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100866}
867
868/*
869 * Note that the .io_bitmap member must be extra-big. This is because
870 * the CPU will access an additional byte beyond the end of the IO
871 * permission bitmap. The extra byte must be all 1 bits, and must
872 * be within the limit.
873 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100874#define INIT_TSS { \
875 .x86_tss = { \
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100876 .sp0 = sizeof(init_stack) + (long)&init_stack, \
Ingo Molnar4d46a892008-02-21 04:24:40 +0100877 .ss0 = __KERNEL_DS, \
878 .ss1 = __KERNEL_CS, \
879 .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \
880 }, \
881 .io_bitmap = { [0 ... IO_BITMAP_LONGS] = ~0 }, \
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100882}
883
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100884extern unsigned long thread_saved_pc(struct task_struct *tsk);
885
886#define THREAD_SIZE_LONGS (THREAD_SIZE/sizeof(unsigned long))
887#define KSTK_TOP(info) \
888({ \
889 unsigned long *__ptr = (unsigned long *)(info); \
890 (unsigned long)(&__ptr[THREAD_SIZE_LONGS]); \
891})
892
893/*
894 * The below -8 is to reserve 8 bytes on top of the ring0 stack.
895 * This is necessary to guarantee that the entire "struct pt_regs"
896 * is accessable even if the CPU haven't stored the SS/ESP registers
897 * on the stack (interrupt gate does not save these registers
898 * when switching to the same priv ring).
899 * Therefore beware: accessing the ss/esp fields of the
900 * "struct pt_regs" is possible, but they may contain the
901 * completely wrong values.
902 */
903#define task_pt_regs(task) \
904({ \
905 struct pt_regs *__regs__; \
906 __regs__ = (struct pt_regs *)(KSTK_TOP(task_stack_page(task))-8); \
907 __regs__ - 1; \
908})
909
Ingo Molnar4d46a892008-02-21 04:24:40 +0100910#define KSTK_ESP(task) (task_pt_regs(task)->sp)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100911
912#else
913/*
914 * User space process size. 47bits minus one guard page.
915 */
Cyrill Gorcunova5ae1c32008-03-13 19:44:56 +0300916#define TASK_SIZE64 ((1UL << 47) - PAGE_SIZE)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100917
918/* This decides where the kernel will search for a free chunk of vm
919 * space during mmap's.
920 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100921#define IA32_PAGE_OFFSET ((current->personality & ADDR_LIMIT_3GB) ? \
922 0xc0000000 : 0xFFFFe000)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100923
Ingo Molnar4d46a892008-02-21 04:24:40 +0100924#define TASK_SIZE (test_thread_flag(TIF_IA32) ? \
925 IA32_PAGE_OFFSET : TASK_SIZE64)
926#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? \
927 IA32_PAGE_OFFSET : TASK_SIZE64)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100928
David Howells922a70d2008-02-08 04:19:26 -0800929#define STACK_TOP TASK_SIZE
930#define STACK_TOP_MAX TASK_SIZE64
931
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100932#define INIT_THREAD { \
933 .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
934}
935
936#define INIT_TSS { \
937 .x86_tss.sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
938}
939
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100940/*
941 * Return saved PC of a blocked thread.
942 * What is this good for? it will be always the scheduler or ret_from_fork.
943 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100944#define thread_saved_pc(t) (*(unsigned long *)((t)->thread.sp - 8))
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100945
Ingo Molnar4d46a892008-02-21 04:24:40 +0100946#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.sp0 - 1)
947#define KSTK_ESP(tsk) -1 /* sorry. doesn't work for syscall. */
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100948#endif /* CONFIG_X86_64 */
949
Ingo Molnar513ad842008-02-21 05:18:40 +0100950extern void start_thread(struct pt_regs *regs, unsigned long new_ip,
951 unsigned long new_sp);
952
Ingo Molnar4d46a892008-02-21 04:24:40 +0100953/*
954 * This decides where the kernel will search for a free chunk of vm
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100955 * space during mmap's.
956 */
957#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
958
Ingo Molnar4d46a892008-02-21 04:24:40 +0100959#define KSTK_EIP(task) (task_pt_regs(task)->ip)
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100960
Erik Bosman529e25f2008-04-14 00:24:18 +0200961/* Get/set a process' ability to use the timestamp counter instruction */
962#define GET_TSC_CTL(adr) get_tsc_mode((adr))
963#define SET_TSC_CTL(val) set_tsc_mode((val))
964
965extern int get_tsc_mode(unsigned long adr);
966extern int set_tsc_mode(unsigned int val);
967
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700968#endif /* _ASM_X86_PROCESSOR_H */