blob: b48d35e40172b70266531fa95c4f63b7949abc34 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
3 *
4 * Based on alpha version.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
Stephen Rothwell654810e2005-09-19 23:21:15 +100012#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
13#define _ASM_POWERPC_OPROFILE_IMPL_H
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
15#define OP_MAX_COUNTER 8
16
17/* Per-counter configuration as set via oprofilefs. */
18struct op_counter_config {
Stephen Rothwell654810e2005-09-19 23:21:15 +100019#ifdef __powerpc64__
Linus Torvalds1da177e2005-04-16 15:20:36 -070020 unsigned long valid;
Stephen Rothwell654810e2005-09-19 23:21:15 +100021#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 unsigned long enabled;
23 unsigned long event;
24 unsigned long count;
Andy Fleming555d97a2005-12-15 20:02:04 -060025 /* Classic doesn't support per-counter user/kernel selection */
Linus Torvalds1da177e2005-04-16 15:20:36 -070026 unsigned long kernel;
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 unsigned long user;
28 unsigned long unit_mask;
29};
30
31/* System-wide configuration as set via oprofilefs. */
32struct op_system_config {
Andy Fleming555d97a2005-12-15 20:02:04 -060033#ifdef CONFIG_PPC64
Linus Torvalds1da177e2005-04-16 15:20:36 -070034 unsigned long mmcr0;
35 unsigned long mmcr1;
36 unsigned long mmcra;
Stephen Rothwell654810e2005-09-19 23:21:15 +100037#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070038 unsigned long enable_kernel;
39 unsigned long enable_user;
Andy Fleming555d97a2005-12-15 20:02:04 -060040#ifdef CONFIG_PPC64
Linus Torvalds1da177e2005-04-16 15:20:36 -070041 unsigned long backtrace_spinlocks;
Stephen Rothwell654810e2005-09-19 23:21:15 +100042#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070043};
44
45/* Per-arch configuration */
Stephen Rothwella3e48c12005-09-19 23:18:31 +100046struct op_powerpc_model {
Linus Torvalds1da177e2005-04-16 15:20:36 -070047 void (*reg_setup) (struct op_counter_config *,
48 struct op_system_config *,
49 int num_counters);
50 void (*cpu_setup) (void *);
51 void (*start) (struct op_counter_config *);
52 void (*stop) (void);
53 void (*handle_interrupt) (struct pt_regs *,
54 struct op_counter_config *);
55 int num_counters;
56};
57
Andy Fleming555d97a2005-12-15 20:02:04 -060058#ifdef CONFIG_FSL_BOOKE
59extern struct op_powerpc_model op_model_fsl_booke;
60#else /* Otherwise, it's classic */
61
62#ifdef CONFIG_PPC64
Stephen Rothwella3e48c12005-09-19 23:18:31 +100063extern struct op_powerpc_model op_model_rs64;
64extern struct op_powerpc_model op_model_power4;
Anton Blancharddca85932005-09-06 14:55:35 +100065
Andy Fleming555d97a2005-12-15 20:02:04 -060066#else /* Otherwise, CONFIG_PPC32 */
67extern struct op_powerpc_model op_model_7450;
68#endif
69
70/* All the classic PPC parts use these */
Linus Torvalds1da177e2005-04-16 15:20:36 -070071static inline unsigned int ctr_read(unsigned int i)
72{
73 switch(i) {
74 case 0:
75 return mfspr(SPRN_PMC1);
76 case 1:
77 return mfspr(SPRN_PMC2);
78 case 2:
79 return mfspr(SPRN_PMC3);
80 case 3:
81 return mfspr(SPRN_PMC4);
82 case 4:
83 return mfspr(SPRN_PMC5);
84 case 5:
85 return mfspr(SPRN_PMC6);
Andy Fleming555d97a2005-12-15 20:02:04 -060086
87/* No PPC32 chip has more than 6 so far */
88#ifdef CONFIG_PPC64
Linus Torvalds1da177e2005-04-16 15:20:36 -070089 case 6:
90 return mfspr(SPRN_PMC7);
91 case 7:
92 return mfspr(SPRN_PMC8);
Andy Fleming555d97a2005-12-15 20:02:04 -060093#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070094 default:
95 return 0;
96 }
97}
98
99static inline void ctr_write(unsigned int i, unsigned int val)
100{
101 switch(i) {
102 case 0:
103 mtspr(SPRN_PMC1, val);
104 break;
105 case 1:
106 mtspr(SPRN_PMC2, val);
107 break;
108 case 2:
109 mtspr(SPRN_PMC3, val);
110 break;
111 case 3:
112 mtspr(SPRN_PMC4, val);
113 break;
114 case 4:
115 mtspr(SPRN_PMC5, val);
116 break;
117 case 5:
118 mtspr(SPRN_PMC6, val);
119 break;
Andy Fleming555d97a2005-12-15 20:02:04 -0600120
121/* No PPC32 chip has more than 6, yet */
122#ifdef CONFIG_PPC64
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123 case 6:
124 mtspr(SPRN_PMC7, val);
125 break;
126 case 7:
127 mtspr(SPRN_PMC8, val);
128 break;
Andy Fleming555d97a2005-12-15 20:02:04 -0600129#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130 default:
131 break;
132 }
133}
Andy Fleming555d97a2005-12-15 20:02:04 -0600134#endif /* !CONFIG_FSL_BOOKE */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135
Stephen Rothwell654810e2005-09-19 23:21:15 +1000136#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */