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Jiri Olsa43599d12014-05-05 12:53:20 +02001#ifndef _PERF_SYS_H
2#define _PERF_SYS_H
3
Jiri Olsa82baa0e2014-05-05 12:58:31 +02004#include <unistd.h>
5#include <sys/types.h>
6#include <sys/syscall.h>
7#include <linux/types.h>
Arnaldo Carvalho de Melo14f06522016-07-18 17:40:49 -03008#include <linux/compiler.h>
Jiri Olsa82baa0e2014-05-05 12:58:31 +02009#include <linux/perf_event.h>
Arnaldo Carvalho de Melo361c5642015-04-30 12:33:22 -030010#include <asm/barrier.h>
Jiri Olsa43599d12014-05-05 12:53:20 +020011
12#if defined(__i386__)
Jiri Olsa43599d12014-05-05 12:53:20 +020013#define cpu_relax() asm volatile("rep; nop" ::: "memory");
Wang Nan493c3032014-10-24 09:45:26 +080014#define CPUINFO_PROC {"model name"}
Jiri Olsa43599d12014-05-05 12:53:20 +020015#endif
16
17#if defined(__x86_64__)
Jiri Olsa43599d12014-05-05 12:53:20 +020018#define cpu_relax() asm volatile("rep; nop" ::: "memory");
Wang Nan493c3032014-10-24 09:45:26 +080019#define CPUINFO_PROC {"model name"}
Jiri Olsa43599d12014-05-05 12:53:20 +020020#endif
21
22#ifdef __powerpc__
Wang Nan493c3032014-10-24 09:45:26 +080023#define CPUINFO_PROC {"cpu"}
Jiri Olsa43599d12014-05-05 12:53:20 +020024#endif
25
26#ifdef __s390__
Wang Nan493c3032014-10-24 09:45:26 +080027#define CPUINFO_PROC {"vendor_id"}
Jiri Olsa43599d12014-05-05 12:53:20 +020028#endif
29
30#ifdef __sh__
Wang Nan493c3032014-10-24 09:45:26 +080031#define CPUINFO_PROC {"cpu type"}
Jiri Olsa43599d12014-05-05 12:53:20 +020032#endif
33
34#ifdef __hppa__
Wang Nan493c3032014-10-24 09:45:26 +080035#define CPUINFO_PROC {"cpu"}
Jiri Olsa43599d12014-05-05 12:53:20 +020036#endif
37
38#ifdef __sparc__
Wang Nan493c3032014-10-24 09:45:26 +080039#define CPUINFO_PROC {"cpu"}
Jiri Olsa43599d12014-05-05 12:53:20 +020040#endif
41
42#ifdef __alpha__
Wang Nan493c3032014-10-24 09:45:26 +080043#define CPUINFO_PROC {"cpu model"}
Jiri Olsa43599d12014-05-05 12:53:20 +020044#endif
45
46#ifdef __ia64__
Jiri Olsa43599d12014-05-05 12:53:20 +020047#define cpu_relax() asm volatile ("hint @pause" ::: "memory")
Wang Nan493c3032014-10-24 09:45:26 +080048#define CPUINFO_PROC {"model name"}
Jiri Olsa43599d12014-05-05 12:53:20 +020049#endif
50
51#ifdef __arm__
Wang Nan493c3032014-10-24 09:45:26 +080052#define CPUINFO_PROC {"model name", "Processor"}
Jiri Olsa43599d12014-05-05 12:53:20 +020053#endif
54
55#ifdef __aarch64__
Jiri Olsa43599d12014-05-05 12:53:20 +020056#define cpu_relax() asm volatile("yield" ::: "memory")
57#endif
58
59#ifdef __mips__
Wang Nan493c3032014-10-24 09:45:26 +080060#define CPUINFO_PROC {"cpu model"}
Jiri Olsa43599d12014-05-05 12:53:20 +020061#endif
62
63#ifdef __arc__
Wang Nan493c3032014-10-24 09:45:26 +080064#define CPUINFO_PROC {"Processor"}
Jiri Olsa43599d12014-05-05 12:53:20 +020065#endif
66
67#ifdef __metag__
Wang Nan493c3032014-10-24 09:45:26 +080068#define CPUINFO_PROC {"CPU"}
Jiri Olsa43599d12014-05-05 12:53:20 +020069#endif
70
71#ifdef __xtensa__
Wang Nan493c3032014-10-24 09:45:26 +080072#define CPUINFO_PROC {"core ID"}
Jiri Olsa43599d12014-05-05 12:53:20 +020073#endif
74
75#ifdef __tile__
Jiri Olsa43599d12014-05-05 12:53:20 +020076#define cpu_relax() asm volatile ("mfspr zero, PASS" ::: "memory")
Wang Nan493c3032014-10-24 09:45:26 +080077#define CPUINFO_PROC {"model name"}
Jiri Olsa43599d12014-05-05 12:53:20 +020078#endif
79
Jiri Olsa43599d12014-05-05 12:53:20 +020080#ifndef cpu_relax
81#define cpu_relax() barrier()
82#endif
83
Jiri Olsa82baa0e2014-05-05 12:58:31 +020084static inline int
85sys_perf_event_open(struct perf_event_attr *attr,
86 pid_t pid, int cpu, int group_fd,
87 unsigned long flags)
88{
89 int fd;
90
91 fd = syscall(__NR_perf_event_open, attr, pid, cpu,
92 group_fd, flags);
93
94#ifdef HAVE_ATTR_TEST
95 if (unlikely(test_attr__enabled))
96 test_attr__open(attr, pid, cpu, fd, group_fd, flags);
97#endif
98 return fd;
99}
100
Jiri Olsa43599d12014-05-05 12:53:20 +0200101#endif /* _PERF_SYS_H */