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Paul Walmsleyad67ef62008-08-19 11:08:40 +03001/*
Paul Walmsleya64bb9c2010-12-21 21:05:14 -07002 * OMAP2/3/4 powerdomain control
Paul Walmsleyad67ef62008-08-19 11:08:40 +03003 *
Paul Walmsley72e06d02010-12-21 21:05:16 -07004 * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc.
Paul Walmsley694606c2011-03-07 19:28:15 -07005 * Copyright (C) 2007-2011 Nokia Corporation
Paul Walmsleyad67ef62008-08-19 11:08:40 +03006 *
Paul Walmsley72e06d02010-12-21 21:05:16 -07007 * Paul Walmsley
Paul Walmsleyad67ef62008-08-19 11:08:40 +03008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
Paul Walmsley6e014782010-12-21 20:01:20 -070012 *
13 * XXX This should be moved to the mach-omap2/ directory at the earliest
14 * opportunity.
Paul Walmsleyad67ef62008-08-19 11:08:40 +030015 */
16
Paul Walmsley72e06d02010-12-21 21:05:16 -070017#ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
18#define __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
Paul Walmsleyad67ef62008-08-19 11:08:40 +030019
20#include <linux/types.h>
21#include <linux/list.h>
Paul Walmsley3a090282013-01-26 00:58:16 -070022#include <linux/spinlock.h>
Paul Walmsleyad67ef62008-08-19 11:08:40 +030023
Kevin Hilman8f1bec22011-03-23 07:22:23 -070024#include "voltage.h"
25
Paul Walmsleyad67ef62008-08-19 11:08:40 +030026/* Powerdomain basic power states */
27#define PWRDM_POWER_OFF 0x0
28#define PWRDM_POWER_RET 0x1
29#define PWRDM_POWER_INACTIVE 0x2
30#define PWRDM_POWER_ON 0x3
31
Paul Walmsley2354eb52009-12-08 16:33:12 -070032#define PWRDM_MAX_PWRSTS 4
33
Paul Walmsleyad67ef62008-08-19 11:08:40 +030034/* Powerdomain allowable state bitfields */
Rajendra Nayakd3353e12010-05-18 20:24:01 -060035#define PWRSTS_ON (1 << PWRDM_POWER_ON)
Paul Walmsley694606c2011-03-07 19:28:15 -070036#define PWRSTS_INACTIVE (1 << PWRDM_POWER_INACTIVE)
37#define PWRSTS_RET (1 << PWRDM_POWER_RET)
Rajendra Nayakbb722f32010-09-27 14:02:56 -060038#define PWRSTS_OFF (1 << PWRDM_POWER_OFF)
Paul Walmsleyad67ef62008-08-19 11:08:40 +030039
Paul Walmsley694606c2011-03-07 19:28:15 -070040#define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON)
41#define PWRSTS_OFF_RET (PWRSTS_OFF | PWRSTS_RET)
42#define PWRSTS_RET_ON (PWRSTS_RET | PWRSTS_ON)
43#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | PWRSTS_ON)
Paul Walmsleyad67ef62008-08-19 11:08:40 +030044
45
Paul Walmsley562e54d2013-01-26 00:58:17 -070046/*
47 * Powerdomain flags (struct powerdomain.flags)
48 *
49 * PWRDM_HAS_HDWR_SAR - powerdomain has hardware save-and-restore support
50 *
51 * PWRDM_HAS_MPU_QUIRK - MPU pwr domain has MEM bank 0 bits in MEM
52 * bank 1 position. This is true for OMAP3430
53 *
54 * PWRDM_HAS_LOWPOWERSTATECHANGE - can transition from a sleep state
55 * to a lower sleep state without waking up the powerdomain
56 */
57#define PWRDM_HAS_HDWR_SAR BIT(0)
58#define PWRDM_HAS_MPU_QUIRK BIT(1)
59#define PWRDM_HAS_LOWPOWERSTATECHANGE BIT(2)
Paul Walmsley0b7cbfb2008-06-25 18:09:37 -060060
Paul Walmsleyad67ef62008-08-19 11:08:40 +030061/*
Abhijit Pagare38900c22010-01-26 20:12:52 -070062 * Number of memory banks that are power-controllable. On OMAP4430, the
63 * maximum is 5.
Paul Walmsleyad67ef62008-08-19 11:08:40 +030064 */
Abhijit Pagare38900c22010-01-26 20:12:52 -070065#define PWRDM_MAX_MEM_BANKS 5
Paul Walmsleyad67ef62008-08-19 11:08:40 +030066
Paul Walmsley8420bb12008-08-19 11:08:44 +030067/*
68 * Maximum number of clockdomains that can be associated with a powerdomain.
Vaibhav Hiremath3f0ea762012-06-18 00:47:27 -060069 * PER powerdomain on AM33XX is the worst case
Paul Walmsley8420bb12008-08-19 11:08:44 +030070 */
Vaibhav Hiremath3f0ea762012-06-18 00:47:27 -060071#define PWRDM_MAX_CLKDMS 11
Paul Walmsley8420bb12008-08-19 11:08:44 +030072
Paul Walmsleyad67ef62008-08-19 11:08:40 +030073/* XXX A completely arbitrary number. What is reasonable here? */
74#define PWRDM_TRANSITION_BAILOUT 100000
75
Paul Walmsley8420bb12008-08-19 11:08:44 +030076struct clockdomain;
Paul Walmsleyad67ef62008-08-19 11:08:40 +030077struct powerdomain;
78
Paul Walmsleyf0271d62010-01-26 20:13:02 -070079/**
80 * struct powerdomain - OMAP powerdomain
81 * @name: Powerdomain name
Kevin Hilman8f1bec22011-03-23 07:22:23 -070082 * @voltdm: voltagedomain containing this powerdomain
Paul Walmsleyf0271d62010-01-26 20:13:02 -070083 * @prcm_offs: the address offset from CM_BASE/PRM_BASE
Paul Walmsleya64bb9c2010-12-21 21:05:14 -070084 * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
Paul Walmsleyf0271d62010-01-26 20:13:02 -070085 * @pwrsts: Possible powerdomain power states
86 * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION
87 * @flags: Powerdomain flags
88 * @banks: Number of software-controllable memory banks in this powerdomain
89 * @pwrsts_mem_ret: Possible memory bank pwrstates when pwrdm in RETENTION
90 * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON
91 * @pwrdm_clkdms: Clockdomains in this powerdomain
92 * @node: list_head linking all powerdomains
Kevin Hilmane69c22b2011-03-16 16:13:15 -070093 * @voltdm_node: list_head linking all powerdomains in a voltagedomain
Vaibhav Hiremath3f0ea762012-06-18 00:47:27 -060094 * @pwrstctrl_offs: (AM33XX only) XXX_PWRSTCTRL reg offset from prcm_offs
95 * @pwrstst_offs: (AM33XX only) XXX_PWRSTST reg offset from prcm_offs
96 * @logicretstate_mask: (AM33XX only) mask for logic retention bitfield
97 * in @pwrstctrl_offs
98 * @mem_on_mask: (AM33XX only) mask for mem on bitfield in @pwrstctrl_offs
99 * @mem_ret_mask: (AM33XX only) mask for mem ret bitfield in @pwrstctrl_offs
100 * @mem_pwrst_mask: (AM33XX only) mask for mem state bitfield in @pwrstst_offs
101 * @mem_retst_mask: (AM33XX only) mask for mem retention state bitfield
102 * in @pwrstctrl_offs
Paul Walmsleyf0271d62010-01-26 20:13:02 -0700103 * @state:
104 * @state_counter:
105 * @timer:
106 * @state_timer:
Paul Walmsley3a090282013-01-26 00:58:16 -0700107 * @_lock: spinlock used to serialize powerdomain and some clockdomain ops
108 * @_lock_flags: stored flags when @_lock is taken
Paul Walmsleya64bb9c2010-12-21 21:05:14 -0700109 *
110 * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h.
Paul Walmsleyf0271d62010-01-26 20:13:02 -0700111 */
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300112struct powerdomain {
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300113 const char *name;
Kevin Hilman8f1bec22011-03-23 07:22:23 -0700114 union {
115 const char *name;
116 struct voltagedomain *ptr;
117 } voltdm;
Paul Walmsleye0594b42010-01-26 20:13:01 -0700118 const s16 prcm_offs;
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300119 const u8 pwrsts;
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300120 const u8 pwrsts_logic_ret;
Paul Walmsley0b7cbfb2008-06-25 18:09:37 -0600121 const u8 flags;
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300122 const u8 banks;
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300123 const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300124 const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
Paul Walmsleya64bb9c2010-12-21 21:05:14 -0700125 const u8 prcm_partition;
Paul Walmsley8420bb12008-08-19 11:08:44 +0300126 struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300127 struct list_head node;
Kevin Hilmane69c22b2011-03-16 16:13:15 -0700128 struct list_head voltdm_node;
Peter 'p2' De Schrijverba20bb12008-10-15 17:48:43 +0300129 int state;
Paul Walmsley2354eb52009-12-08 16:33:12 -0700130 unsigned state_counter[PWRDM_MAX_PWRSTS];
Thara Gopinathcde08f82010-02-24 12:05:50 -0700131 unsigned ret_logic_off_counter;
132 unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS];
Paul Walmsley3a090282013-01-26 00:58:16 -0700133 spinlock_t _lock;
134 unsigned long _lock_flags;
Vaibhav Hiremath3f0ea762012-06-18 00:47:27 -0600135 const u8 pwrstctrl_offs;
136 const u8 pwrstst_offs;
137 const u32 logicretstate_mask;
138 const u32 mem_on_mask[PWRDM_MAX_MEM_BANKS];
139 const u32 mem_ret_mask[PWRDM_MAX_MEM_BANKS];
140 const u32 mem_pwrst_mask[PWRDM_MAX_MEM_BANKS];
141 const u32 mem_retst_mask[PWRDM_MAX_MEM_BANKS];
142
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300143#ifdef CONFIG_PM_DEBUG
144 s64 timer;
Paul Walmsley2354eb52009-12-08 16:33:12 -0700145 s64 state_timer[PWRDM_MAX_PWRSTS];
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300146#endif
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300147};
148
Rajendra Nayak3b1e8b22010-12-21 20:01:18 -0700149/**
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300150 * struct pwrdm_ops - Arch specific function implementations
Rajendra Nayak3b1e8b22010-12-21 20:01:18 -0700151 * @pwrdm_set_next_pwrst: Set the target power state for a pd
152 * @pwrdm_read_next_pwrst: Read the target power state set for a pd
153 * @pwrdm_read_pwrst: Read the current power state of a pd
154 * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd
155 * @pwrdm_set_logic_retst: Set the logic state in RET for a pd
156 * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd
157 * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd
158 * @pwrdm_read_logic_pwrst: Read the current logic state of a pd
159 * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd
160 * @pwrdm_read_logic_retst: Read the logic state in RET for a pd
161 * @pwrdm_read_mem_pwrst: Read the current memory state of a pd
162 * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd
163 * @pwrdm_read_mem_retst: Read the memory state in RET for a pd
164 * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd
165 * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd
166 * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
167 * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
168 * @pwrdm_wait_transition: Wait for a pd state transition to complete
Paul Walmsleyc4978fb2013-01-29 13:45:09 -0700169 *
170 * Regarding @pwrdm_set_lowpwrstchange: On the OMAP2 and 3-family
171 * chips, a powerdomain's power state is not allowed to directly
172 * transition from one low-power state (e.g., CSWR) to another
173 * low-power state (e.g., OFF) without first waking up the
174 * powerdomain. This wastes energy. So OMAP4 chips support the
175 * ability to transition a powerdomain power state directly from one
176 * low-power state to another. The function pointed to by
177 * @pwrdm_set_lowpwrstchange is intended to configure the OMAP4
178 * hardware powerdomain state machine to enable this feature.
Rajendra Nayak3b1e8b22010-12-21 20:01:18 -0700179 */
180struct pwrdm_ops {
181 int (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst);
182 int (*pwrdm_read_next_pwrst)(struct powerdomain *pwrdm);
183 int (*pwrdm_read_pwrst)(struct powerdomain *pwrdm);
184 int (*pwrdm_read_prev_pwrst)(struct powerdomain *pwrdm);
185 int (*pwrdm_set_logic_retst)(struct powerdomain *pwrdm, u8 pwrst);
186 int (*pwrdm_set_mem_onst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
187 int (*pwrdm_set_mem_retst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
188 int (*pwrdm_read_logic_pwrst)(struct powerdomain *pwrdm);
189 int (*pwrdm_read_prev_logic_pwrst)(struct powerdomain *pwrdm);
190 int (*pwrdm_read_logic_retst)(struct powerdomain *pwrdm);
191 int (*pwrdm_read_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
192 int (*pwrdm_read_prev_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
193 int (*pwrdm_read_mem_retst)(struct powerdomain *pwrdm, u8 bank);
194 int (*pwrdm_clear_all_prev_pwrst)(struct powerdomain *pwrdm);
195 int (*pwrdm_enable_hdwr_sar)(struct powerdomain *pwrdm);
196 int (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm);
197 int (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm);
198 int (*pwrdm_wait_transition)(struct powerdomain *pwrdm);
199};
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300200
Paul Walmsley129c65e2011-09-14 16:01:21 -0600201int pwrdm_register_platform_funcs(struct pwrdm_ops *custom_funcs);
202int pwrdm_register_pwrdms(struct powerdomain **pwrdm_list);
203int pwrdm_complete_init(void);
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300204
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300205struct powerdomain *pwrdm_lookup(const char *name);
206
Peter 'p2' De Schrijvera23456e2008-10-15 18:13:47 +0300207int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
208 void *user);
Artem Bityutskiyee894b12009-10-01 10:01:55 +0300209int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
210 void *user);
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300211
Paul Walmsley8420bb12008-08-19 11:08:44 +0300212int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
213int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
214int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
215 int (*fn)(struct powerdomain *pwrdm,
216 struct clockdomain *clkdm));
Kevin Hilman048a7032011-03-16 15:52:47 -0700217struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm);
Paul Walmsley8420bb12008-08-19 11:08:44 +0300218
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300219int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
220
221int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
222int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
Paul Walmsleyfecb4942009-01-27 19:12:50 -0700223int pwrdm_read_pwrst(struct powerdomain *pwrdm);
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300224int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
225int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
226
227int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
228int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
229int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
230
231int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
232int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
Thara Gopinath1e3d0d22010-02-24 12:05:49 -0700233int pwrdm_read_logic_retst(struct powerdomain *pwrdm);
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300234int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
235int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
Thara Gopinath1e3d0d22010-02-24 12:05:49 -0700236int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300237
Paul Walmsley0b7cbfb2008-06-25 18:09:37 -0600238int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
239int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
240bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
241
Paul Walmsley3a090282013-01-26 00:58:16 -0700242int pwrdm_state_switch_nolock(struct powerdomain *pwrdm);
Peter 'p2' De Schrijverba20bb12008-10-15 17:48:43 +0300243int pwrdm_state_switch(struct powerdomain *pwrdm);
Kevin Hilmane0555482012-05-11 16:00:24 -0700244int pwrdm_pre_transition(struct powerdomain *pwrdm);
245int pwrdm_post_transition(struct powerdomain *pwrdm);
Tomi Valkeinenfc013872011-06-09 16:56:23 +0300246int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
Paul Walmsley694606c2011-03-07 19:28:15 -0700247bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
Peter 'p2' De Schrijverba20bb12008-10-15 17:48:43 +0300248
Paul Walmsleyc4978fb2013-01-29 13:45:09 -0700249extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 state);
250
Paul Walmsley81794882011-09-14 11:34:21 -0600251extern void omap242x_powerdomains_init(void);
252extern void omap243x_powerdomains_init(void);
Paul Walmsley6e014782010-12-21 20:01:20 -0700253extern void omap3xxx_powerdomains_init(void);
Vaibhav Hiremath3f0ea762012-06-18 00:47:27 -0600254extern void am33xx_powerdomains_init(void);
Paul Walmsley6e014782010-12-21 20:01:20 -0700255extern void omap44xx_powerdomains_init(void);
256
Paul Walmsley72e06d02010-12-21 21:05:16 -0700257extern struct pwrdm_ops omap2_pwrdm_operations;
258extern struct pwrdm_ops omap3_pwrdm_operations;
Vaibhav Hiremath3f0ea762012-06-18 00:47:27 -0600259extern struct pwrdm_ops am33xx_pwrdm_operations;
Paul Walmsley72e06d02010-12-21 21:05:16 -0700260extern struct pwrdm_ops omap4_pwrdm_operations;
261
262/* Common Internal functions used across OMAP rev's */
263extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank);
264extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank);
265extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
266
267extern struct powerdomain wkup_omap2_pwrdm;
268extern struct powerdomain gfx_omap2_pwrdm;
269
Paul Walmsley3a090282013-01-26 00:58:16 -0700270extern void pwrdm_lock(struct powerdomain *pwrdm);
271extern void pwrdm_unlock(struct powerdomain *pwrdm);
Paul Walmsley72e06d02010-12-21 21:05:16 -0700272
Paul Walmsleyad67ef62008-08-19 11:08:40 +0300273#endif