| Gabor Juhos | 0bd3acd | 2011-06-20 21:26:03 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Atheros AR933X UART defines |
| 3 | * |
| 4 | * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #ifndef __AR933X_UART_H |
| 12 | #define __AR933X_UART_H |
| 13 | |
| 14 | #define AR933X_UART_REGS_SIZE 20 |
| 15 | #define AR933X_UART_FIFO_SIZE 16 |
| 16 | |
| 17 | #define AR933X_UART_DATA_REG 0x00 |
| 18 | #define AR933X_UART_CS_REG 0x04 |
| 19 | #define AR933X_UART_CLOCK_REG 0x08 |
| 20 | #define AR933X_UART_INT_REG 0x0c |
| 21 | #define AR933X_UART_INT_EN_REG 0x10 |
| 22 | |
| 23 | #define AR933X_UART_DATA_TX_RX_MASK 0xff |
| 24 | #define AR933X_UART_DATA_RX_CSR BIT(8) |
| 25 | #define AR933X_UART_DATA_TX_CSR BIT(9) |
| 26 | |
| 27 | #define AR933X_UART_CS_PARITY_S 0 |
| 28 | #define AR933X_UART_CS_PARITY_M 0x3 |
| Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 29 | #define AR933X_UART_CS_PARITY_NONE 0 |
| Stefan Hellermann | 56b52fb | 2019-06-17 15:43:59 +0200 | [diff] [blame^] | 30 | #define AR933X_UART_CS_PARITY_ODD 2 |
| 31 | #define AR933X_UART_CS_PARITY_EVEN 3 |
| Gabor Juhos | 0bd3acd | 2011-06-20 21:26:03 +0200 | [diff] [blame] | 32 | #define AR933X_UART_CS_IF_MODE_S 2 |
| 33 | #define AR933X_UART_CS_IF_MODE_M 0x3 |
| Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 34 | #define AR933X_UART_CS_IF_MODE_NONE 0 |
| 35 | #define AR933X_UART_CS_IF_MODE_DTE 1 |
| 36 | #define AR933X_UART_CS_IF_MODE_DCE 2 |
| Gabor Juhos | 0bd3acd | 2011-06-20 21:26:03 +0200 | [diff] [blame] | 37 | #define AR933X_UART_CS_FLOW_CTRL_S 4 |
| 38 | #define AR933X_UART_CS_FLOW_CTRL_M 0x3 |
| 39 | #define AR933X_UART_CS_DMA_EN BIT(6) |
| 40 | #define AR933X_UART_CS_TX_READY_ORIDE BIT(7) |
| 41 | #define AR933X_UART_CS_RX_READY_ORIDE BIT(8) |
| 42 | #define AR933X_UART_CS_TX_READY BIT(9) |
| 43 | #define AR933X_UART_CS_RX_BREAK BIT(10) |
| 44 | #define AR933X_UART_CS_TX_BREAK BIT(11) |
| 45 | #define AR933X_UART_CS_HOST_INT BIT(12) |
| 46 | #define AR933X_UART_CS_HOST_INT_EN BIT(13) |
| 47 | #define AR933X_UART_CS_TX_BUSY BIT(14) |
| 48 | #define AR933X_UART_CS_RX_BUSY BIT(15) |
| 49 | |
| 50 | #define AR933X_UART_CLOCK_STEP_M 0xffff |
| 51 | #define AR933X_UART_CLOCK_SCALE_M 0xfff |
| 52 | #define AR933X_UART_CLOCK_SCALE_S 16 |
| 53 | #define AR933X_UART_CLOCK_STEP_M 0xffff |
| 54 | |
| 55 | #define AR933X_UART_INT_RX_VALID BIT(0) |
| 56 | #define AR933X_UART_INT_TX_READY BIT(1) |
| 57 | #define AR933X_UART_INT_RX_FRAMING_ERR BIT(2) |
| 58 | #define AR933X_UART_INT_RX_OFLOW_ERR BIT(3) |
| 59 | #define AR933X_UART_INT_TX_OFLOW_ERR BIT(4) |
| 60 | #define AR933X_UART_INT_RX_PARITY_ERR BIT(5) |
| 61 | #define AR933X_UART_INT_RX_BREAK_ON BIT(6) |
| 62 | #define AR933X_UART_INT_RX_BREAK_OFF BIT(7) |
| 63 | #define AR933X_UART_INT_RX_FULL BIT(8) |
| 64 | #define AR933X_UART_INT_TX_EMPTY BIT(9) |
| 65 | #define AR933X_UART_INT_ALLINTS 0x3ff |
| 66 | |
| 67 | #endif /* __AR933X_UART_H */ |