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Roland Dreieraef9ec32005-11-02 14:07:13 -08001/*
2 * Copyright (c) 2005 Cisco Systems. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Roland Dreieraef9ec32005-11-02 14:07:13 -080031 */
32
33#ifndef IB_SRP_H
34#define IB_SRP_H
35
36#include <linux/types.h>
37#include <linux/list.h>
Ingo Molnar8e9e5f4f2006-01-30 15:21:21 -080038#include <linux/mutex.h>
Roland Dreiercf368712006-03-24 15:47:26 -080039#include <linux/scatterlist.h>
Roland Dreieraef9ec32005-11-02 14:07:13 -080040
41#include <scsi/scsi_host.h>
42#include <scsi/scsi_cmnd.h>
43
44#include <rdma/ib_verbs.h>
45#include <rdma/ib_sa.h>
46#include <rdma/ib_cm.h>
Roland Dreierf5358a12006-06-17 20:37:29 -070047#include <rdma/ib_fmr_pool.h>
Roland Dreieraef9ec32005-11-02 14:07:13 -080048
49enum {
50 SRP_PATH_REC_TIMEOUT_MS = 1000,
51 SRP_ABORT_TIMEOUT_MS = 5000,
52
53 SRP_PORT_REDIRECT = 1,
54 SRP_DLID_REDIRECT = 2,
David Dillow9fe4bcf2008-01-08 17:08:52 -050055 SRP_STALE_CONN = 3,
Roland Dreieraef9ec32005-11-02 14:07:13 -080056
Vu Pham74b0a152006-06-17 20:37:32 -070057 SRP_DEF_SG_TABLESIZE = 12,
Roland Dreieraef9ec32005-11-02 14:07:13 -080058
Bart Van Assche4d73f952013-10-26 14:40:37 +020059 SRP_DEFAULT_QUEUE_SIZE = 1 << 6,
Bart Van Asschedd5e6e32010-08-30 19:27:20 +000060 SRP_RSP_SQ_SIZE = 1,
Bart Van Asschedd5e6e32010-08-30 19:27:20 +000061 SRP_TSK_MGMT_SQ_SIZE = 1,
Bart Van Assche4d73f952013-10-26 14:40:37 +020062 SRP_DEFAULT_CMD_SQ_SIZE = SRP_DEFAULT_QUEUE_SIZE - SRP_RSP_SQ_SIZE -
63 SRP_TSK_MGMT_SQ_SIZE,
Roland Dreieraef9ec32005-11-02 14:07:13 -080064
David Dillowf8b6e312010-11-26 13:02:21 -050065 SRP_TAG_NO_REQ = ~0U,
66 SRP_TAG_TSK_MGMT = 1U << 31,
Roland Dreierf5358a12006-06-17 20:37:29 -070067
Bart Van Assche52ede082014-05-20 15:07:45 +020068 SRP_MAX_PAGES_PER_MR = 512,
David Dillow8f26c9f2011-01-14 19:45:50 -050069
Bart Van Assche5cfb1782014-05-20 15:08:34 +020070 LOCAL_INV_WR_ID_MASK = 1,
71 FAST_REG_WR_ID_MASK = 2,
Bart Van Assche7dad6b22014-10-21 18:00:35 +020072
73 SRP_LAST_WR_ID = 0xfffffffcU,
Roland Dreieraef9ec32005-11-02 14:07:13 -080074};
75
Roland Dreieraef9ec32005-11-02 14:07:13 -080076enum srp_target_state {
Bart Van Assche34aa6542014-10-30 14:47:22 +010077 SRP_TARGET_SCANNING,
Roland Dreieraef9ec32005-11-02 14:07:13 -080078 SRP_TARGET_LIVE,
Bart Van Asscheef6c49d2011-12-26 16:49:18 +000079 SRP_TARGET_REMOVED,
Roland Dreieraef9ec32005-11-02 14:07:13 -080080};
81
David Dillowbb125882010-10-08 14:40:47 -040082enum srp_iu_type {
83 SRP_IU_CMD,
84 SRP_IU_TSK_MGMT,
85 SRP_IU_RSP,
David Dillow8cba2072007-12-19 17:08:43 -050086};
87
Bart Van Assche5cfb1782014-05-20 15:08:34 +020088/*
89 * @mr_page_mask: HCA memory registration page mask.
90 * @mr_page_size: HCA memory registration page size.
91 * @mr_max_size: Maximum size in bytes of a single FMR / FR registration
92 * request.
93 */
Roland Dreierf5358a12006-06-17 20:37:29 -070094struct srp_device {
95 struct list_head dev_list;
Roland Dreieraef9ec32005-11-02 14:07:13 -080096 struct ib_device *dev;
Roland Dreieraef9ec32005-11-02 14:07:13 -080097 struct ib_pd *pd;
Bart Van Assche03f6fb92015-08-10 17:09:36 -070098 struct ib_mr *global_mr;
Bart Van Assche52ede082014-05-20 15:07:45 +020099 u64 mr_page_mask;
100 int mr_page_size;
101 int mr_max_size;
102 int max_pages_per_mr;
Bart Van Assched1b42892014-05-20 15:07:20 +0200103 bool has_fmr;
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200104 bool has_fr;
Bart Van Assche002f1562015-08-10 17:08:44 -0700105 bool use_fmr;
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200106 bool use_fast_reg;
Roland Dreierf5358a12006-06-17 20:37:29 -0700107};
108
109struct srp_host {
Greg Kroah-Hartman05321932008-03-06 00:13:36 +0100110 struct srp_device *srp_dev;
Roland Dreierf5358a12006-06-17 20:37:29 -0700111 u8 port;
Tony Jonesee959b02008-02-22 00:13:36 +0100112 struct device dev;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800113 struct list_head target_list;
Matthew Wilcoxb3589fd2006-06-17 20:37:30 -0700114 spinlock_t target_lock;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800115 struct completion released;
116 struct list_head list;
Bart Van Assche2d7091b2014-03-14 13:52:45 +0100117 struct mutex add_target_mutex;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800118};
119
120struct srp_request {
Roland Dreieraef9ec32005-11-02 14:07:13 -0800121 struct scsi_cmnd *scmnd;
122 struct srp_iu *cmd;
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200123 union {
124 struct ib_pool_fmr **fmr_list;
125 struct srp_fr_desc **fr_list;
126 };
David Dillow8f26c9f2011-01-14 19:45:50 -0500127 u64 *map_page;
David Dillowc07d4242011-01-16 13:57:10 -0500128 struct srp_direct_buf *indirect_desc;
129 dma_addr_t indirect_dma_addr;
Bart Van Assche52ede082014-05-20 15:07:45 +0200130 short nmdesc;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800131};
132
Bart Van Assche509c07b2014-10-30 14:48:30 +0100133/**
134 * struct srp_rdma_ch
135 * @comp_vector: Completion vector used by this RDMA channel.
136 */
137struct srp_rdma_ch {
David Dillow9af76272010-11-26 15:34:46 -0500138 /* These are RW in the hot path, and commonly used together */
139 struct list_head free_tx;
David Dillow9af76272010-11-26 15:34:46 -0500140 spinlock_t lock;
141 s32 req_lim;
142
143 /* These are read-only in the hot path */
Bart Van Assche509c07b2014-10-30 14:48:30 +0100144 struct srp_target_port *target ____cacheline_aligned_in_smp;
145 struct ib_cq *send_cq;
David Dillow9af76272010-11-26 15:34:46 -0500146 struct ib_cq *recv_cq;
147 struct ib_qp *qp;
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200148 union {
149 struct ib_fmr_pool *fmr_pool;
150 struct srp_fr_pool *fr_pool;
151 };
Bart Van Assche509c07b2014-10-30 14:48:30 +0100152
153 /* Everything above this point is used in the hot path of
154 * command processing. Try to keep them packed into cachelines.
155 */
156
157 struct completion done;
158 int status;
159
160 struct ib_sa_path_rec path;
161 struct ib_sa_query *path_query;
162 int path_query_id;
163
164 struct ib_cm_id *cm_id;
165 struct srp_iu **tx_ring;
166 struct srp_iu **rx_ring;
167 struct srp_request *req_ring;
168 int max_ti_iu_len;
169 int comp_vector;
170
171 struct completion tsk_mgmt_done;
172 u8 tsk_mgmt_status;
Bart Van Asschec014c8c2015-05-18 13:23:57 +0200173 bool connected;
Bart Van Assche509c07b2014-10-30 14:48:30 +0100174};
175
176/**
177 * struct srp_target_port
178 * @comp_vector: Completion vector used by the first RDMA channel created for
179 * this target port.
180 */
181struct srp_target_port {
182 /* read and written in the hot path */
183 spinlock_t lock;
184
Bart Van Assche509c07b2014-10-30 14:48:30 +0100185 /* read only in the hot path */
Bart Van Assche03f6fb92015-08-10 17:09:36 -0700186 struct ib_mr *global_mr;
Bart Van Assched92c0da2014-10-06 17:14:36 +0200187 struct srp_rdma_ch *ch;
188 u32 ch_count;
David Dillow9af76272010-11-26 15:34:46 -0500189 u32 lkey;
David Dillow9af76272010-11-26 15:34:46 -0500190 enum srp_target_state state;
David Dillow49248642011-01-14 18:23:24 -0500191 unsigned int max_iu_len;
192 unsigned int cmd_sg_cnt;
David Dillowc07d4242011-01-16 13:57:10 -0500193 unsigned int indirect_size;
194 bool allow_ext_sg;
David Dillow9af76272010-11-26 15:34:46 -0500195
Bart Van Assche509c07b2014-10-30 14:48:30 +0100196 /* other member variables */
Bart Van Assche747fe002014-10-30 14:48:05 +0100197 union ib_gid sgid;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800198 __be64 id_ext;
199 __be64 ioc_guid;
200 __be64 service_id;
Ishai Rabinovitz01cb9bc2006-10-04 15:28:56 +0200201 __be64 initiator_ext;
Ramachandra K0c0450db2006-06-17 20:37:38 -0700202 u16 io_class;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800203 struct srp_host *srp_host;
204 struct Scsi_Host *scsi_host;
Bart Van Assche9dd69a62013-10-26 14:32:30 +0200205 struct srp_rport *rport;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800206 char target_name[32];
207 unsigned int scsi_id;
David Dillowc07d4242011-01-16 13:57:10 -0500208 unsigned int sg_tablesize;
Bart Van Assche4d73f952013-10-26 14:40:37 +0200209 int queue_size;
210 int req_ring_size;
Bart Van Assche4b5e5f42013-06-28 14:57:42 +0200211 int comp_vector;
Vu Pham7bb312e2013-10-26 14:31:27 +0200212 int tl_retry_count;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800213
Bart Van Assche747fe002014-10-30 14:48:05 +0100214 union ib_gid orig_dgid;
215 __be16 pkey;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800216
Bart Van Asschec9b03c12011-09-03 09:34:48 +0200217 u32 rq_tmo_jiffies;
218
Roland Dreier6bfa24f2006-06-17 20:37:33 -0700219 int zero_req_lim;
220
Bart Van Asschec1120f82013-10-26 14:35:08 +0200221 struct work_struct tl_err_work;
Bart Van Asscheef6c49d2011-12-26 16:49:18 +0000222 struct work_struct remove_work;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800223
224 struct list_head list;
Bart Van Assche948d1e82011-09-03 09:25:42 +0200225 bool qp_in_error;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800226};
227
228struct srp_iu {
Bart Van Asschedcb4cb82010-11-26 13:22:48 -0500229 struct list_head list;
Ralph Campbell85507bc2006-12-12 14:30:55 -0800230 u64 dma;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800231 void *buf;
232 size_t size;
233 enum dma_data_direction direction;
Roland Dreieraef9ec32005-11-02 14:07:13 -0800234};
235
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200236/**
237 * struct srp_fr_desc - fast registration work request arguments
238 * @entry: Entry in srp_fr_pool.free_list.
239 * @mr: Memory region.
240 * @frpl: Fast registration page list.
241 */
242struct srp_fr_desc {
243 struct list_head entry;
244 struct ib_mr *mr;
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200245};
246
247/**
248 * struct srp_fr_pool - pool of fast registration descriptors
249 *
250 * An entry is available for allocation if and only if it occurs in @free_list.
251 *
252 * @size: Number of descriptors in this pool.
253 * @max_page_list_len: Maximum fast registration work request page list length.
254 * @lock: Protects free_list.
255 * @free_list: List of free descriptors.
256 * @desc: Fast registration descriptor pool.
257 */
258struct srp_fr_pool {
259 int size;
260 int max_page_list_len;
261 spinlock_t lock;
262 struct list_head free_list;
263 struct srp_fr_desc desc[0];
264};
265
266/**
267 * struct srp_map_state - per-request DMA memory mapping state
268 * @desc: Pointer to the element of the SRP buffer descriptor array
269 * that is being filled in.
270 * @pages: Array with DMA addresses of pages being considered for
271 * memory registration.
272 * @base_dma_addr: DMA address of the first page that has not yet been mapped.
273 * @dma_len: Number of bytes that will be registered with the next
274 * FMR or FR memory registration call.
275 * @total_len: Total number of bytes in the sg-list being mapped.
276 * @npages: Number of page addresses in the pages[] array.
277 * @nmdesc: Number of FMR or FR memory descriptors used for mapping.
278 * @ndesc: Number of SRP buffer descriptors that have been filled in.
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200279 */
David Dillow8f26c9f2011-01-14 19:45:50 -0500280struct srp_map_state {
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200281 union {
Bart Van Asschef731ed62015-08-10 17:07:27 -0700282 struct {
283 struct ib_pool_fmr **next;
284 struct ib_pool_fmr **end;
285 } fmr;
286 struct {
287 struct srp_fr_desc **next;
288 struct srp_fr_desc **end;
289 } fr;
Bart Van Assche330179f2015-08-10 17:09:05 -0700290 struct {
291 void **next;
292 void **end;
293 } gen;
Bart Van Assche5cfb1782014-05-20 15:08:34 +0200294 };
David Dillow8f26c9f2011-01-14 19:45:50 -0500295 struct srp_direct_buf *desc;
Sagi Grimbergf7f7aab2015-10-13 19:11:39 +0300296 union {
297 u64 *pages;
298 struct scatterlist *sg;
299 };
David Dillow8f26c9f2011-01-14 19:45:50 -0500300 dma_addr_t base_dma_addr;
Bart Van Assche52ede082014-05-20 15:07:45 +0200301 u32 dma_len;
David Dillow8f26c9f2011-01-14 19:45:50 -0500302 u32 total_len;
Bart Van Assche57b0be92015-12-01 10:19:38 -0800303 unsigned int npages;
Bart Van Assche52ede082014-05-20 15:07:45 +0200304 unsigned int nmdesc;
David Dillow8f26c9f2011-01-14 19:45:50 -0500305 unsigned int ndesc;
David Dillow8f26c9f2011-01-14 19:45:50 -0500306};
307
Roland Dreieraef9ec32005-11-02 14:07:13 -0800308#endif /* IB_SRP_H */