Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1 | /* |
| 2 | * ALSA SoC McASP Audio Layer for TI DAVINCI processor |
| 3 | * |
| 4 | * Multi-channel Audio Serial Port Driver |
| 5 | * |
| 6 | * Author: Nirmal Pandey <n-pandey@ti.com>, |
| 7 | * Suresh Rajashekara <suresh.r@ti.com> |
| 8 | * Steve Chen <schen@.mvista.com> |
| 9 | * |
| 10 | * Copyright: (C) 2009 MontaVista Software, Inc., <source@mvista.com> |
| 11 | * Copyright: (C) 2009 Texas Instruments, India |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | * it under the terms of the GNU General Public License version 2 as |
| 15 | * published by the Free Software Foundation. |
| 16 | */ |
| 17 | |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/device.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 21 | #include <linux/slab.h> |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 22 | #include <linux/delay.h> |
| 23 | #include <linux/io.h> |
Hebbar, Gururaja | 1088434 | 2012-08-08 20:40:32 +0530 | [diff] [blame] | 24 | #include <linux/pm_runtime.h> |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 25 | #include <linux/of.h> |
| 26 | #include <linux/of_platform.h> |
| 27 | #include <linux/of_device.h> |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 28 | |
| 29 | #include <sound/core.h> |
| 30 | #include <sound/pcm.h> |
| 31 | #include <sound/pcm_params.h> |
| 32 | #include <sound/initval.h> |
| 33 | #include <sound/soc.h> |
| 34 | |
| 35 | #include "davinci-pcm.h" |
| 36 | #include "davinci-mcasp.h" |
| 37 | |
Peter Ujfalusi | 21400a7 | 2013-11-14 11:35:26 +0200 | [diff] [blame] | 38 | struct davinci_audio_dev { |
| 39 | struct davinci_pcm_dma_params dma_params[2]; |
| 40 | void __iomem *base; |
| 41 | struct device *dev; |
| 42 | |
| 43 | /* McASP specific data */ |
| 44 | int tdm_slots; |
| 45 | u8 op_mode; |
| 46 | u8 num_serializer; |
| 47 | u8 *serial_dir; |
| 48 | u8 version; |
| 49 | u16 bclk_lrclk_ratio; |
| 50 | |
| 51 | /* McASP FIFO related */ |
| 52 | u8 txnumevt; |
| 53 | u8 rxnumevt; |
| 54 | |
| 55 | #ifdef CONFIG_PM_SLEEP |
| 56 | struct { |
| 57 | u32 txfmtctl; |
| 58 | u32 rxfmtctl; |
| 59 | u32 txfmt; |
| 60 | u32 rxfmt; |
| 61 | u32 aclkxctl; |
| 62 | u32 aclkrctl; |
| 63 | u32 pdir; |
| 64 | } context; |
| 65 | #endif |
| 66 | }; |
| 67 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 68 | static inline void mcasp_set_bits(void __iomem *reg, u32 val) |
| 69 | { |
| 70 | __raw_writel(__raw_readl(reg) | val, reg); |
| 71 | } |
| 72 | |
| 73 | static inline void mcasp_clr_bits(void __iomem *reg, u32 val) |
| 74 | { |
| 75 | __raw_writel((__raw_readl(reg) & ~(val)), reg); |
| 76 | } |
| 77 | |
| 78 | static inline void mcasp_mod_bits(void __iomem *reg, u32 val, u32 mask) |
| 79 | { |
| 80 | __raw_writel((__raw_readl(reg) & ~mask) | val, reg); |
| 81 | } |
| 82 | |
| 83 | static inline void mcasp_set_reg(void __iomem *reg, u32 val) |
| 84 | { |
| 85 | __raw_writel(val, reg); |
| 86 | } |
| 87 | |
| 88 | static inline u32 mcasp_get_reg(void __iomem *reg) |
| 89 | { |
| 90 | return (unsigned int)__raw_readl(reg); |
| 91 | } |
| 92 | |
| 93 | static inline void mcasp_set_ctl_reg(void __iomem *regs, u32 val) |
| 94 | { |
| 95 | int i = 0; |
| 96 | |
| 97 | mcasp_set_bits(regs, val); |
| 98 | |
| 99 | /* programming GBLCTL needs to read back from GBLCTL and verfiy */ |
| 100 | /* loop count is to avoid the lock-up */ |
| 101 | for (i = 0; i < 1000; i++) { |
| 102 | if ((mcasp_get_reg(regs) & val) == val) |
| 103 | break; |
| 104 | } |
| 105 | |
| 106 | if (i == 1000 && ((mcasp_get_reg(regs) & val) != val)) |
| 107 | printk(KERN_ERR "GBLCTL write error\n"); |
| 108 | } |
| 109 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 110 | static void mcasp_start_rx(struct davinci_audio_dev *dev) |
| 111 | { |
| 112 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST); |
| 113 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST); |
| 114 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSERCLR); |
| 115 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXBUF_REG, 0); |
| 116 | |
| 117 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); |
| 118 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); |
| 119 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXBUF_REG, 0); |
| 120 | |
| 121 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); |
| 122 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); |
| 123 | } |
| 124 | |
| 125 | static void mcasp_start_tx(struct davinci_audio_dev *dev) |
| 126 | { |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 127 | u8 offset = 0, i; |
| 128 | u32 cnt; |
| 129 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 130 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST); |
| 131 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST); |
| 132 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXSERCLR); |
| 133 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); |
| 134 | |
| 135 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXSMRST); |
| 136 | mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, TXFSRST); |
| 137 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 138 | for (i = 0; i < dev->num_serializer; i++) { |
| 139 | if (dev->serial_dir[i] == TX_MODE) { |
| 140 | offset = i; |
| 141 | break; |
| 142 | } |
| 143 | } |
| 144 | |
| 145 | /* wait for TX ready */ |
| 146 | cnt = 0; |
| 147 | while (!(mcasp_get_reg(dev->base + DAVINCI_MCASP_XRSRCTL_REG(offset)) & |
| 148 | TXSTATE) && (cnt < 100000)) |
| 149 | cnt++; |
| 150 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 151 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); |
| 152 | } |
| 153 | |
| 154 | static void davinci_mcasp_start(struct davinci_audio_dev *dev, int stream) |
| 155 | { |
Chaithrika U S | 539d3d8 | 2009-09-23 10:12:08 -0400 | [diff] [blame] | 156 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
Vaibhav Bedia | 0d62427 | 2012-08-08 20:40:31 +0530 | [diff] [blame] | 157 | if (dev->txnumevt) { /* enable FIFO */ |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 158 | switch (dev->version) { |
| 159 | case MCASP_VERSION_3: |
| 160 | mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL, |
Vaibhav Bedia | 0d62427 | 2012-08-08 20:40:31 +0530 | [diff] [blame] | 161 | FIFO_ENABLE); |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 162 | mcasp_set_bits(dev->base + MCASP_VER3_WFIFOCTL, |
Chaithrika U S | 539d3d8 | 2009-09-23 10:12:08 -0400 | [diff] [blame] | 163 | FIFO_ENABLE); |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 164 | break; |
| 165 | default: |
| 166 | mcasp_clr_bits(dev->base + |
| 167 | DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE); |
| 168 | mcasp_set_bits(dev->base + |
| 169 | DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE); |
| 170 | } |
Vaibhav Bedia | 0d62427 | 2012-08-08 20:40:31 +0530 | [diff] [blame] | 171 | } |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 172 | mcasp_start_tx(dev); |
Chaithrika U S | 539d3d8 | 2009-09-23 10:12:08 -0400 | [diff] [blame] | 173 | } else { |
Vaibhav Bedia | 0d62427 | 2012-08-08 20:40:31 +0530 | [diff] [blame] | 174 | if (dev->rxnumevt) { /* enable FIFO */ |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 175 | switch (dev->version) { |
| 176 | case MCASP_VERSION_3: |
| 177 | mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL, |
Vaibhav Bedia | 0d62427 | 2012-08-08 20:40:31 +0530 | [diff] [blame] | 178 | FIFO_ENABLE); |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 179 | mcasp_set_bits(dev->base + MCASP_VER3_RFIFOCTL, |
Chaithrika U S | 539d3d8 | 2009-09-23 10:12:08 -0400 | [diff] [blame] | 180 | FIFO_ENABLE); |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 181 | break; |
| 182 | default: |
| 183 | mcasp_clr_bits(dev->base + |
| 184 | DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE); |
| 185 | mcasp_set_bits(dev->base + |
| 186 | DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE); |
| 187 | } |
Vaibhav Bedia | 0d62427 | 2012-08-08 20:40:31 +0530 | [diff] [blame] | 188 | } |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 189 | mcasp_start_rx(dev); |
Chaithrika U S | 539d3d8 | 2009-09-23 10:12:08 -0400 | [diff] [blame] | 190 | } |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 191 | } |
| 192 | |
| 193 | static void mcasp_stop_rx(struct davinci_audio_dev *dev) |
| 194 | { |
| 195 | mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, 0); |
| 196 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); |
| 197 | } |
| 198 | |
| 199 | static void mcasp_stop_tx(struct davinci_audio_dev *dev) |
| 200 | { |
| 201 | mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, 0); |
| 202 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); |
| 203 | } |
| 204 | |
| 205 | static void davinci_mcasp_stop(struct davinci_audio_dev *dev, int stream) |
| 206 | { |
Chaithrika U S | 539d3d8 | 2009-09-23 10:12:08 -0400 | [diff] [blame] | 207 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 208 | if (dev->txnumevt) { /* disable FIFO */ |
| 209 | switch (dev->version) { |
| 210 | case MCASP_VERSION_3: |
| 211 | mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL, |
Chaithrika U S | 539d3d8 | 2009-09-23 10:12:08 -0400 | [diff] [blame] | 212 | FIFO_ENABLE); |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 213 | break; |
| 214 | default: |
| 215 | mcasp_clr_bits(dev->base + |
| 216 | DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE); |
| 217 | } |
| 218 | } |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 219 | mcasp_stop_tx(dev); |
Chaithrika U S | 539d3d8 | 2009-09-23 10:12:08 -0400 | [diff] [blame] | 220 | } else { |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 221 | if (dev->rxnumevt) { /* disable FIFO */ |
| 222 | switch (dev->version) { |
| 223 | case MCASP_VERSION_3: |
| 224 | mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL, |
Chaithrika U S | 539d3d8 | 2009-09-23 10:12:08 -0400 | [diff] [blame] | 225 | FIFO_ENABLE); |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 226 | break; |
| 227 | |
| 228 | default: |
| 229 | mcasp_clr_bits(dev->base + |
| 230 | DAVINCI_MCASP_RFIFOCTL, FIFO_ENABLE); |
| 231 | } |
| 232 | } |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 233 | mcasp_stop_rx(dev); |
Chaithrika U S | 539d3d8 | 2009-09-23 10:12:08 -0400 | [diff] [blame] | 234 | } |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 235 | } |
| 236 | |
| 237 | static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, |
| 238 | unsigned int fmt) |
| 239 | { |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 240 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 241 | void __iomem *base = dev->base; |
| 242 | |
Daniel Mack | 5296cf2 | 2012-10-04 15:08:42 +0200 | [diff] [blame] | 243 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 244 | case SND_SOC_DAIFMT_DSP_B: |
| 245 | case SND_SOC_DAIFMT_AC97: |
| 246 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); |
| 247 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); |
| 248 | break; |
| 249 | default: |
| 250 | /* configure a full-word SYNC pulse (LRCLK) */ |
| 251 | mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); |
| 252 | mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); |
| 253 | |
| 254 | /* make 1st data bit occur one ACLK cycle after the frame sync */ |
| 255 | mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, FSXDLY(1)); |
| 256 | mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, FSRDLY(1)); |
| 257 | break; |
| 258 | } |
| 259 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 260 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 261 | case SND_SOC_DAIFMT_CBS_CFS: |
| 262 | /* codec is clock and frame slave */ |
| 263 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); |
| 264 | mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); |
| 265 | |
| 266 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); |
| 267 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); |
| 268 | |
Marek Belisko | 81ee683 | 2013-04-26 14:38:11 +0200 | [diff] [blame] | 269 | mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, |
| 270 | ACLKX | ACLKR); |
| 271 | mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, |
| 272 | AFSX | AFSR); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 273 | break; |
Chaithrika U S | 517ee6c | 2009-08-11 16:59:12 -0400 | [diff] [blame] | 274 | case SND_SOC_DAIFMT_CBM_CFS: |
| 275 | /* codec is clock master and frame slave */ |
Ben Gardiner | a90f549 | 2011-04-21 14:19:03 -0400 | [diff] [blame] | 276 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); |
Chaithrika U S | 517ee6c | 2009-08-11 16:59:12 -0400 | [diff] [blame] | 277 | mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); |
| 278 | |
Ben Gardiner | a90f549 | 2011-04-21 14:19:03 -0400 | [diff] [blame] | 279 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); |
Chaithrika U S | 517ee6c | 2009-08-11 16:59:12 -0400 | [diff] [blame] | 280 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); |
| 281 | |
Ben Gardiner | db92f43 | 2011-04-21 14:19:04 -0400 | [diff] [blame] | 282 | mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, |
| 283 | ACLKX | ACLKR); |
Ben Gardiner | 9595c8f | 2011-04-21 14:19:02 -0400 | [diff] [blame] | 284 | mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, |
Ben Gardiner | db92f43 | 2011-04-21 14:19:04 -0400 | [diff] [blame] | 285 | AFSX | AFSR); |
Chaithrika U S | 517ee6c | 2009-08-11 16:59:12 -0400 | [diff] [blame] | 286 | break; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 287 | case SND_SOC_DAIFMT_CBM_CFM: |
| 288 | /* codec is clock and frame master */ |
| 289 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); |
| 290 | mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); |
| 291 | |
| 292 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); |
| 293 | mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); |
| 294 | |
Ben Gardiner | 9595c8f | 2011-04-21 14:19:02 -0400 | [diff] [blame] | 295 | mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, |
| 296 | ACLKX | AHCLKX | AFSX | ACLKR | AHCLKR | AFSR); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 297 | break; |
| 298 | |
| 299 | default: |
| 300 | return -EINVAL; |
| 301 | } |
| 302 | |
| 303 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
| 304 | case SND_SOC_DAIFMT_IB_NF: |
| 305 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); |
| 306 | mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); |
| 307 | |
| 308 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); |
| 309 | mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); |
| 310 | break; |
| 311 | |
| 312 | case SND_SOC_DAIFMT_NB_IF: |
| 313 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); |
| 314 | mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); |
| 315 | |
| 316 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); |
| 317 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); |
| 318 | break; |
| 319 | |
| 320 | case SND_SOC_DAIFMT_IB_IF: |
| 321 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); |
| 322 | mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); |
| 323 | |
| 324 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); |
| 325 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); |
| 326 | break; |
| 327 | |
| 328 | case SND_SOC_DAIFMT_NB_NF: |
| 329 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); |
| 330 | mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); |
| 331 | |
Marek Belisko | df4a4ee | 2013-05-03 07:37:36 +0200 | [diff] [blame] | 332 | mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 333 | mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); |
| 334 | break; |
| 335 | |
| 336 | default: |
| 337 | return -EINVAL; |
| 338 | } |
| 339 | |
| 340 | return 0; |
| 341 | } |
| 342 | |
Daniel Mack | 4ed8c9b | 2012-10-04 15:08:39 +0200 | [diff] [blame] | 343 | static int davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div) |
| 344 | { |
| 345 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai); |
| 346 | |
| 347 | switch (div_id) { |
| 348 | case 0: /* MCLK divider */ |
| 349 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, |
| 350 | AHCLKXDIV(div - 1), AHCLKXDIV_MASK); |
| 351 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, |
| 352 | AHCLKRDIV(div - 1), AHCLKRDIV_MASK); |
| 353 | break; |
| 354 | |
| 355 | case 1: /* BCLK divider */ |
| 356 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, |
| 357 | ACLKXDIV(div - 1), ACLKXDIV_MASK); |
| 358 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_ACLKRCTL_REG, |
| 359 | ACLKRDIV(div - 1), ACLKRDIV_MASK); |
| 360 | break; |
| 361 | |
Daniel Mack | 1b3bc06 | 2012-12-05 18:20:38 +0100 | [diff] [blame] | 362 | case 2: /* BCLK/LRCLK ratio */ |
| 363 | dev->bclk_lrclk_ratio = div; |
| 364 | break; |
| 365 | |
Daniel Mack | 4ed8c9b | 2012-10-04 15:08:39 +0200 | [diff] [blame] | 366 | default: |
| 367 | return -EINVAL; |
| 368 | } |
| 369 | |
| 370 | return 0; |
| 371 | } |
| 372 | |
Daniel Mack | 5b66aa2 | 2012-10-04 15:08:41 +0200 | [diff] [blame] | 373 | static int davinci_mcasp_set_sysclk(struct snd_soc_dai *dai, int clk_id, |
| 374 | unsigned int freq, int dir) |
| 375 | { |
| 376 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai); |
| 377 | |
| 378 | if (dir == SND_SOC_CLOCK_OUT) { |
| 379 | mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); |
| 380 | mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); |
| 381 | mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AHCLKX); |
| 382 | } else { |
| 383 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); |
| 384 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); |
| 385 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AHCLKX); |
| 386 | } |
| 387 | |
| 388 | return 0; |
| 389 | } |
| 390 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 391 | static int davinci_config_channel_size(struct davinci_audio_dev *dev, |
Daniel Mack | ba764b3 | 2012-12-05 18:20:37 +0100 | [diff] [blame] | 392 | int word_length) |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 393 | { |
Daniel Mack | ba764b3 | 2012-12-05 18:20:37 +0100 | [diff] [blame] | 394 | u32 fmt; |
Daniel Mack | 7967189 | 2013-05-16 15:25:01 +0200 | [diff] [blame] | 395 | u32 tx_rotate = (word_length / 4) & 0x7; |
| 396 | u32 rx_rotate = (32 - word_length) / 4; |
Daniel Mack | ba764b3 | 2012-12-05 18:20:37 +0100 | [diff] [blame] | 397 | u32 mask = (1ULL << word_length) - 1; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 398 | |
Daniel Mack | 1b3bc06 | 2012-12-05 18:20:38 +0100 | [diff] [blame] | 399 | /* |
| 400 | * if s BCLK-to-LRCLK ratio has been configured via the set_clkdiv() |
| 401 | * callback, take it into account here. That allows us to for example |
| 402 | * send 32 bits per channel to the codec, while only 16 of them carry |
| 403 | * audio payload. |
Michal Bachraty | d486fea | 2013-04-19 15:28:44 +0200 | [diff] [blame] | 404 | * The clock ratio is given for a full period of data (for I2S format |
| 405 | * both left and right channels), so it has to be divided by number of |
| 406 | * tdm-slots (for I2S - divided by 2). |
Daniel Mack | 1b3bc06 | 2012-12-05 18:20:38 +0100 | [diff] [blame] | 407 | */ |
| 408 | if (dev->bclk_lrclk_ratio) |
Michal Bachraty | d486fea | 2013-04-19 15:28:44 +0200 | [diff] [blame] | 409 | word_length = dev->bclk_lrclk_ratio / dev->tdm_slots; |
Daniel Mack | 1b3bc06 | 2012-12-05 18:20:38 +0100 | [diff] [blame] | 410 | |
Daniel Mack | ba764b3 | 2012-12-05 18:20:37 +0100 | [diff] [blame] | 411 | /* mapping of the XSSZ bit-field as described in the datasheet */ |
| 412 | fmt = (word_length >> 1) - 1; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 413 | |
Yegor Yefremov | f5023af | 2013-04-04 16:13:20 +0200 | [diff] [blame] | 414 | if (dev->op_mode != DAVINCI_MCASP_DIT_MODE) { |
| 415 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, |
| 416 | RXSSZ(fmt), RXSSZ(0x0F)); |
| 417 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, |
| 418 | TXSSZ(fmt), TXSSZ(0x0F)); |
| 419 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, |
Daniel Mack | 7967189 | 2013-05-16 15:25:01 +0200 | [diff] [blame] | 420 | TXROT(tx_rotate), TXROT(7)); |
Yegor Yefremov | f5023af | 2013-04-04 16:13:20 +0200 | [diff] [blame] | 421 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, |
Daniel Mack | 7967189 | 2013-05-16 15:25:01 +0200 | [diff] [blame] | 422 | RXROT(rx_rotate), RXROT(7)); |
Yegor Yefremov | f5023af | 2013-04-04 16:13:20 +0200 | [diff] [blame] | 423 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXMASK_REG, |
| 424 | mask); |
| 425 | } |
| 426 | |
Chaithrika U S | 0c31cf3 | 2009-09-15 18:13:29 -0400 | [diff] [blame] | 427 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXMASK_REG, mask); |
Chaithrika U S | 0c31cf3 | 2009-09-15 18:13:29 -0400 | [diff] [blame] | 428 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 429 | return 0; |
| 430 | } |
| 431 | |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 432 | static int davinci_hw_common_param(struct davinci_audio_dev *dev, int stream, |
| 433 | int channels) |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 434 | { |
| 435 | int i; |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 436 | u8 tx_ser = 0; |
| 437 | u8 rx_ser = 0; |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 438 | u8 ser; |
| 439 | u8 slots = dev->tdm_slots; |
| 440 | u8 max_active_serializers = (channels + slots - 1) / slots; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 441 | /* Default configuration */ |
| 442 | mcasp_set_bits(dev->base + DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT); |
| 443 | |
| 444 | /* All PINS as McASP */ |
| 445 | mcasp_set_reg(dev->base + DAVINCI_MCASP_PFUNC_REG, 0x00000000); |
| 446 | |
| 447 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 448 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); |
| 449 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_XEVTCTL_REG, |
| 450 | TXDATADMADIS); |
| 451 | } else { |
| 452 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); |
| 453 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_REVTCTL_REG, |
| 454 | RXDATADMADIS); |
| 455 | } |
| 456 | |
| 457 | for (i = 0; i < dev->num_serializer; i++) { |
| 458 | mcasp_set_bits(dev->base + DAVINCI_MCASP_XRSRCTL_REG(i), |
| 459 | dev->serial_dir[i]); |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 460 | if (dev->serial_dir[i] == TX_MODE && |
| 461 | tx_ser < max_active_serializers) { |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 462 | mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, |
| 463 | AXR(i)); |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 464 | tx_ser++; |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 465 | } else if (dev->serial_dir[i] == RX_MODE && |
| 466 | rx_ser < max_active_serializers) { |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 467 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG, |
| 468 | AXR(i)); |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 469 | rx_ser++; |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 470 | } else { |
| 471 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_XRSRCTL_REG(i), |
| 472 | SRMOD_INACTIVE, SRMOD_MASK); |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 473 | } |
| 474 | } |
| 475 | |
Daniel Mack | ecf327c | 2013-03-08 14:19:38 +0100 | [diff] [blame] | 476 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 477 | ser = tx_ser; |
| 478 | else |
| 479 | ser = rx_ser; |
| 480 | |
| 481 | if (ser < max_active_serializers) { |
| 482 | dev_warn(dev->dev, "stream has more channels (%d) than are " |
| 483 | "enabled in mcasp (%d)\n", channels, ser * slots); |
| 484 | return -EINVAL; |
| 485 | } |
| 486 | |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 487 | if (dev->txnumevt && stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 488 | if (dev->txnumevt * tx_ser > 64) |
| 489 | dev->txnumevt = 1; |
| 490 | |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 491 | switch (dev->version) { |
| 492 | case MCASP_VERSION_3: |
| 493 | mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL, tx_ser, |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 494 | NUMDMA_MASK); |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 495 | mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL, |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 496 | ((dev->txnumevt * tx_ser) << 8), NUMEVT_MASK); |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 497 | break; |
| 498 | default: |
| 499 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_WFIFOCTL, |
| 500 | tx_ser, NUMDMA_MASK); |
| 501 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_WFIFOCTL, |
| 502 | ((dev->txnumevt * tx_ser) << 8), NUMEVT_MASK); |
| 503 | } |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 504 | } |
| 505 | |
| 506 | if (dev->rxnumevt && stream == SNDRV_PCM_STREAM_CAPTURE) { |
| 507 | if (dev->rxnumevt * rx_ser > 64) |
| 508 | dev->rxnumevt = 1; |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 509 | switch (dev->version) { |
| 510 | case MCASP_VERSION_3: |
| 511 | mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL, rx_ser, |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 512 | NUMDMA_MASK); |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 513 | mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL, |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 514 | ((dev->rxnumevt * rx_ser) << 8), NUMEVT_MASK); |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 515 | break; |
| 516 | default: |
| 517 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_RFIFOCTL, |
| 518 | rx_ser, NUMDMA_MASK); |
| 519 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_RFIFOCTL, |
| 520 | ((dev->rxnumevt * rx_ser) << 8), NUMEVT_MASK); |
| 521 | } |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 522 | } |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 523 | |
| 524 | return 0; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 525 | } |
| 526 | |
| 527 | static void davinci_hw_param(struct davinci_audio_dev *dev, int stream) |
| 528 | { |
| 529 | int i, active_slots; |
| 530 | u32 mask = 0; |
| 531 | |
| 532 | active_slots = (dev->tdm_slots > 31) ? 32 : dev->tdm_slots; |
| 533 | for (i = 0; i < active_slots; i++) |
| 534 | mask |= (1 << i); |
| 535 | |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 536 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC); |
| 537 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 538 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 539 | /* bit stream is MSB first with no delay */ |
| 540 | /* DSP_B mode */ |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 541 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, mask); |
| 542 | mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, TXORD); |
| 543 | |
Ben Gardiner | 049cfaa | 2011-04-21 14:19:01 -0400 | [diff] [blame] | 544 | if ((dev->tdm_slots >= 2) && (dev->tdm_slots <= 32)) |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 545 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, |
| 546 | FSXMOD(dev->tdm_slots), FSXMOD(0x1FF)); |
| 547 | else |
| 548 | printk(KERN_ERR "playback tdm slot %d not supported\n", |
| 549 | dev->tdm_slots); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 550 | } else { |
| 551 | /* bit stream is MSB first with no delay */ |
| 552 | /* DSP_B mode */ |
| 553 | mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, RXORD); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 554 | mcasp_set_reg(dev->base + DAVINCI_MCASP_RXTDM_REG, mask); |
| 555 | |
Ben Gardiner | 049cfaa | 2011-04-21 14:19:01 -0400 | [diff] [blame] | 556 | if ((dev->tdm_slots >= 2) && (dev->tdm_slots <= 32)) |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 557 | mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, |
| 558 | FSRMOD(dev->tdm_slots), FSRMOD(0x1FF)); |
| 559 | else |
| 560 | printk(KERN_ERR "capture tdm slot %d not supported\n", |
| 561 | dev->tdm_slots); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 562 | } |
| 563 | } |
| 564 | |
| 565 | /* S/PDIF */ |
| 566 | static void davinci_hw_dit_param(struct davinci_audio_dev *dev) |
| 567 | { |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 568 | /* Set the TX format : 24 bit right rotation, 32 bit slot, Pad 0 |
| 569 | and LSB first */ |
| 570 | mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, |
| 571 | TXROT(6) | TXSSZ(15)); |
| 572 | |
| 573 | /* Set TX frame synch : DIT Mode, 1 bit width, internal, rising edge */ |
| 574 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXFMCTL_REG, |
| 575 | AFSXE | FSXMOD(0x180)); |
| 576 | |
| 577 | /* Set the TX tdm : for all the slots */ |
| 578 | mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, 0xFFFFFFFF); |
| 579 | |
| 580 | /* Set the TX clock controls : div = 1 and internal */ |
| 581 | mcasp_set_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, |
| 582 | ACLKXE | TX_ASYNC); |
| 583 | |
| 584 | mcasp_clr_bits(dev->base + DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); |
| 585 | |
| 586 | /* Only 44100 and 48000 are valid, both have the same setting */ |
| 587 | mcasp_set_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(3)); |
| 588 | |
| 589 | /* Enable the DIT */ |
| 590 | mcasp_set_bits(dev->base + DAVINCI_MCASP_TXDITCTL_REG, DITEN); |
| 591 | } |
| 592 | |
| 593 | static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, |
| 594 | struct snd_pcm_hw_params *params, |
| 595 | struct snd_soc_dai *cpu_dai) |
| 596 | { |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 597 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 598 | struct davinci_pcm_dma_params *dma_params = |
Troy Kisky | 92e2a6f | 2009-09-11 14:29:03 -0700 | [diff] [blame] | 599 | &dev->dma_params[substream->stream]; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 600 | int word_length; |
Chaithrika U S | 4fa9c1a | 2009-09-30 17:32:27 -0400 | [diff] [blame] | 601 | u8 fifo_level; |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 602 | u8 slots = dev->tdm_slots; |
Michal Bachraty | 7c21a78 | 2013-04-19 15:28:03 +0200 | [diff] [blame] | 603 | u8 active_serializers; |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 604 | int channels; |
| 605 | struct snd_interval *pcm_channels = hw_param_interval(params, |
| 606 | SNDRV_PCM_HW_PARAM_CHANNELS); |
| 607 | channels = pcm_channels->min; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 608 | |
Michal Bachraty | 7c21a78 | 2013-04-19 15:28:03 +0200 | [diff] [blame] | 609 | active_serializers = (channels + slots - 1) / slots; |
| 610 | |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 611 | if (davinci_hw_common_param(dev, substream->stream, channels) == -EINVAL) |
| 612 | return -EINVAL; |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 613 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
Michal Bachraty | 7c21a78 | 2013-04-19 15:28:03 +0200 | [diff] [blame] | 614 | fifo_level = dev->txnumevt * active_serializers; |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 615 | else |
Michal Bachraty | 7c21a78 | 2013-04-19 15:28:03 +0200 | [diff] [blame] | 616 | fifo_level = dev->rxnumevt * active_serializers; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 617 | |
| 618 | if (dev->op_mode == DAVINCI_MCASP_DIT_MODE) |
| 619 | davinci_hw_dit_param(dev); |
| 620 | else |
| 621 | davinci_hw_param(dev, substream->stream); |
| 622 | |
| 623 | switch (params_format(params)) { |
Ben Gardiner | 0a9d138 | 2011-08-26 12:02:44 -0400 | [diff] [blame] | 624 | case SNDRV_PCM_FORMAT_U8: |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 625 | case SNDRV_PCM_FORMAT_S8: |
| 626 | dma_params->data_type = 1; |
Daniel Mack | ba764b3 | 2012-12-05 18:20:37 +0100 | [diff] [blame] | 627 | word_length = 8; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 628 | break; |
| 629 | |
Ben Gardiner | 0a9d138 | 2011-08-26 12:02:44 -0400 | [diff] [blame] | 630 | case SNDRV_PCM_FORMAT_U16_LE: |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 631 | case SNDRV_PCM_FORMAT_S16_LE: |
| 632 | dma_params->data_type = 2; |
Daniel Mack | ba764b3 | 2012-12-05 18:20:37 +0100 | [diff] [blame] | 633 | word_length = 16; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 634 | break; |
| 635 | |
Daniel Mack | 21eb24d | 2012-10-09 09:35:16 +0200 | [diff] [blame] | 636 | case SNDRV_PCM_FORMAT_U24_3LE: |
| 637 | case SNDRV_PCM_FORMAT_S24_3LE: |
Daniel Mack | 21eb24d | 2012-10-09 09:35:16 +0200 | [diff] [blame] | 638 | dma_params->data_type = 3; |
Daniel Mack | ba764b3 | 2012-12-05 18:20:37 +0100 | [diff] [blame] | 639 | word_length = 24; |
Daniel Mack | 21eb24d | 2012-10-09 09:35:16 +0200 | [diff] [blame] | 640 | break; |
| 641 | |
Daniel Mack | 6b7fa01 | 2012-10-09 11:56:40 +0200 | [diff] [blame] | 642 | case SNDRV_PCM_FORMAT_U24_LE: |
| 643 | case SNDRV_PCM_FORMAT_S24_LE: |
Ben Gardiner | 0a9d138 | 2011-08-26 12:02:44 -0400 | [diff] [blame] | 644 | case SNDRV_PCM_FORMAT_U32_LE: |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 645 | case SNDRV_PCM_FORMAT_S32_LE: |
| 646 | dma_params->data_type = 4; |
Daniel Mack | ba764b3 | 2012-12-05 18:20:37 +0100 | [diff] [blame] | 647 | word_length = 32; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 648 | break; |
| 649 | |
| 650 | default: |
| 651 | printk(KERN_WARNING "davinci-mcasp: unsupported PCM format"); |
| 652 | return -EINVAL; |
| 653 | } |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 654 | |
Chaithrika U S | 4fa9c1a | 2009-09-30 17:32:27 -0400 | [diff] [blame] | 655 | if (dev->version == MCASP_VERSION_2 && !fifo_level) |
| 656 | dma_params->acnt = 4; |
| 657 | else |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 658 | dma_params->acnt = dma_params->data_type; |
| 659 | |
Chaithrika U S | 4fa9c1a | 2009-09-30 17:32:27 -0400 | [diff] [blame] | 660 | dma_params->fifo_level = fifo_level; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 661 | davinci_config_channel_size(dev, word_length); |
| 662 | |
| 663 | return 0; |
| 664 | } |
| 665 | |
| 666 | static int davinci_mcasp_trigger(struct snd_pcm_substream *substream, |
| 667 | int cmd, struct snd_soc_dai *cpu_dai) |
| 668 | { |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 669 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 670 | int ret = 0; |
| 671 | |
| 672 | switch (cmd) { |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 673 | case SNDRV_PCM_TRIGGER_RESUME: |
Chaithrika U S | e473b84 | 2010-01-20 17:06:33 +0530 | [diff] [blame] | 674 | case SNDRV_PCM_TRIGGER_START: |
| 675 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
Hebbar, Gururaja | 1088434 | 2012-08-08 20:40:32 +0530 | [diff] [blame] | 676 | ret = pm_runtime_get_sync(dev->dev); |
| 677 | if (IS_ERR_VALUE(ret)) |
| 678 | dev_err(dev->dev, "pm_runtime_get_sync() failed\n"); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 679 | davinci_mcasp_start(dev, substream->stream); |
| 680 | break; |
| 681 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 682 | case SNDRV_PCM_TRIGGER_SUSPEND: |
Chaithrika U S | a47979b | 2009-12-03 18:56:56 +0530 | [diff] [blame] | 683 | davinci_mcasp_stop(dev, substream->stream); |
Hebbar, Gururaja | 1088434 | 2012-08-08 20:40:32 +0530 | [diff] [blame] | 684 | ret = pm_runtime_put_sync(dev->dev); |
| 685 | if (IS_ERR_VALUE(ret)) |
| 686 | dev_err(dev->dev, "pm_runtime_put_sync() failed\n"); |
Chaithrika U S | a47979b | 2009-12-03 18:56:56 +0530 | [diff] [blame] | 687 | break; |
| 688 | |
| 689 | case SNDRV_PCM_TRIGGER_STOP: |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 690 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 691 | davinci_mcasp_stop(dev, substream->stream); |
| 692 | break; |
| 693 | |
| 694 | default: |
| 695 | ret = -EINVAL; |
| 696 | } |
| 697 | |
| 698 | return ret; |
| 699 | } |
| 700 | |
Chris Paulson-Ellis | bedad0c | 2010-11-16 12:27:09 +0000 | [diff] [blame] | 701 | static int davinci_mcasp_startup(struct snd_pcm_substream *substream, |
| 702 | struct snd_soc_dai *dai) |
| 703 | { |
| 704 | struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai); |
| 705 | |
| 706 | snd_soc_dai_set_dma_data(dai, substream, dev->dma_params); |
| 707 | return 0; |
| 708 | } |
| 709 | |
Lars-Peter Clausen | 85e7652 | 2011-11-23 11:40:40 +0100 | [diff] [blame] | 710 | static const struct snd_soc_dai_ops davinci_mcasp_dai_ops = { |
Chris Paulson-Ellis | bedad0c | 2010-11-16 12:27:09 +0000 | [diff] [blame] | 711 | .startup = davinci_mcasp_startup, |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 712 | .trigger = davinci_mcasp_trigger, |
| 713 | .hw_params = davinci_mcasp_hw_params, |
| 714 | .set_fmt = davinci_mcasp_set_dai_fmt, |
Daniel Mack | 4ed8c9b | 2012-10-04 15:08:39 +0200 | [diff] [blame] | 715 | .set_clkdiv = davinci_mcasp_set_clkdiv, |
Daniel Mack | 5b66aa2 | 2012-10-04 15:08:41 +0200 | [diff] [blame] | 716 | .set_sysclk = davinci_mcasp_set_sysclk, |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 717 | }; |
| 718 | |
Peter Ujfalusi | ed29cd5 | 2013-11-14 11:35:22 +0200 | [diff] [blame] | 719 | #define DAVINCI_MCASP_RATES SNDRV_PCM_RATE_8000_192000 |
| 720 | |
Ben Gardiner | 0a9d138 | 2011-08-26 12:02:44 -0400 | [diff] [blame] | 721 | #define DAVINCI_MCASP_PCM_FMTS (SNDRV_PCM_FMTBIT_S8 | \ |
| 722 | SNDRV_PCM_FMTBIT_U8 | \ |
| 723 | SNDRV_PCM_FMTBIT_S16_LE | \ |
| 724 | SNDRV_PCM_FMTBIT_U16_LE | \ |
Daniel Mack | 21eb24d | 2012-10-09 09:35:16 +0200 | [diff] [blame] | 725 | SNDRV_PCM_FMTBIT_S24_LE | \ |
| 726 | SNDRV_PCM_FMTBIT_U24_LE | \ |
| 727 | SNDRV_PCM_FMTBIT_S24_3LE | \ |
| 728 | SNDRV_PCM_FMTBIT_U24_3LE | \ |
Ben Gardiner | 0a9d138 | 2011-08-26 12:02:44 -0400 | [diff] [blame] | 729 | SNDRV_PCM_FMTBIT_S32_LE | \ |
| 730 | SNDRV_PCM_FMTBIT_U32_LE) |
| 731 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 732 | static struct snd_soc_dai_driver davinci_mcasp_dai[] = { |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 733 | { |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 734 | .name = "davinci-mcasp.0", |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 735 | .playback = { |
| 736 | .channels_min = 2, |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 737 | .channels_max = 32 * 16, |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 738 | .rates = DAVINCI_MCASP_RATES, |
Ben Gardiner | 0a9d138 | 2011-08-26 12:02:44 -0400 | [diff] [blame] | 739 | .formats = DAVINCI_MCASP_PCM_FMTS, |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 740 | }, |
| 741 | .capture = { |
| 742 | .channels_min = 2, |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 743 | .channels_max = 32 * 16, |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 744 | .rates = DAVINCI_MCASP_RATES, |
Ben Gardiner | 0a9d138 | 2011-08-26 12:02:44 -0400 | [diff] [blame] | 745 | .formats = DAVINCI_MCASP_PCM_FMTS, |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 746 | }, |
| 747 | .ops = &davinci_mcasp_dai_ops, |
| 748 | |
| 749 | }, |
| 750 | { |
Peter Ujfalusi | 58e48d9 | 2013-11-14 11:35:24 +0200 | [diff] [blame] | 751 | .name = "davinci-mcasp.1", |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 752 | .playback = { |
| 753 | .channels_min = 1, |
| 754 | .channels_max = 384, |
| 755 | .rates = DAVINCI_MCASP_RATES, |
Ben Gardiner | 0a9d138 | 2011-08-26 12:02:44 -0400 | [diff] [blame] | 756 | .formats = DAVINCI_MCASP_PCM_FMTS, |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 757 | }, |
| 758 | .ops = &davinci_mcasp_dai_ops, |
| 759 | }, |
| 760 | |
| 761 | }; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 762 | |
Kuninori Morimoto | eeef0ed | 2013-03-21 03:31:19 -0700 | [diff] [blame] | 763 | static const struct snd_soc_component_driver davinci_mcasp_component = { |
| 764 | .name = "davinci-mcasp", |
| 765 | }; |
| 766 | |
Jyri Sarha | 256ba18 | 2013-10-18 18:37:42 +0300 | [diff] [blame] | 767 | /* Some HW specific values and defaults. The rest is filled in from DT. */ |
| 768 | static struct snd_platform_data dm646x_mcasp_pdata = { |
| 769 | .tx_dma_offset = 0x400, |
| 770 | .rx_dma_offset = 0x400, |
| 771 | .asp_chan_q = EVENTQ_0, |
| 772 | .version = MCASP_VERSION_1, |
| 773 | }; |
| 774 | |
| 775 | static struct snd_platform_data da830_mcasp_pdata = { |
| 776 | .tx_dma_offset = 0x2000, |
| 777 | .rx_dma_offset = 0x2000, |
| 778 | .asp_chan_q = EVENTQ_0, |
| 779 | .version = MCASP_VERSION_2, |
| 780 | }; |
| 781 | |
| 782 | static struct snd_platform_data omap2_mcasp_pdata = { |
| 783 | .tx_dma_offset = 0, |
| 784 | .rx_dma_offset = 0, |
| 785 | .asp_chan_q = EVENTQ_0, |
| 786 | .version = MCASP_VERSION_3, |
| 787 | }; |
| 788 | |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 789 | static const struct of_device_id mcasp_dt_ids[] = { |
| 790 | { |
| 791 | .compatible = "ti,dm646x-mcasp-audio", |
Jyri Sarha | 256ba18 | 2013-10-18 18:37:42 +0300 | [diff] [blame] | 792 | .data = &dm646x_mcasp_pdata, |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 793 | }, |
| 794 | { |
| 795 | .compatible = "ti,da830-mcasp-audio", |
Jyri Sarha | 256ba18 | 2013-10-18 18:37:42 +0300 | [diff] [blame] | 796 | .data = &da830_mcasp_pdata, |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 797 | }, |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 798 | { |
Jyri Sarha | 3af9e03 | 2013-10-18 18:37:44 +0300 | [diff] [blame] | 799 | .compatible = "ti,am33xx-mcasp-audio", |
Jyri Sarha | 256ba18 | 2013-10-18 18:37:42 +0300 | [diff] [blame] | 800 | .data = &omap2_mcasp_pdata, |
Hebbar, Gururaja | e5ec69d | 2012-09-03 13:40:40 +0530 | [diff] [blame] | 801 | }, |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 802 | { /* sentinel */ } |
| 803 | }; |
| 804 | MODULE_DEVICE_TABLE(of, mcasp_dt_ids); |
| 805 | |
| 806 | static struct snd_platform_data *davinci_mcasp_set_pdata_from_of( |
| 807 | struct platform_device *pdev) |
| 808 | { |
| 809 | struct device_node *np = pdev->dev.of_node; |
| 810 | struct snd_platform_data *pdata = NULL; |
| 811 | const struct of_device_id *match = |
Sachin Kamat | ea421eb | 2013-05-22 16:53:37 +0530 | [diff] [blame] | 812 | of_match_device(mcasp_dt_ids, &pdev->dev); |
Jyri Sarha | 4023fe6 | 2013-10-18 18:37:43 +0300 | [diff] [blame] | 813 | struct of_phandle_args dma_spec; |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 814 | |
| 815 | const u32 *of_serial_dir32; |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 816 | u32 val; |
| 817 | int i, ret = 0; |
| 818 | |
| 819 | if (pdev->dev.platform_data) { |
| 820 | pdata = pdev->dev.platform_data; |
| 821 | return pdata; |
| 822 | } else if (match) { |
Jyri Sarha | 256ba18 | 2013-10-18 18:37:42 +0300 | [diff] [blame] | 823 | pdata = (struct snd_platform_data *) match->data; |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 824 | } else { |
| 825 | /* control shouldn't reach here. something is wrong */ |
| 826 | ret = -EINVAL; |
| 827 | goto nodata; |
| 828 | } |
| 829 | |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 830 | ret = of_property_read_u32(np, "op-mode", &val); |
| 831 | if (ret >= 0) |
| 832 | pdata->op_mode = val; |
| 833 | |
| 834 | ret = of_property_read_u32(np, "tdm-slots", &val); |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 835 | if (ret >= 0) { |
| 836 | if (val < 2 || val > 32) { |
| 837 | dev_err(&pdev->dev, |
| 838 | "tdm-slots must be in rage [2-32]\n"); |
| 839 | ret = -EINVAL; |
| 840 | goto nodata; |
| 841 | } |
| 842 | |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 843 | pdata->tdm_slots = val; |
Michal Bachraty | 2952b27 | 2013-02-28 16:07:08 +0100 | [diff] [blame] | 844 | } |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 845 | |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 846 | of_serial_dir32 = of_get_property(np, "serial-dir", &val); |
| 847 | val /= sizeof(u32); |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 848 | if (of_serial_dir32) { |
Peter Ujfalusi | 1427e66 | 2013-10-18 18:37:46 +0300 | [diff] [blame] | 849 | u8 *of_serial_dir = devm_kzalloc(&pdev->dev, |
| 850 | (sizeof(*of_serial_dir) * val), |
| 851 | GFP_KERNEL); |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 852 | if (!of_serial_dir) { |
| 853 | ret = -ENOMEM; |
| 854 | goto nodata; |
| 855 | } |
| 856 | |
Peter Ujfalusi | 1427e66 | 2013-10-18 18:37:46 +0300 | [diff] [blame] | 857 | for (i = 0; i < val; i++) |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 858 | of_serial_dir[i] = be32_to_cpup(&of_serial_dir32[i]); |
| 859 | |
Peter Ujfalusi | 1427e66 | 2013-10-18 18:37:46 +0300 | [diff] [blame] | 860 | pdata->num_serializer = val; |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 861 | pdata->serial_dir = of_serial_dir; |
| 862 | } |
| 863 | |
Jyri Sarha | 4023fe6 | 2013-10-18 18:37:43 +0300 | [diff] [blame] | 864 | ret = of_property_match_string(np, "dma-names", "tx"); |
| 865 | if (ret < 0) |
| 866 | goto nodata; |
| 867 | |
| 868 | ret = of_parse_phandle_with_args(np, "dmas", "#dma-cells", ret, |
| 869 | &dma_spec); |
| 870 | if (ret < 0) |
| 871 | goto nodata; |
| 872 | |
| 873 | pdata->tx_dma_channel = dma_spec.args[0]; |
| 874 | |
| 875 | ret = of_property_match_string(np, "dma-names", "rx"); |
| 876 | if (ret < 0) |
| 877 | goto nodata; |
| 878 | |
| 879 | ret = of_parse_phandle_with_args(np, "dmas", "#dma-cells", ret, |
| 880 | &dma_spec); |
| 881 | if (ret < 0) |
| 882 | goto nodata; |
| 883 | |
| 884 | pdata->rx_dma_channel = dma_spec.args[0]; |
| 885 | |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 886 | ret = of_property_read_u32(np, "tx-num-evt", &val); |
| 887 | if (ret >= 0) |
| 888 | pdata->txnumevt = val; |
| 889 | |
| 890 | ret = of_property_read_u32(np, "rx-num-evt", &val); |
| 891 | if (ret >= 0) |
| 892 | pdata->rxnumevt = val; |
| 893 | |
| 894 | ret = of_property_read_u32(np, "sram-size-playback", &val); |
| 895 | if (ret >= 0) |
| 896 | pdata->sram_size_playback = val; |
| 897 | |
| 898 | ret = of_property_read_u32(np, "sram-size-capture", &val); |
| 899 | if (ret >= 0) |
| 900 | pdata->sram_size_capture = val; |
| 901 | |
| 902 | return pdata; |
| 903 | |
| 904 | nodata: |
| 905 | if (ret < 0) { |
| 906 | dev_err(&pdev->dev, "Error populating platform data, err %d\n", |
| 907 | ret); |
| 908 | pdata = NULL; |
| 909 | } |
| 910 | return pdata; |
| 911 | } |
| 912 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 913 | static int davinci_mcasp_probe(struct platform_device *pdev) |
| 914 | { |
| 915 | struct davinci_pcm_dma_params *dma_data; |
Jyri Sarha | 256ba18 | 2013-10-18 18:37:42 +0300 | [diff] [blame] | 916 | struct resource *mem, *ioarea, *res, *dat; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 917 | struct snd_platform_data *pdata; |
| 918 | struct davinci_audio_dev *dev; |
Julia Lawall | 96d31e2 | 2011-12-29 17:51:21 +0100 | [diff] [blame] | 919 | int ret; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 920 | |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 921 | if (!pdev->dev.platform_data && !pdev->dev.of_node) { |
| 922 | dev_err(&pdev->dev, "No platform data supplied\n"); |
| 923 | return -EINVAL; |
| 924 | } |
| 925 | |
Julia Lawall | 96d31e2 | 2011-12-29 17:51:21 +0100 | [diff] [blame] | 926 | dev = devm_kzalloc(&pdev->dev, sizeof(struct davinci_audio_dev), |
| 927 | GFP_KERNEL); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 928 | if (!dev) |
| 929 | return -ENOMEM; |
| 930 | |
Hebbar, Gururaja | 3e3b8c3 | 2012-08-27 18:56:42 +0530 | [diff] [blame] | 931 | pdata = davinci_mcasp_set_pdata_from_of(pdev); |
| 932 | if (!pdata) { |
| 933 | dev_err(&pdev->dev, "no platform data\n"); |
| 934 | return -EINVAL; |
| 935 | } |
| 936 | |
Jyri Sarha | 256ba18 | 2013-10-18 18:37:42 +0300 | [diff] [blame] | 937 | mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 938 | if (!mem) { |
Jyri Sarha | 256ba18 | 2013-10-18 18:37:42 +0300 | [diff] [blame] | 939 | dev_warn(dev->dev, |
| 940 | "\"mpu\" mem resource not found, using index 0\n"); |
| 941 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 942 | if (!mem) { |
| 943 | dev_err(&pdev->dev, "no mem resource?\n"); |
| 944 | return -ENODEV; |
| 945 | } |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 946 | } |
| 947 | |
Julia Lawall | 96d31e2 | 2011-12-29 17:51:21 +0100 | [diff] [blame] | 948 | ioarea = devm_request_mem_region(&pdev->dev, mem->start, |
Vaibhav Bedia | d852f446 | 2011-02-09 18:39:52 +0530 | [diff] [blame] | 949 | resource_size(mem), pdev->name); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 950 | if (!ioarea) { |
| 951 | dev_err(&pdev->dev, "Audio region already claimed\n"); |
Julia Lawall | 96d31e2 | 2011-12-29 17:51:21 +0100 | [diff] [blame] | 952 | return -EBUSY; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 953 | } |
| 954 | |
Hebbar, Gururaja | 1088434 | 2012-08-08 20:40:32 +0530 | [diff] [blame] | 955 | pm_runtime_enable(&pdev->dev); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 956 | |
Hebbar, Gururaja | 1088434 | 2012-08-08 20:40:32 +0530 | [diff] [blame] | 957 | ret = pm_runtime_get_sync(&pdev->dev); |
| 958 | if (IS_ERR_VALUE(ret)) { |
| 959 | dev_err(&pdev->dev, "pm_runtime_get_sync() failed\n"); |
| 960 | return ret; |
| 961 | } |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 962 | |
Julia Lawall | 96d31e2 | 2011-12-29 17:51:21 +0100 | [diff] [blame] | 963 | dev->base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem)); |
Vaibhav Bedia | 4f82f02 | 2011-02-09 18:39:54 +0530 | [diff] [blame] | 964 | if (!dev->base) { |
| 965 | dev_err(&pdev->dev, "ioremap failed\n"); |
| 966 | ret = -ENOMEM; |
| 967 | goto err_release_clk; |
| 968 | } |
| 969 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 970 | dev->op_mode = pdata->op_mode; |
| 971 | dev->tdm_slots = pdata->tdm_slots; |
| 972 | dev->num_serializer = pdata->num_serializer; |
| 973 | dev->serial_dir = pdata->serial_dir; |
Chaithrika U S | 6a99fb5 | 2009-08-11 16:58:52 -0400 | [diff] [blame] | 974 | dev->version = pdata->version; |
| 975 | dev->txnumevt = pdata->txnumevt; |
| 976 | dev->rxnumevt = pdata->rxnumevt; |
Hebbar, Gururaja | 1088434 | 2012-08-08 20:40:32 +0530 | [diff] [blame] | 977 | dev->dev = &pdev->dev; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 978 | |
Jyri Sarha | 256ba18 | 2013-10-18 18:37:42 +0300 | [diff] [blame] | 979 | dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); |
| 980 | if (!dat) |
| 981 | dat = mem; |
| 982 | |
Troy Kisky | 92e2a6f | 2009-09-11 14:29:03 -0700 | [diff] [blame] | 983 | dma_data = &dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK]; |
Sekhar Nori | 48519f0 | 2010-07-19 12:31:16 +0530 | [diff] [blame] | 984 | dma_data->asp_chan_q = pdata->asp_chan_q; |
| 985 | dma_data->ram_chan_q = pdata->ram_chan_q; |
Matt Porter | b8ec56d | 2012-10-17 16:08:03 +0200 | [diff] [blame] | 986 | dma_data->sram_pool = pdata->sram_pool; |
Ben Gardiner | a0c8326 | 2011-05-18 09:27:45 -0400 | [diff] [blame] | 987 | dma_data->sram_size = pdata->sram_size_playback; |
Jyri Sarha | 256ba18 | 2013-10-18 18:37:42 +0300 | [diff] [blame] | 988 | dma_data->dma_addr = dat->start + pdata->tx_dma_offset; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 989 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 990 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); |
Jyri Sarha | 4023fe6 | 2013-10-18 18:37:43 +0300 | [diff] [blame] | 991 | if (res) |
| 992 | dma_data->channel = res->start; |
| 993 | else |
| 994 | dma_data->channel = pdata->tx_dma_channel; |
Troy Kisky | 92e2a6f | 2009-09-11 14:29:03 -0700 | [diff] [blame] | 995 | |
| 996 | dma_data = &dev->dma_params[SNDRV_PCM_STREAM_CAPTURE]; |
Sekhar Nori | 48519f0 | 2010-07-19 12:31:16 +0530 | [diff] [blame] | 997 | dma_data->asp_chan_q = pdata->asp_chan_q; |
| 998 | dma_data->ram_chan_q = pdata->ram_chan_q; |
Matt Porter | b8ec56d | 2012-10-17 16:08:03 +0200 | [diff] [blame] | 999 | dma_data->sram_pool = pdata->sram_pool; |
Ben Gardiner | a0c8326 | 2011-05-18 09:27:45 -0400 | [diff] [blame] | 1000 | dma_data->sram_size = pdata->sram_size_capture; |
Jyri Sarha | 256ba18 | 2013-10-18 18:37:42 +0300 | [diff] [blame] | 1001 | dma_data->dma_addr = dat->start + pdata->rx_dma_offset; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1002 | |
| 1003 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); |
Jyri Sarha | 4023fe6 | 2013-10-18 18:37:43 +0300 | [diff] [blame] | 1004 | if (res) |
| 1005 | dma_data->channel = res->start; |
| 1006 | else |
| 1007 | dma_data->channel = pdata->rx_dma_channel; |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1008 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 1009 | dev_set_drvdata(&pdev->dev, dev); |
Kuninori Morimoto | eeef0ed | 2013-03-21 03:31:19 -0700 | [diff] [blame] | 1010 | ret = snd_soc_register_component(&pdev->dev, &davinci_mcasp_component, |
| 1011 | &davinci_mcasp_dai[pdata->op_mode], 1); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1012 | |
| 1013 | if (ret != 0) |
Julia Lawall | 96d31e2 | 2011-12-29 17:51:21 +0100 | [diff] [blame] | 1014 | goto err_release_clk; |
Hebbar, Gururaja | f08095a | 2012-08-27 18:56:39 +0530 | [diff] [blame] | 1015 | |
| 1016 | ret = davinci_soc_platform_register(&pdev->dev); |
| 1017 | if (ret) { |
| 1018 | dev_err(&pdev->dev, "register PCM failed: %d\n", ret); |
Kuninori Morimoto | eeef0ed | 2013-03-21 03:31:19 -0700 | [diff] [blame] | 1019 | goto err_unregister_component; |
Hebbar, Gururaja | f08095a | 2012-08-27 18:56:39 +0530 | [diff] [blame] | 1020 | } |
| 1021 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1022 | return 0; |
| 1023 | |
Kuninori Morimoto | eeef0ed | 2013-03-21 03:31:19 -0700 | [diff] [blame] | 1024 | err_unregister_component: |
| 1025 | snd_soc_unregister_component(&pdev->dev); |
Vaibhav Bedia | eef6d7b | 2011-02-09 18:39:53 +0530 | [diff] [blame] | 1026 | err_release_clk: |
Hebbar, Gururaja | 1088434 | 2012-08-08 20:40:32 +0530 | [diff] [blame] | 1027 | pm_runtime_put_sync(&pdev->dev); |
| 1028 | pm_runtime_disable(&pdev->dev); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1029 | return ret; |
| 1030 | } |
| 1031 | |
| 1032 | static int davinci_mcasp_remove(struct platform_device *pdev) |
| 1033 | { |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1034 | |
Kuninori Morimoto | eeef0ed | 2013-03-21 03:31:19 -0700 | [diff] [blame] | 1035 | snd_soc_unregister_component(&pdev->dev); |
Hebbar, Gururaja | f08095a | 2012-08-27 18:56:39 +0530 | [diff] [blame] | 1036 | davinci_soc_platform_unregister(&pdev->dev); |
Hebbar, Gururaja | 1088434 | 2012-08-08 20:40:32 +0530 | [diff] [blame] | 1037 | |
| 1038 | pm_runtime_put_sync(&pdev->dev); |
| 1039 | pm_runtime_disable(&pdev->dev); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1040 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1041 | return 0; |
| 1042 | } |
| 1043 | |
Daniel Mack | a85e419 | 2013-10-01 14:50:02 +0200 | [diff] [blame] | 1044 | #ifdef CONFIG_PM_SLEEP |
| 1045 | static int davinci_mcasp_suspend(struct device *dev) |
| 1046 | { |
| 1047 | struct davinci_audio_dev *a = dev_get_drvdata(dev); |
| 1048 | void __iomem *base = a->base; |
| 1049 | |
| 1050 | a->context.txfmtctl = mcasp_get_reg(base + DAVINCI_MCASP_TXFMCTL_REG); |
| 1051 | a->context.rxfmtctl = mcasp_get_reg(base + DAVINCI_MCASP_RXFMCTL_REG); |
| 1052 | a->context.txfmt = mcasp_get_reg(base + DAVINCI_MCASP_TXFMT_REG); |
| 1053 | a->context.rxfmt = mcasp_get_reg(base + DAVINCI_MCASP_RXFMT_REG); |
| 1054 | a->context.aclkxctl = mcasp_get_reg(base + DAVINCI_MCASP_ACLKXCTL_REG); |
| 1055 | a->context.aclkrctl = mcasp_get_reg(base + DAVINCI_MCASP_ACLKRCTL_REG); |
| 1056 | a->context.pdir = mcasp_get_reg(base + DAVINCI_MCASP_PDIR_REG); |
| 1057 | |
| 1058 | return 0; |
| 1059 | } |
| 1060 | |
| 1061 | static int davinci_mcasp_resume(struct device *dev) |
| 1062 | { |
| 1063 | struct davinci_audio_dev *a = dev_get_drvdata(dev); |
| 1064 | void __iomem *base = a->base; |
| 1065 | |
| 1066 | mcasp_set_reg(base + DAVINCI_MCASP_TXFMCTL_REG, a->context.txfmtctl); |
| 1067 | mcasp_set_reg(base + DAVINCI_MCASP_RXFMCTL_REG, a->context.rxfmtctl); |
| 1068 | mcasp_set_reg(base + DAVINCI_MCASP_TXFMT_REG, a->context.txfmt); |
| 1069 | mcasp_set_reg(base + DAVINCI_MCASP_RXFMT_REG, a->context.rxfmt); |
| 1070 | mcasp_set_reg(base + DAVINCI_MCASP_ACLKXCTL_REG, a->context.aclkxctl); |
| 1071 | mcasp_set_reg(base + DAVINCI_MCASP_ACLKRCTL_REG, a->context.aclkrctl); |
| 1072 | mcasp_set_reg(base + DAVINCI_MCASP_PDIR_REG, a->context.pdir); |
| 1073 | |
| 1074 | return 0; |
| 1075 | } |
| 1076 | #endif |
| 1077 | |
| 1078 | SIMPLE_DEV_PM_OPS(davinci_mcasp_pm_ops, |
| 1079 | davinci_mcasp_suspend, |
| 1080 | davinci_mcasp_resume); |
| 1081 | |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1082 | static struct platform_driver davinci_mcasp_driver = { |
| 1083 | .probe = davinci_mcasp_probe, |
| 1084 | .remove = davinci_mcasp_remove, |
| 1085 | .driver = { |
| 1086 | .name = "davinci-mcasp", |
| 1087 | .owner = THIS_MODULE, |
Daniel Mack | a85e419 | 2013-10-01 14:50:02 +0200 | [diff] [blame] | 1088 | .pm = &davinci_mcasp_pm_ops, |
Sachin Kamat | ea421eb | 2013-05-22 16:53:37 +0530 | [diff] [blame] | 1089 | .of_match_table = mcasp_dt_ids, |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1090 | }, |
| 1091 | }; |
| 1092 | |
Axel Lin | f9b8a51 | 2011-11-25 10:09:27 +0800 | [diff] [blame] | 1093 | module_platform_driver(davinci_mcasp_driver); |
Chaithrika U S | b67f448 | 2009-06-05 06:28:40 -0400 | [diff] [blame] | 1094 | |
| 1095 | MODULE_AUTHOR("Steve Chen"); |
| 1096 | MODULE_DESCRIPTION("TI DAVINCI McASP SoC Interface"); |
| 1097 | MODULE_LICENSE("GPL"); |