Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1 | /* |
| 2 | * cs42l73.c -- CS42L73 ALSA Soc Audio driver |
| 3 | * |
| 4 | * Copyright 2011 Cirrus Logic, Inc. |
| 5 | * |
| 6 | * Authors: Georgi Vlaev, Nucleus Systems Ltd, <joe@nucleusys.com> |
| 7 | * Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/moduleparam.h> |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/delay.h> |
| 20 | #include <linux/pm.h> |
| 21 | #include <linux/i2c.h> |
| 22 | #include <linux/regmap.h> |
| 23 | #include <linux/slab.h> |
| 24 | #include <sound/core.h> |
| 25 | #include <sound/pcm.h> |
| 26 | #include <sound/pcm_params.h> |
| 27 | #include <sound/soc.h> |
| 28 | #include <sound/soc-dapm.h> |
| 29 | #include <sound/initval.h> |
| 30 | #include <sound/tlv.h> |
| 31 | #include "cs42l73.h" |
| 32 | |
| 33 | struct sp_config { |
| 34 | u8 spc, mmcc, spfs; |
| 35 | u32 srate; |
| 36 | }; |
| 37 | struct cs42l73_private { |
| 38 | struct sp_config config[3]; |
| 39 | struct regmap *regmap; |
| 40 | u32 sysclk; |
| 41 | u8 mclksel; |
| 42 | u32 mclk; |
| 43 | }; |
| 44 | |
Mark Brown | 404417e | 2011-11-22 15:13:30 +0000 | [diff] [blame] | 45 | static const struct reg_default cs42l73_reg_defaults[] = { |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 46 | { 1, 0x42 }, /* r01 - Device ID A&B */ |
| 47 | { 2, 0xA7 }, /* r02 - Device ID C&D */ |
| 48 | { 3, 0x30 }, /* r03 - Device ID E */ |
| 49 | { 6, 0xF1 }, /* r06 - Power Ctl 1 */ |
| 50 | { 7, 0xDF }, /* r07 - Power Ctl 2 */ |
| 51 | { 8, 0x3F }, /* r08 - Power Ctl 3 */ |
| 52 | { 9, 0x50 }, /* r09 - Charge Pump Freq */ |
| 53 | { 10, 0x53 }, /* r0A - Output Load MicBias Short Detect */ |
| 54 | { 11, 0x00 }, /* r0B - DMIC Master Clock Ctl */ |
| 55 | { 12, 0x00 }, /* r0C - Aux PCM Ctl */ |
| 56 | { 13, 0x15 }, /* r0D - Aux PCM Master Clock Ctl */ |
| 57 | { 14, 0x00 }, /* r0E - Audio PCM Ctl */ |
| 58 | { 15, 0x15 }, /* r0F - Audio PCM Master Clock Ctl */ |
| 59 | { 16, 0x00 }, /* r10 - Voice PCM Ctl */ |
| 60 | { 17, 0x15 }, /* r11 - Voice PCM Master Clock Ctl */ |
| 61 | { 18, 0x00 }, /* r12 - Voice/Aux Sample Rate */ |
| 62 | { 19, 0x06 }, /* r13 - Misc I/O Path Ctl */ |
| 63 | { 20, 0x00 }, /* r14 - ADC Input Path Ctl */ |
| 64 | { 21, 0x00 }, /* r15 - MICA Preamp, PGA Volume */ |
| 65 | { 22, 0x00 }, /* r16 - MICB Preamp, PGA Volume */ |
| 66 | { 23, 0x00 }, /* r17 - Input Path A Digital Volume */ |
| 67 | { 24, 0x00 }, /* r18 - Input Path B Digital Volume */ |
| 68 | { 25, 0x00 }, /* r19 - Playback Digital Ctl */ |
| 69 | { 26, 0x00 }, /* r1A - HP/LO Left Digital Volume */ |
| 70 | { 27, 0x00 }, /* r1B - HP/LO Right Digital Volume */ |
| 71 | { 28, 0x00 }, /* r1C - Speakerphone Digital Volume */ |
| 72 | { 29, 0x00 }, /* r1D - Ear/SPKLO Digital Volume */ |
| 73 | { 30, 0x00 }, /* r1E - HP Left Analog Volume */ |
| 74 | { 31, 0x00 }, /* r1F - HP Right Analog Volume */ |
| 75 | { 32, 0x00 }, /* r20 - LO Left Analog Volume */ |
| 76 | { 33, 0x00 }, /* r21 - LO Right Analog Volume */ |
| 77 | { 34, 0x00 }, /* r22 - Stereo Input Path Advisory Volume */ |
| 78 | { 35, 0x00 }, /* r23 - Aux PCM Input Advisory Volume */ |
| 79 | { 36, 0x00 }, /* r24 - Audio PCM Input Advisory Volume */ |
| 80 | { 37, 0x00 }, /* r25 - Voice PCM Input Advisory Volume */ |
| 81 | { 38, 0x00 }, /* r26 - Limiter Attack Rate HP/LO */ |
| 82 | { 39, 0x7F }, /* r27 - Limter Ctl, Release Rate HP/LO */ |
| 83 | { 40, 0x00 }, /* r28 - Limter Threshold HP/LO */ |
| 84 | { 41, 0x00 }, /* r29 - Limiter Attack Rate Speakerphone */ |
| 85 | { 42, 0x3F }, /* r2A - Limter Ctl, Release Rate Speakerphone */ |
| 86 | { 43, 0x00 }, /* r2B - Limter Threshold Speakerphone */ |
| 87 | { 44, 0x00 }, /* r2C - Limiter Attack Rate Ear/SPKLO */ |
| 88 | { 45, 0x3F }, /* r2D - Limter Ctl, Release Rate Ear/SPKLO */ |
| 89 | { 46, 0x00 }, /* r2E - Limter Threshold Ear/SPKLO */ |
| 90 | { 47, 0x00 }, /* r2F - ALC Enable, Attack Rate Left/Right */ |
| 91 | { 48, 0x3F }, /* r30 - ALC Release Rate Left/Right */ |
| 92 | { 49, 0x00 }, /* r31 - ALC Threshold Left/Right */ |
| 93 | { 50, 0x00 }, /* r32 - Noise Gate Ctl Left/Right */ |
| 94 | { 51, 0x00 }, /* r33 - ALC/NG Misc Ctl */ |
| 95 | { 52, 0x18 }, /* r34 - Mixer Ctl */ |
| 96 | { 53, 0x3F }, /* r35 - HP/LO Left Mixer Input Path Volume */ |
| 97 | { 54, 0x3F }, /* r36 - HP/LO Right Mixer Input Path Volume */ |
| 98 | { 55, 0x3F }, /* r37 - HP/LO Left Mixer Aux PCM Volume */ |
| 99 | { 56, 0x3F }, /* r38 - HP/LO Right Mixer Aux PCM Volume */ |
| 100 | { 57, 0x3F }, /* r39 - HP/LO Left Mixer Audio PCM Volume */ |
| 101 | { 58, 0x3F }, /* r3A - HP/LO Right Mixer Audio PCM Volume */ |
| 102 | { 59, 0x3F }, /* r3B - HP/LO Left Mixer Voice PCM Mono Volume */ |
| 103 | { 60, 0x3F }, /* r3C - HP/LO Right Mixer Voice PCM Mono Volume */ |
| 104 | { 61, 0x3F }, /* r3D - Aux PCM Left Mixer Input Path Volume */ |
| 105 | { 62, 0x3F }, /* r3E - Aux PCM Right Mixer Input Path Volume */ |
| 106 | { 63, 0x3F }, /* r3F - Aux PCM Left Mixer Volume */ |
| 107 | { 64, 0x3F }, /* r40 - Aux PCM Left Mixer Volume */ |
| 108 | { 65, 0x3F }, /* r41 - Aux PCM Left Mixer Audio PCM L Volume */ |
| 109 | { 66, 0x3F }, /* r42 - Aux PCM Right Mixer Audio PCM R Volume */ |
| 110 | { 67, 0x3F }, /* r43 - Aux PCM Left Mixer Voice PCM Volume */ |
| 111 | { 68, 0x3F }, /* r44 - Aux PCM Right Mixer Voice PCM Volume */ |
| 112 | { 69, 0x3F }, /* r45 - Audio PCM Left Input Path Volume */ |
| 113 | { 70, 0x3F }, /* r46 - Audio PCM Right Input Path Volume */ |
| 114 | { 71, 0x3F }, /* r47 - Audio PCM Left Mixer Aux PCM L Volume */ |
| 115 | { 72, 0x3F }, /* r48 - Audio PCM Right Mixer Aux PCM R Volume */ |
| 116 | { 73, 0x3F }, /* r49 - Audio PCM Left Mixer Volume */ |
| 117 | { 74, 0x3F }, /* r4A - Audio PCM Right Mixer Volume */ |
| 118 | { 75, 0x3F }, /* r4B - Audio PCM Left Mixer Voice PCM Volume */ |
| 119 | { 76, 0x3F }, /* r4C - Audio PCM Right Mixer Voice PCM Volume */ |
| 120 | { 77, 0x3F }, /* r4D - Voice PCM Left Input Path Volume */ |
| 121 | { 78, 0x3F }, /* r4E - Voice PCM Right Input Path Volume */ |
| 122 | { 79, 0x3F }, /* r4F - Voice PCM Left Mixer Aux PCM L Volume */ |
| 123 | { 80, 0x3F }, /* r50 - Voice PCM Right Mixer Aux PCM R Volume */ |
| 124 | { 81, 0x3F }, /* r51 - Voice PCM Left Mixer Audio PCM L Volume */ |
| 125 | { 82, 0x3F }, /* r52 - Voice PCM Right Mixer Audio PCM R Volume */ |
| 126 | { 83, 0x3F }, /* r53 - Voice PCM Left Mixer Voice PCM Volume */ |
| 127 | { 84, 0x3F }, /* r54 - Voice PCM Right Mixer Voice PCM Volume */ |
| 128 | { 85, 0xAA }, /* r55 - Mono Mixer Ctl */ |
| 129 | { 86, 0x3F }, /* r56 - SPK Mono Mixer Input Path Volume */ |
| 130 | { 87, 0x3F }, /* r57 - SPK Mono Mixer Aux PCM Mono/L/R Volume */ |
| 131 | { 88, 0x3F }, /* r58 - SPK Mono Mixer Audio PCM Mono/L/R Volume */ |
| 132 | { 89, 0x3F }, /* r59 - SPK Mono Mixer Voice PCM Mono Volume */ |
| 133 | { 90, 0x3F }, /* r5A - SPKLO Mono Mixer Input Path Mono Volume */ |
| 134 | { 91, 0x3F }, /* r5B - SPKLO Mono Mixer Aux Mono/L/R Volume */ |
| 135 | { 92, 0x3F }, /* r5C - SPKLO Mono Mixer Audio Mono/L/R Volume */ |
| 136 | { 93, 0x3F }, /* r5D - SPKLO Mono Mixer Voice Mono Volume */ |
| 137 | { 94, 0x00 }, /* r5E - Interrupt Mask 1 */ |
| 138 | { 95, 0x00 }, /* r5F - Interrupt Mask 2 */ |
| 139 | }; |
| 140 | |
| 141 | static bool cs42l73_volatile_register(struct device *dev, unsigned int reg) |
| 142 | { |
| 143 | switch (reg) { |
| 144 | case CS42L73_IS1: |
| 145 | case CS42L73_IS2: |
| 146 | return true; |
| 147 | default: |
| 148 | return false; |
| 149 | } |
| 150 | } |
| 151 | |
| 152 | static bool cs42l73_readable_register(struct device *dev, unsigned int reg) |
| 153 | { |
| 154 | switch (reg) { |
| 155 | case CS42L73_DEVID_AB: |
| 156 | case CS42L73_DEVID_CD: |
| 157 | case CS42L73_DEVID_E: |
| 158 | case CS42L73_REVID: |
| 159 | case CS42L73_PWRCTL1: |
| 160 | case CS42L73_PWRCTL2: |
| 161 | case CS42L73_PWRCTL3: |
| 162 | case CS42L73_CPFCHC: |
| 163 | case CS42L73_OLMBMSDC: |
| 164 | case CS42L73_DMMCC: |
| 165 | case CS42L73_XSPC: |
| 166 | case CS42L73_XSPMMCC: |
| 167 | case CS42L73_ASPC: |
| 168 | case CS42L73_ASPMMCC: |
| 169 | case CS42L73_VSPC: |
| 170 | case CS42L73_VSPMMCC: |
| 171 | case CS42L73_VXSPFS: |
| 172 | case CS42L73_MIOPC: |
| 173 | case CS42L73_ADCIPC: |
| 174 | case CS42L73_MICAPREPGAAVOL: |
| 175 | case CS42L73_MICBPREPGABVOL: |
| 176 | case CS42L73_IPADVOL: |
| 177 | case CS42L73_IPBDVOL: |
| 178 | case CS42L73_PBDC: |
| 179 | case CS42L73_HLADVOL: |
| 180 | case CS42L73_HLBDVOL: |
| 181 | case CS42L73_SPKDVOL: |
| 182 | case CS42L73_ESLDVOL: |
| 183 | case CS42L73_HPAAVOL: |
| 184 | case CS42L73_HPBAVOL: |
| 185 | case CS42L73_LOAAVOL: |
| 186 | case CS42L73_LOBAVOL: |
| 187 | case CS42L73_STRINV: |
| 188 | case CS42L73_XSPINV: |
| 189 | case CS42L73_ASPINV: |
| 190 | case CS42L73_VSPINV: |
| 191 | case CS42L73_LIMARATEHL: |
| 192 | case CS42L73_LIMRRATEHL: |
| 193 | case CS42L73_LMAXHL: |
| 194 | case CS42L73_LIMARATESPK: |
| 195 | case CS42L73_LIMRRATESPK: |
| 196 | case CS42L73_LMAXSPK: |
| 197 | case CS42L73_LIMARATEESL: |
| 198 | case CS42L73_LIMRRATEESL: |
| 199 | case CS42L73_LMAXESL: |
| 200 | case CS42L73_ALCARATE: |
| 201 | case CS42L73_ALCRRATE: |
| 202 | case CS42L73_ALCMINMAX: |
| 203 | case CS42L73_NGCAB: |
| 204 | case CS42L73_ALCNGMC: |
| 205 | case CS42L73_MIXERCTL: |
| 206 | case CS42L73_HLAIPAA: |
| 207 | case CS42L73_HLBIPBA: |
| 208 | case CS42L73_HLAXSPAA: |
| 209 | case CS42L73_HLBXSPBA: |
| 210 | case CS42L73_HLAASPAA: |
| 211 | case CS42L73_HLBASPBA: |
| 212 | case CS42L73_HLAVSPMA: |
| 213 | case CS42L73_HLBVSPMA: |
| 214 | case CS42L73_XSPAIPAA: |
| 215 | case CS42L73_XSPBIPBA: |
| 216 | case CS42L73_XSPAXSPAA: |
| 217 | case CS42L73_XSPBXSPBA: |
| 218 | case CS42L73_XSPAASPAA: |
| 219 | case CS42L73_XSPAASPBA: |
| 220 | case CS42L73_XSPAVSPMA: |
| 221 | case CS42L73_XSPBVSPMA: |
| 222 | case CS42L73_ASPAIPAA: |
| 223 | case CS42L73_ASPBIPBA: |
| 224 | case CS42L73_ASPAXSPAA: |
| 225 | case CS42L73_ASPBXSPBA: |
| 226 | case CS42L73_ASPAASPAA: |
| 227 | case CS42L73_ASPBASPBA: |
| 228 | case CS42L73_ASPAVSPMA: |
| 229 | case CS42L73_ASPBVSPMA: |
| 230 | case CS42L73_VSPAIPAA: |
| 231 | case CS42L73_VSPBIPBA: |
| 232 | case CS42L73_VSPAXSPAA: |
| 233 | case CS42L73_VSPBXSPBA: |
| 234 | case CS42L73_VSPAASPAA: |
| 235 | case CS42L73_VSPBASPBA: |
| 236 | case CS42L73_VSPAVSPMA: |
| 237 | case CS42L73_VSPBVSPMA: |
| 238 | case CS42L73_MMIXCTL: |
| 239 | case CS42L73_SPKMIPMA: |
| 240 | case CS42L73_SPKMXSPA: |
| 241 | case CS42L73_SPKMASPA: |
| 242 | case CS42L73_SPKMVSPMA: |
| 243 | case CS42L73_ESLMIPMA: |
| 244 | case CS42L73_ESLMXSPA: |
| 245 | case CS42L73_ESLMASPA: |
| 246 | case CS42L73_ESLMVSPMA: |
| 247 | case CS42L73_IM1: |
| 248 | case CS42L73_IM2: |
| 249 | return true; |
| 250 | default: |
| 251 | return false; |
| 252 | } |
| 253 | } |
| 254 | |
| 255 | static const unsigned int hpaloa_tlv[] = { |
| 256 | TLV_DB_RANGE_HEAD(2), |
| 257 | 0, 13, TLV_DB_SCALE_ITEM(-7600, 200, 0), |
| 258 | 14, 75, TLV_DB_SCALE_ITEM(-4900, 100, 0), |
| 259 | }; |
| 260 | |
| 261 | static DECLARE_TLV_DB_SCALE(adc_boost_tlv, 0, 2500, 0); |
| 262 | |
| 263 | static DECLARE_TLV_DB_SCALE(hl_tlv, -10200, 50, 0); |
| 264 | |
| 265 | static DECLARE_TLV_DB_SCALE(ipd_tlv, -9600, 100, 0); |
| 266 | |
| 267 | static DECLARE_TLV_DB_SCALE(micpga_tlv, -600, 50, 0); |
| 268 | |
| 269 | static const unsigned int limiter_tlv[] = { |
| 270 | TLV_DB_RANGE_HEAD(2), |
| 271 | 0, 2, TLV_DB_SCALE_ITEM(-3000, 600, 0), |
| 272 | 3, 7, TLV_DB_SCALE_ITEM(-1200, 300, 0), |
| 273 | }; |
| 274 | |
| 275 | static const DECLARE_TLV_DB_SCALE(attn_tlv, -6300, 100, 1); |
| 276 | |
| 277 | static const char * const cs42l73_pgaa_text[] = { "Line A", "Mic 1" }; |
| 278 | static const char * const cs42l73_pgab_text[] = { "Line B", "Mic 2" }; |
| 279 | |
| 280 | static const struct soc_enum pgaa_enum = |
| 281 | SOC_ENUM_SINGLE(CS42L73_ADCIPC, 3, |
| 282 | ARRAY_SIZE(cs42l73_pgaa_text), cs42l73_pgaa_text); |
| 283 | |
| 284 | static const struct soc_enum pgab_enum = |
| 285 | SOC_ENUM_SINGLE(CS42L73_ADCIPC, 7, |
| 286 | ARRAY_SIZE(cs42l73_pgab_text), cs42l73_pgab_text); |
| 287 | |
| 288 | static const struct snd_kcontrol_new pgaa_mux = |
| 289 | SOC_DAPM_ENUM("Left Analog Input Capture Mux", pgaa_enum); |
| 290 | |
| 291 | static const struct snd_kcontrol_new pgab_mux = |
| 292 | SOC_DAPM_ENUM("Right Analog Input Capture Mux", pgab_enum); |
| 293 | |
| 294 | static const struct snd_kcontrol_new input_left_mixer[] = { |
| 295 | SOC_DAPM_SINGLE("ADC Left Input", CS42L73_PWRCTL1, |
| 296 | 5, 1, 1), |
| 297 | SOC_DAPM_SINGLE("DMIC Left Input", CS42L73_PWRCTL1, |
| 298 | 4, 1, 1), |
| 299 | }; |
| 300 | |
| 301 | static const struct snd_kcontrol_new input_right_mixer[] = { |
| 302 | SOC_DAPM_SINGLE("ADC Right Input", CS42L73_PWRCTL1, |
| 303 | 7, 1, 1), |
| 304 | SOC_DAPM_SINGLE("DMIC Right Input", CS42L73_PWRCTL1, |
| 305 | 6, 1, 1), |
| 306 | }; |
| 307 | |
| 308 | static const char * const cs42l73_ng_delay_text[] = { |
| 309 | "50ms", "100ms", "150ms", "200ms" }; |
| 310 | |
| 311 | static const struct soc_enum ng_delay_enum = |
| 312 | SOC_ENUM_SINGLE(CS42L73_NGCAB, 0, |
| 313 | ARRAY_SIZE(cs42l73_ng_delay_text), cs42l73_ng_delay_text); |
| 314 | |
| 315 | static const char * const charge_pump_freq_text[] = { |
| 316 | "0", "1", "2", "3", "4", |
| 317 | "5", "6", "7", "8", "9", |
| 318 | "10", "11", "12", "13", "14", "15" }; |
| 319 | |
| 320 | static const struct soc_enum charge_pump_enum = |
| 321 | SOC_ENUM_SINGLE(CS42L73_CPFCHC, 4, |
| 322 | ARRAY_SIZE(charge_pump_freq_text), charge_pump_freq_text); |
| 323 | |
| 324 | static const char * const cs42l73_mono_mix_texts[] = { |
| 325 | "Left", "Right", "Mono Mix"}; |
| 326 | |
| 327 | static const unsigned int cs42l73_mono_mix_values[] = { 0, 1, 2 }; |
| 328 | |
| 329 | static const struct soc_enum spk_asp_enum = |
| 330 | SOC_VALUE_ENUM_SINGLE(CS42L73_MMIXCTL, 6, 1, |
| 331 | ARRAY_SIZE(cs42l73_mono_mix_texts), |
| 332 | cs42l73_mono_mix_texts, |
| 333 | cs42l73_mono_mix_values); |
| 334 | |
| 335 | static const struct snd_kcontrol_new spk_asp_mixer = |
| 336 | SOC_DAPM_ENUM("Route", spk_asp_enum); |
| 337 | |
| 338 | static const struct soc_enum spk_xsp_enum = |
| 339 | SOC_VALUE_ENUM_SINGLE(CS42L73_MMIXCTL, 4, 3, |
| 340 | ARRAY_SIZE(cs42l73_mono_mix_texts), |
| 341 | cs42l73_mono_mix_texts, |
| 342 | cs42l73_mono_mix_values); |
| 343 | |
| 344 | static const struct snd_kcontrol_new spk_xsp_mixer = |
| 345 | SOC_DAPM_ENUM("Route", spk_xsp_enum); |
| 346 | |
| 347 | static const struct soc_enum esl_asp_enum = |
| 348 | SOC_VALUE_ENUM_SINGLE(CS42L73_MMIXCTL, 2, 5, |
| 349 | ARRAY_SIZE(cs42l73_mono_mix_texts), |
| 350 | cs42l73_mono_mix_texts, |
| 351 | cs42l73_mono_mix_values); |
| 352 | |
| 353 | static const struct snd_kcontrol_new esl_asp_mixer = |
| 354 | SOC_DAPM_ENUM("Route", esl_asp_enum); |
| 355 | |
| 356 | static const struct soc_enum esl_xsp_enum = |
| 357 | SOC_VALUE_ENUM_SINGLE(CS42L73_MMIXCTL, 0, 7, |
| 358 | ARRAY_SIZE(cs42l73_mono_mix_texts), |
| 359 | cs42l73_mono_mix_texts, |
| 360 | cs42l73_mono_mix_values); |
| 361 | |
| 362 | static const struct snd_kcontrol_new esl_xsp_mixer = |
| 363 | SOC_DAPM_ENUM("Route", esl_xsp_enum); |
| 364 | |
| 365 | static const char * const cs42l73_ip_swap_text[] = { |
| 366 | "Stereo", "Mono A", "Mono B", "Swap A-B"}; |
| 367 | |
| 368 | static const struct soc_enum ip_swap_enum = |
| 369 | SOC_ENUM_SINGLE(CS42L73_MIOPC, 6, |
| 370 | ARRAY_SIZE(cs42l73_ip_swap_text), cs42l73_ip_swap_text); |
| 371 | |
| 372 | static const char * const cs42l73_spo_mixer_text[] = {"Mono", "Stereo"}; |
| 373 | |
| 374 | static const struct soc_enum vsp_output_mux_enum = |
| 375 | SOC_ENUM_SINGLE(CS42L73_MIXERCTL, 5, |
| 376 | ARRAY_SIZE(cs42l73_spo_mixer_text), cs42l73_spo_mixer_text); |
| 377 | |
| 378 | static const struct soc_enum xsp_output_mux_enum = |
| 379 | SOC_ENUM_SINGLE(CS42L73_MIXERCTL, 4, |
| 380 | ARRAY_SIZE(cs42l73_spo_mixer_text), cs42l73_spo_mixer_text); |
| 381 | |
| 382 | static const struct snd_kcontrol_new vsp_output_mux = |
| 383 | SOC_DAPM_ENUM("Route", vsp_output_mux_enum); |
| 384 | |
| 385 | static const struct snd_kcontrol_new xsp_output_mux = |
| 386 | SOC_DAPM_ENUM("Route", xsp_output_mux_enum); |
| 387 | |
| 388 | static const struct snd_kcontrol_new hp_amp_ctl = |
| 389 | SOC_DAPM_SINGLE("Switch", CS42L73_PWRCTL3, 0, 1, 1); |
| 390 | |
| 391 | static const struct snd_kcontrol_new lo_amp_ctl = |
| 392 | SOC_DAPM_SINGLE("Switch", CS42L73_PWRCTL3, 1, 1, 1); |
| 393 | |
| 394 | static const struct snd_kcontrol_new spk_amp_ctl = |
| 395 | SOC_DAPM_SINGLE("Switch", CS42L73_PWRCTL3, 2, 1, 1); |
| 396 | |
| 397 | static const struct snd_kcontrol_new spklo_amp_ctl = |
| 398 | SOC_DAPM_SINGLE("Switch", CS42L73_PWRCTL3, 4, 1, 1); |
| 399 | |
| 400 | static const struct snd_kcontrol_new ear_amp_ctl = |
| 401 | SOC_DAPM_SINGLE("Switch", CS42L73_PWRCTL3, 3, 1, 1); |
| 402 | |
| 403 | static const struct snd_kcontrol_new cs42l73_snd_controls[] = { |
| 404 | SOC_DOUBLE_R_SX_TLV("Headphone Analog Playback Volume", |
| 405 | CS42L73_HPAAVOL, CS42L73_HPBAVOL, 7, |
| 406 | 0xffffffC1, 0x0C, hpaloa_tlv), |
| 407 | |
| 408 | SOC_DOUBLE_R_SX_TLV("LineOut Analog Playback Volume", CS42L73_LOAAVOL, |
| 409 | CS42L73_LOBAVOL, 7, 0xffffffC1, 0x0C, hpaloa_tlv), |
| 410 | |
| 411 | SOC_DOUBLE_R_SX_TLV("Input PGA Analog Volume", CS42L73_MICAPREPGAAVOL, |
| 412 | CS42L73_MICBPREPGABVOL, 5, 0xffffff35, |
| 413 | 0x34, micpga_tlv), |
| 414 | |
| 415 | SOC_DOUBLE_R("MIC Preamp Switch", CS42L73_MICAPREPGAAVOL, |
| 416 | CS42L73_MICBPREPGABVOL, 6, 1, 1), |
| 417 | |
| 418 | SOC_DOUBLE_R_SX_TLV("Input Path Digital Volume", CS42L73_IPADVOL, |
| 419 | CS42L73_IPBDVOL, 7, 0xffffffA0, 0xA0, ipd_tlv), |
| 420 | |
| 421 | SOC_DOUBLE_R_SX_TLV("HL Digital Playback Volume", |
| 422 | CS42L73_HLADVOL, CS42L73_HLBDVOL, 7, 0xffffffE5, |
| 423 | 0xE4, hl_tlv), |
| 424 | |
| 425 | SOC_SINGLE_TLV("ADC A Boost Volume", |
| 426 | CS42L73_ADCIPC, 2, 0x01, 1, adc_boost_tlv), |
| 427 | |
| 428 | SOC_SINGLE_TLV("ADC B Boost Volume", |
| 429 | CS42L73_ADCIPC, 6, 0x01, 1, adc_boost_tlv), |
| 430 | |
| 431 | SOC_SINGLE_TLV("Speakerphone Digital Playback Volume", |
| 432 | CS42L73_SPKDVOL, 0, 0xE4, 1, hl_tlv), |
| 433 | |
| 434 | SOC_SINGLE_TLV("Ear Speaker Digital Playback Volume", |
| 435 | CS42L73_ESLDVOL, 0, 0xE4, 1, hl_tlv), |
| 436 | |
| 437 | SOC_DOUBLE_R("Headphone Analog Playback Switch", CS42L73_HPAAVOL, |
| 438 | CS42L73_HPBAVOL, 7, 1, 1), |
| 439 | |
| 440 | SOC_DOUBLE_R("LineOut Analog Playback Switch", CS42L73_LOAAVOL, |
| 441 | CS42L73_LOBAVOL, 7, 1, 1), |
| 442 | SOC_DOUBLE("Input Path Digital Switch", CS42L73_ADCIPC, 0, 4, 1, 1), |
| 443 | SOC_DOUBLE("HL Digital Playback Switch", CS42L73_PBDC, 0, |
| 444 | 1, 1, 1), |
| 445 | SOC_SINGLE("Speakerphone Digital Playback Switch", CS42L73_PBDC, 2, 1, |
| 446 | 1), |
| 447 | SOC_SINGLE("Ear Speaker Digital Playback Switch", CS42L73_PBDC, 3, 1, |
| 448 | 1), |
| 449 | |
| 450 | SOC_SINGLE("PGA Soft-Ramp Switch", CS42L73_MIOPC, 3, 1, 0), |
| 451 | SOC_SINGLE("Analog Zero Cross Switch", CS42L73_MIOPC, 2, 1, 0), |
| 452 | SOC_SINGLE("Digital Soft-Ramp Switch", CS42L73_MIOPC, 1, 1, 0), |
| 453 | SOC_SINGLE("Analog Output Soft-Ramp Switch", CS42L73_MIOPC, 0, 1, 0), |
| 454 | |
| 455 | SOC_DOUBLE("ADC Signal Polarity Switch", CS42L73_ADCIPC, 1, 5, 1, |
| 456 | 0), |
| 457 | |
| 458 | SOC_SINGLE("HL Limiter Attack Rate", CS42L73_LIMARATEHL, 0, 0x3F, |
| 459 | 0), |
| 460 | SOC_SINGLE("HL Limiter Release Rate", CS42L73_LIMRRATEHL, 0, |
| 461 | 0x3F, 0), |
| 462 | |
| 463 | |
| 464 | SOC_SINGLE("HL Limiter Switch", CS42L73_LIMRRATEHL, 7, 1, 0), |
| 465 | SOC_SINGLE("HL Limiter All Channels Switch", CS42L73_LIMRRATEHL, 6, 1, |
| 466 | 0), |
| 467 | |
| 468 | SOC_SINGLE_TLV("HL Limiter Max Threshold Volume", CS42L73_LMAXHL, 5, 7, |
| 469 | 1, limiter_tlv), |
| 470 | |
| 471 | SOC_SINGLE_TLV("HL Limiter Cushion Volume", CS42L73_LMAXHL, 2, 7, 1, |
| 472 | limiter_tlv), |
| 473 | |
| 474 | SOC_SINGLE("SPK Limiter Attack Rate Volume", CS42L73_LIMARATESPK, 0, |
| 475 | 0x3F, 0), |
| 476 | SOC_SINGLE("SPK Limiter Release Rate Volume", CS42L73_LIMRRATESPK, 0, |
| 477 | 0x3F, 0), |
| 478 | SOC_SINGLE("SPK Limiter Switch", CS42L73_LIMRRATESPK, 7, 1, 0), |
| 479 | SOC_SINGLE("SPK Limiter All Channels Switch", CS42L73_LIMRRATESPK, |
| 480 | 6, 1, 0), |
| 481 | SOC_SINGLE_TLV("SPK Limiter Max Threshold Volume", CS42L73_LMAXSPK, 5, |
| 482 | 7, 1, limiter_tlv), |
| 483 | |
| 484 | SOC_SINGLE_TLV("SPK Limiter Cushion Volume", CS42L73_LMAXSPK, 2, 7, 1, |
| 485 | limiter_tlv), |
| 486 | |
| 487 | SOC_SINGLE("ESL Limiter Attack Rate Volume", CS42L73_LIMARATEESL, 0, |
| 488 | 0x3F, 0), |
| 489 | SOC_SINGLE("ESL Limiter Release Rate Volume", CS42L73_LIMRRATEESL, 0, |
| 490 | 0x3F, 0), |
| 491 | SOC_SINGLE("ESL Limiter Switch", CS42L73_LIMRRATEESL, 7, 1, 0), |
| 492 | SOC_SINGLE_TLV("ESL Limiter Max Threshold Volume", CS42L73_LMAXESL, 5, |
| 493 | 7, 1, limiter_tlv), |
| 494 | |
| 495 | SOC_SINGLE_TLV("ESL Limiter Cushion Volume", CS42L73_LMAXESL, 2, 7, 1, |
| 496 | limiter_tlv), |
| 497 | |
| 498 | SOC_SINGLE("ALC Attack Rate Volume", CS42L73_ALCARATE, 0, 0x3F, 0), |
| 499 | SOC_SINGLE("ALC Release Rate Volume", CS42L73_ALCRRATE, 0, 0x3F, 0), |
| 500 | SOC_DOUBLE("ALC Switch", CS42L73_ALCARATE, 6, 7, 1, 0), |
| 501 | SOC_SINGLE_TLV("ALC Max Threshold Volume", CS42L73_ALCMINMAX, 5, 7, 0, |
| 502 | limiter_tlv), |
| 503 | SOC_SINGLE_TLV("ALC Min Threshold Volume", CS42L73_ALCMINMAX, 2, 7, 0, |
| 504 | limiter_tlv), |
| 505 | |
| 506 | SOC_DOUBLE("NG Enable Switch", CS42L73_NGCAB, 6, 7, 1, 0), |
| 507 | SOC_SINGLE("NG Boost Switch", CS42L73_NGCAB, 5, 1, 0), |
| 508 | /* |
| 509 | NG Threshold depends on NG_BOOTSAB, which selects |
| 510 | between two threshold scales in decibels. |
| 511 | Set linear values for now .. |
| 512 | */ |
| 513 | SOC_SINGLE("NG Threshold", CS42L73_NGCAB, 2, 7, 0), |
| 514 | SOC_ENUM("NG Delay", ng_delay_enum), |
| 515 | |
| 516 | SOC_ENUM("Charge Pump Frequency", charge_pump_enum), |
| 517 | |
| 518 | SOC_DOUBLE_R_TLV("XSP-IP Volume", |
| 519 | CS42L73_XSPAIPAA, CS42L73_XSPBIPBA, 0, 0x3F, 1, |
| 520 | attn_tlv), |
| 521 | SOC_DOUBLE_R_TLV("XSP-XSP Volume", |
| 522 | CS42L73_XSPAXSPAA, CS42L73_XSPBXSPBA, 0, 0x3F, 1, |
| 523 | attn_tlv), |
| 524 | SOC_DOUBLE_R_TLV("XSP-ASP Volume", |
| 525 | CS42L73_XSPAASPAA, CS42L73_XSPAASPBA, 0, 0x3F, 1, |
| 526 | attn_tlv), |
| 527 | SOC_DOUBLE_R_TLV("XSP-VSP Volume", |
| 528 | CS42L73_XSPAVSPMA, CS42L73_XSPBVSPMA, 0, 0x3F, 1, |
| 529 | attn_tlv), |
| 530 | |
| 531 | SOC_DOUBLE_R_TLV("ASP-IP Volume", |
| 532 | CS42L73_ASPAIPAA, CS42L73_ASPBIPBA, 0, 0x3F, 1, |
| 533 | attn_tlv), |
| 534 | SOC_DOUBLE_R_TLV("ASP-XSP Volume", |
| 535 | CS42L73_ASPAXSPAA, CS42L73_ASPBXSPBA, 0, 0x3F, 1, |
| 536 | attn_tlv), |
| 537 | SOC_DOUBLE_R_TLV("ASP-ASP Volume", |
| 538 | CS42L73_ASPAASPAA, CS42L73_ASPBASPBA, 0, 0x3F, 1, |
| 539 | attn_tlv), |
| 540 | SOC_DOUBLE_R_TLV("ASP-VSP Volume", |
| 541 | CS42L73_ASPAVSPMA, CS42L73_ASPBVSPMA, 0, 0x3F, 1, |
| 542 | attn_tlv), |
| 543 | |
| 544 | SOC_DOUBLE_R_TLV("VSP-IP Volume", |
| 545 | CS42L73_VSPAIPAA, CS42L73_VSPBIPBA, 0, 0x3F, 1, |
| 546 | attn_tlv), |
| 547 | SOC_DOUBLE_R_TLV("VSP-XSP Volume", |
| 548 | CS42L73_VSPAXSPAA, CS42L73_VSPBXSPBA, 0, 0x3F, 1, |
| 549 | attn_tlv), |
| 550 | SOC_DOUBLE_R_TLV("VSP-ASP Volume", |
| 551 | CS42L73_VSPAASPAA, CS42L73_VSPBASPBA, 0, 0x3F, 1, |
| 552 | attn_tlv), |
| 553 | SOC_DOUBLE_R_TLV("VSP-VSP Volume", |
| 554 | CS42L73_VSPAVSPMA, CS42L73_VSPBVSPMA, 0, 0x3F, 1, |
| 555 | attn_tlv), |
| 556 | |
| 557 | SOC_DOUBLE_R_TLV("HL-IP Volume", |
| 558 | CS42L73_HLAIPAA, CS42L73_HLBIPBA, 0, 0x3F, 1, |
| 559 | attn_tlv), |
| 560 | SOC_DOUBLE_R_TLV("HL-XSP Volume", |
| 561 | CS42L73_HLAXSPAA, CS42L73_HLBXSPBA, 0, 0x3F, 1, |
| 562 | attn_tlv), |
| 563 | SOC_DOUBLE_R_TLV("HL-ASP Volume", |
| 564 | CS42L73_HLAASPAA, CS42L73_HLBASPBA, 0, 0x3F, 1, |
| 565 | attn_tlv), |
| 566 | SOC_DOUBLE_R_TLV("HL-VSP Volume", |
| 567 | CS42L73_HLAVSPMA, CS42L73_HLBVSPMA, 0, 0x3F, 1, |
| 568 | attn_tlv), |
| 569 | |
| 570 | SOC_SINGLE_TLV("SPK-IP Mono Volume", |
Brian Austin | 5807c3b | 2012-05-11 12:54:45 -0500 | [diff] [blame^] | 571 | CS42L73_SPKMIPMA, 0, 0x3F, 1, attn_tlv), |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 572 | SOC_SINGLE_TLV("SPK-XSP Mono Volume", |
Brian Austin | 5807c3b | 2012-05-11 12:54:45 -0500 | [diff] [blame^] | 573 | CS42L73_SPKMXSPA, 0, 0x3F, 1, attn_tlv), |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 574 | SOC_SINGLE_TLV("SPK-ASP Mono Volume", |
Brian Austin | 5807c3b | 2012-05-11 12:54:45 -0500 | [diff] [blame^] | 575 | CS42L73_SPKMASPA, 0, 0x3F, 1, attn_tlv), |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 576 | SOC_SINGLE_TLV("SPK-VSP Mono Volume", |
Brian Austin | 5807c3b | 2012-05-11 12:54:45 -0500 | [diff] [blame^] | 577 | CS42L73_SPKMVSPMA, 0, 0x3F, 1, attn_tlv), |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 578 | |
| 579 | SOC_SINGLE_TLV("ESL-IP Mono Volume", |
Brian Austin | 5807c3b | 2012-05-11 12:54:45 -0500 | [diff] [blame^] | 580 | CS42L73_ESLMIPMA, 0, 0x3F, 1, attn_tlv), |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 581 | SOC_SINGLE_TLV("ESL-XSP Mono Volume", |
Brian Austin | 5807c3b | 2012-05-11 12:54:45 -0500 | [diff] [blame^] | 582 | CS42L73_ESLMXSPA, 0, 0x3F, 1, attn_tlv), |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 583 | SOC_SINGLE_TLV("ESL-ASP Mono Volume", |
Brian Austin | 5807c3b | 2012-05-11 12:54:45 -0500 | [diff] [blame^] | 584 | CS42L73_ESLMASPA, 0, 0x3F, 1, attn_tlv), |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 585 | SOC_SINGLE_TLV("ESL-VSP Mono Volume", |
Brian Austin | 5807c3b | 2012-05-11 12:54:45 -0500 | [diff] [blame^] | 586 | CS42L73_ESLMVSPMA, 0, 0x3F, 1, attn_tlv), |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 587 | |
| 588 | SOC_ENUM("IP Digital Swap/Mono Select", ip_swap_enum), |
| 589 | |
| 590 | SOC_ENUM("VSPOUT Mono/Stereo Select", vsp_output_mux_enum), |
| 591 | SOC_ENUM("XSPOUT Mono/Stereo Select", xsp_output_mux_enum), |
| 592 | }; |
| 593 | |
| 594 | static const struct snd_soc_dapm_widget cs42l73_dapm_widgets[] = { |
| 595 | SND_SOC_DAPM_INPUT("LINEINA"), |
| 596 | SND_SOC_DAPM_INPUT("LINEINB"), |
| 597 | SND_SOC_DAPM_INPUT("MIC1"), |
| 598 | SND_SOC_DAPM_SUPPLY("MIC1 Bias", CS42L73_PWRCTL2, 6, 1, NULL, 0), |
| 599 | SND_SOC_DAPM_INPUT("MIC2"), |
| 600 | SND_SOC_DAPM_SUPPLY("MIC2 Bias", CS42L73_PWRCTL2, 7, 1, NULL, 0), |
| 601 | |
| 602 | SND_SOC_DAPM_AIF_OUT("XSPOUTL", "XSP Capture", 0, |
| 603 | CS42L73_PWRCTL2, 1, 1), |
| 604 | SND_SOC_DAPM_AIF_OUT("XSPOUTR", "XSP Capture", 0, |
| 605 | CS42L73_PWRCTL2, 1, 1), |
| 606 | SND_SOC_DAPM_AIF_OUT("ASPOUTL", "ASP Capture", 0, |
| 607 | CS42L73_PWRCTL2, 3, 1), |
| 608 | SND_SOC_DAPM_AIF_OUT("ASPOUTR", "ASP Capture", 0, |
| 609 | CS42L73_PWRCTL2, 3, 1), |
| 610 | SND_SOC_DAPM_AIF_OUT("VSPOUTL", "VSP Capture", 0, |
| 611 | CS42L73_PWRCTL2, 4, 1), |
| 612 | SND_SOC_DAPM_AIF_OUT("VSPOUTR", "VSP Capture", 0, |
| 613 | CS42L73_PWRCTL2, 4, 1), |
| 614 | |
| 615 | SND_SOC_DAPM_PGA("PGA Left", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 616 | SND_SOC_DAPM_PGA("PGA Right", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 617 | |
| 618 | SND_SOC_DAPM_MUX("PGA Left Mux", SND_SOC_NOPM, 0, 0, &pgaa_mux), |
| 619 | SND_SOC_DAPM_MUX("PGA Right Mux", SND_SOC_NOPM, 0, 0, &pgab_mux), |
| 620 | |
| 621 | SND_SOC_DAPM_ADC("ADC Left", NULL, CS42L73_PWRCTL1, 7, 1), |
| 622 | SND_SOC_DAPM_ADC("ADC Right", NULL, CS42L73_PWRCTL1, 5, 1), |
| 623 | SND_SOC_DAPM_ADC("DMIC Left", NULL, CS42L73_PWRCTL1, 6, 1), |
| 624 | SND_SOC_DAPM_ADC("DMIC Right", NULL, CS42L73_PWRCTL1, 4, 1), |
| 625 | |
| 626 | SND_SOC_DAPM_MIXER_NAMED_CTL("Input Left Capture", SND_SOC_NOPM, |
| 627 | 0, 0, input_left_mixer, |
| 628 | ARRAY_SIZE(input_left_mixer)), |
| 629 | |
| 630 | SND_SOC_DAPM_MIXER_NAMED_CTL("Input Right Capture", SND_SOC_NOPM, |
| 631 | 0, 0, input_right_mixer, |
| 632 | ARRAY_SIZE(input_right_mixer)), |
| 633 | |
| 634 | SND_SOC_DAPM_MIXER("ASPL Output Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 635 | SND_SOC_DAPM_MIXER("ASPR Output Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 636 | SND_SOC_DAPM_MIXER("XSPL Output Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 637 | SND_SOC_DAPM_MIXER("XSPR Output Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 638 | SND_SOC_DAPM_MIXER("VSPL Output Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 639 | SND_SOC_DAPM_MIXER("VSPR Output Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 640 | |
| 641 | SND_SOC_DAPM_AIF_IN("XSPINL", "XSP Playback", 0, |
| 642 | CS42L73_PWRCTL2, 0, 1), |
| 643 | SND_SOC_DAPM_AIF_IN("XSPINR", "XSP Playback", 0, |
| 644 | CS42L73_PWRCTL2, 0, 1), |
| 645 | SND_SOC_DAPM_AIF_IN("XSPINM", "XSP Playback", 0, |
| 646 | CS42L73_PWRCTL2, 0, 1), |
| 647 | |
| 648 | SND_SOC_DAPM_AIF_IN("ASPINL", "ASP Playback", 0, |
| 649 | CS42L73_PWRCTL2, 2, 1), |
| 650 | SND_SOC_DAPM_AIF_IN("ASPINR", "ASP Playback", 0, |
| 651 | CS42L73_PWRCTL2, 2, 1), |
| 652 | SND_SOC_DAPM_AIF_IN("ASPINM", "ASP Playback", 0, |
| 653 | CS42L73_PWRCTL2, 2, 1), |
| 654 | |
| 655 | SND_SOC_DAPM_AIF_IN("VSPIN", "VSP Playback", 0, |
| 656 | CS42L73_PWRCTL2, 4, 1), |
| 657 | |
| 658 | SND_SOC_DAPM_MIXER("HL Left Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 659 | SND_SOC_DAPM_MIXER("HL Right Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 660 | SND_SOC_DAPM_MIXER("SPK Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 661 | SND_SOC_DAPM_MIXER("ESL Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 662 | |
| 663 | SND_SOC_DAPM_MUX("ESL-XSP Mux", SND_SOC_NOPM, |
| 664 | 0, 0, &esl_xsp_mixer), |
| 665 | |
| 666 | SND_SOC_DAPM_MUX("ESL-ASP Mux", SND_SOC_NOPM, |
| 667 | 0, 0, &esl_asp_mixer), |
| 668 | |
| 669 | SND_SOC_DAPM_MUX("SPK-ASP Mux", SND_SOC_NOPM, |
| 670 | 0, 0, &spk_asp_mixer), |
| 671 | |
| 672 | SND_SOC_DAPM_MUX("SPK-XSP Mux", SND_SOC_NOPM, |
| 673 | 0, 0, &spk_xsp_mixer), |
| 674 | |
| 675 | SND_SOC_DAPM_PGA("HL Left DAC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 676 | SND_SOC_DAPM_PGA("HL Right DAC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 677 | SND_SOC_DAPM_PGA("SPK DAC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 678 | SND_SOC_DAPM_PGA("ESL DAC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 679 | |
| 680 | SND_SOC_DAPM_SWITCH("HP Amp", CS42L73_PWRCTL3, 0, 1, |
| 681 | &hp_amp_ctl), |
| 682 | SND_SOC_DAPM_SWITCH("LO Amp", CS42L73_PWRCTL3, 1, 1, |
| 683 | &lo_amp_ctl), |
| 684 | SND_SOC_DAPM_SWITCH("SPK Amp", CS42L73_PWRCTL3, 2, 1, |
| 685 | &spk_amp_ctl), |
| 686 | SND_SOC_DAPM_SWITCH("EAR Amp", CS42L73_PWRCTL3, 3, 1, |
| 687 | &ear_amp_ctl), |
| 688 | SND_SOC_DAPM_SWITCH("SPKLO Amp", CS42L73_PWRCTL3, 4, 1, |
| 689 | &spklo_amp_ctl), |
| 690 | |
| 691 | SND_SOC_DAPM_OUTPUT("HPOUTA"), |
| 692 | SND_SOC_DAPM_OUTPUT("HPOUTB"), |
| 693 | SND_SOC_DAPM_OUTPUT("LINEOUTA"), |
| 694 | SND_SOC_DAPM_OUTPUT("LINEOUTB"), |
| 695 | SND_SOC_DAPM_OUTPUT("EAROUT"), |
| 696 | SND_SOC_DAPM_OUTPUT("SPKOUT"), |
| 697 | SND_SOC_DAPM_OUTPUT("SPKLINEOUT"), |
| 698 | }; |
| 699 | |
| 700 | static const struct snd_soc_dapm_route cs42l73_audio_map[] = { |
| 701 | |
| 702 | /* SPKLO EARSPK Paths */ |
| 703 | {"EAROUT", NULL, "EAR Amp"}, |
| 704 | {"SPKLINEOUT", NULL, "SPKLO Amp"}, |
| 705 | |
| 706 | {"EAR Amp", "Switch", "ESL DAC"}, |
| 707 | {"SPKLO Amp", "Switch", "ESL DAC"}, |
| 708 | |
| 709 | {"ESL DAC", "ESL-ASP Mono Volume", "ESL Mixer"}, |
| 710 | {"ESL DAC", "ESL-XSP Mono Volume", "ESL Mixer"}, |
| 711 | {"ESL DAC", "ESL-VSP Mono Volume", "VSPIN"}, |
| 712 | /* Loopback */ |
| 713 | {"ESL DAC", "ESL-IP Mono Volume", "Input Left Capture"}, |
| 714 | {"ESL DAC", "ESL-IP Mono Volume", "Input Right Capture"}, |
| 715 | |
| 716 | {"ESL Mixer", NULL, "ESL-ASP Mux"}, |
| 717 | {"ESL Mixer", NULL, "ESL-XSP Mux"}, |
| 718 | |
| 719 | {"ESL-ASP Mux", "Left", "ASPINL"}, |
| 720 | {"ESL-ASP Mux", "Right", "ASPINR"}, |
| 721 | {"ESL-ASP Mux", "Mono Mix", "ASPINM"}, |
| 722 | |
| 723 | {"ESL-XSP Mux", "Left", "XSPINL"}, |
| 724 | {"ESL-XSP Mux", "Right", "XSPINR"}, |
| 725 | {"ESL-XSP Mux", "Mono Mix", "XSPINM"}, |
| 726 | |
| 727 | /* Speakerphone Paths */ |
| 728 | {"SPKOUT", NULL, "SPK Amp"}, |
| 729 | {"SPK Amp", "Switch", "SPK DAC"}, |
| 730 | |
| 731 | {"SPK DAC", "SPK-ASP Mono Volume", "SPK Mixer"}, |
| 732 | {"SPK DAC", "SPK-XSP Mono Volume", "SPK Mixer"}, |
| 733 | {"SPK DAC", "SPK-VSP Mono Volume", "VSPIN"}, |
| 734 | /* Loopback */ |
| 735 | {"SPK DAC", "SPK-IP Mono Volume", "Input Left Capture"}, |
| 736 | {"SPK DAC", "SPK-IP Mono Volume", "Input Right Capture"}, |
| 737 | |
| 738 | {"SPK Mixer", NULL, "SPK-ASP Mux"}, |
| 739 | {"SPK Mixer", NULL, "SPK-XSP Mux"}, |
| 740 | |
| 741 | {"SPK-ASP Mux", "Left", "ASPINL"}, |
| 742 | {"SPK-ASP Mux", "Mono Mix", "ASPINM"}, |
| 743 | {"SPK-ASP Mux", "Right", "ASPINR"}, |
| 744 | |
| 745 | {"SPK-XSP Mux", "Left", "XSPINL"}, |
| 746 | {"SPK-XSP Mux", "Mono Mix", "XSPINM"}, |
| 747 | {"SPK-XSP Mux", "Right", "XSPINR"}, |
| 748 | |
| 749 | /* HP LineOUT Paths */ |
| 750 | {"HPOUTA", NULL, "HP Amp"}, |
| 751 | {"HPOUTB", NULL, "HP Amp"}, |
| 752 | {"LINEOUTA", NULL, "LO Amp"}, |
| 753 | {"LINEOUTB", NULL, "LO Amp"}, |
| 754 | |
| 755 | {"HP Amp", "Switch", "HL Left DAC"}, |
| 756 | {"HP Amp", "Switch", "HL Right DAC"}, |
| 757 | {"LO Amp", "Switch", "HL Left DAC"}, |
| 758 | {"LO Amp", "Switch", "HL Right DAC"}, |
| 759 | |
| 760 | {"HL Left DAC", "HL-XSP Volume", "HL Left Mixer"}, |
| 761 | {"HL Right DAC", "HL-XSP Volume", "HL Right Mixer"}, |
| 762 | {"HL Left DAC", "HL-ASP Volume", "HL Left Mixer"}, |
| 763 | {"HL Right DAC", "HL-ASP Volume", "HL Right Mixer"}, |
| 764 | {"HL Left DAC", "HL-VSP Volume", "HL Left Mixer"}, |
| 765 | {"HL Right DAC", "HL-VSP Volume", "HL Right Mixer"}, |
| 766 | /* Loopback */ |
| 767 | {"HL Left DAC", "HL-IP Volume", "HL Left Mixer"}, |
| 768 | {"HL Right DAC", "HL-IP Volume", "HL Right Mixer"}, |
| 769 | {"HL Left Mixer", NULL, "Input Left Capture"}, |
| 770 | {"HL Right Mixer", NULL, "Input Right Capture"}, |
| 771 | |
| 772 | {"HL Left Mixer", NULL, "ASPINL"}, |
| 773 | {"HL Right Mixer", NULL, "ASPINR"}, |
| 774 | {"HL Left Mixer", NULL, "XSPINL"}, |
| 775 | {"HL Right Mixer", NULL, "XSPINR"}, |
| 776 | {"HL Left Mixer", NULL, "VSPIN"}, |
| 777 | {"HL Right Mixer", NULL, "VSPIN"}, |
| 778 | |
| 779 | /* Capture Paths */ |
| 780 | {"MIC1", NULL, "MIC1 Bias"}, |
| 781 | {"PGA Left Mux", "Mic 1", "MIC1"}, |
| 782 | {"MIC2", NULL, "MIC2 Bias"}, |
| 783 | {"PGA Right Mux", "Mic 2", "MIC2"}, |
| 784 | |
| 785 | {"PGA Left Mux", "Line A", "LINEINA"}, |
| 786 | {"PGA Right Mux", "Line B", "LINEINB"}, |
| 787 | |
| 788 | {"PGA Left", NULL, "PGA Left Mux"}, |
| 789 | {"PGA Right", NULL, "PGA Right Mux"}, |
| 790 | |
| 791 | {"ADC Left", NULL, "PGA Left"}, |
| 792 | {"ADC Right", NULL, "PGA Right"}, |
| 793 | |
| 794 | {"Input Left Capture", "ADC Left Input", "ADC Left"}, |
| 795 | {"Input Right Capture", "ADC Right Input", "ADC Right"}, |
| 796 | {"Input Left Capture", "DMIC Left Input", "DMIC Left"}, |
| 797 | {"Input Right Capture", "DMIC Right Input", "DMIC Right"}, |
| 798 | |
| 799 | /* Audio Capture */ |
| 800 | {"ASPL Output Mixer", NULL, "Input Left Capture"}, |
| 801 | {"ASPR Output Mixer", NULL, "Input Right Capture"}, |
| 802 | |
| 803 | {"ASPOUTL", "ASP-IP Volume", "ASPL Output Mixer"}, |
| 804 | {"ASPOUTR", "ASP-IP Volume", "ASPR Output Mixer"}, |
| 805 | |
| 806 | /* Auxillary Capture */ |
| 807 | {"XSPL Output Mixer", NULL, "Input Left Capture"}, |
| 808 | {"XSPR Output Mixer", NULL, "Input Right Capture"}, |
| 809 | |
| 810 | {"XSPOUTL", "XSP-IP Volume", "XSPL Output Mixer"}, |
| 811 | {"XSPOUTR", "XSP-IP Volume", "XSPR Output Mixer"}, |
| 812 | |
| 813 | {"XSPOUTL", NULL, "XSPL Output Mixer"}, |
| 814 | {"XSPOUTR", NULL, "XSPR Output Mixer"}, |
| 815 | |
| 816 | /* Voice Capture */ |
| 817 | {"VSPL Output Mixer", NULL, "Input Left Capture"}, |
| 818 | {"VSPR Output Mixer", NULL, "Input Left Capture"}, |
| 819 | |
| 820 | {"VSPOUTL", "VSP-IP Volume", "VSPL Output Mixer"}, |
| 821 | {"VSPOUTR", "VSP-IP Volume", "VSPR Output Mixer"}, |
| 822 | |
| 823 | {"VSPOUTL", NULL, "VSPL Output Mixer"}, |
| 824 | {"VSPOUTR", NULL, "VSPR Output Mixer"}, |
| 825 | }; |
| 826 | |
| 827 | struct cs42l73_mclk_div { |
| 828 | u32 mclk; |
| 829 | u32 srate; |
| 830 | u8 mmcc; |
| 831 | }; |
| 832 | |
| 833 | static struct cs42l73_mclk_div cs42l73_mclk_coeffs[] = { |
| 834 | /* MCLK, Sample Rate, xMMCC[5:0] */ |
| 835 | {5644800, 11025, 0x30}, |
| 836 | {5644800, 22050, 0x20}, |
| 837 | {5644800, 44100, 0x10}, |
| 838 | |
| 839 | {6000000, 8000, 0x39}, |
| 840 | {6000000, 11025, 0x33}, |
| 841 | {6000000, 12000, 0x31}, |
| 842 | {6000000, 16000, 0x29}, |
| 843 | {6000000, 22050, 0x23}, |
| 844 | {6000000, 24000, 0x21}, |
| 845 | {6000000, 32000, 0x19}, |
| 846 | {6000000, 44100, 0x13}, |
| 847 | {6000000, 48000, 0x11}, |
| 848 | |
| 849 | {6144000, 8000, 0x38}, |
| 850 | {6144000, 12000, 0x30}, |
| 851 | {6144000, 16000, 0x28}, |
| 852 | {6144000, 24000, 0x20}, |
| 853 | {6144000, 32000, 0x18}, |
| 854 | {6144000, 48000, 0x10}, |
| 855 | |
| 856 | {6500000, 8000, 0x3C}, |
| 857 | {6500000, 11025, 0x35}, |
| 858 | {6500000, 12000, 0x34}, |
| 859 | {6500000, 16000, 0x2C}, |
| 860 | {6500000, 22050, 0x25}, |
| 861 | {6500000, 24000, 0x24}, |
| 862 | {6500000, 32000, 0x1C}, |
| 863 | {6500000, 44100, 0x15}, |
| 864 | {6500000, 48000, 0x14}, |
| 865 | |
| 866 | {6400000, 8000, 0x3E}, |
| 867 | {6400000, 11025, 0x37}, |
| 868 | {6400000, 12000, 0x36}, |
| 869 | {6400000, 16000, 0x2E}, |
| 870 | {6400000, 22050, 0x27}, |
| 871 | {6400000, 24000, 0x26}, |
| 872 | {6400000, 32000, 0x1E}, |
| 873 | {6400000, 44100, 0x17}, |
| 874 | {6400000, 48000, 0x16}, |
| 875 | }; |
| 876 | |
| 877 | struct cs42l73_mclkx_div { |
| 878 | u32 mclkx; |
| 879 | u8 ratio; |
| 880 | u8 mclkdiv; |
| 881 | }; |
| 882 | |
| 883 | static struct cs42l73_mclkx_div cs42l73_mclkx_coeffs[] = { |
| 884 | {5644800, 1, 0}, /* 5644800 */ |
| 885 | {6000000, 1, 0}, /* 6000000 */ |
| 886 | {6144000, 1, 0}, /* 6144000 */ |
| 887 | {11289600, 2, 2}, /* 5644800 */ |
| 888 | {12288000, 2, 2}, /* 6144000 */ |
| 889 | {12000000, 2, 2}, /* 6000000 */ |
| 890 | {13000000, 2, 2}, /* 6500000 */ |
| 891 | {19200000, 3, 3}, /* 6400000 */ |
| 892 | {24000000, 4, 4}, /* 6000000 */ |
| 893 | {26000000, 4, 4}, /* 6500000 */ |
| 894 | {38400000, 6, 5} /* 6400000 */ |
| 895 | }; |
| 896 | |
| 897 | static int cs42l73_get_mclkx_coeff(int mclkx) |
| 898 | { |
| 899 | int i; |
| 900 | |
| 901 | for (i = 0; i < ARRAY_SIZE(cs42l73_mclkx_coeffs); i++) { |
| 902 | if (cs42l73_mclkx_coeffs[i].mclkx == mclkx) |
| 903 | return i; |
| 904 | } |
| 905 | return -EINVAL; |
| 906 | } |
| 907 | |
| 908 | static int cs42l73_get_mclk_coeff(int mclk, int srate) |
| 909 | { |
| 910 | int i; |
| 911 | |
| 912 | for (i = 0; i < ARRAY_SIZE(cs42l73_mclk_coeffs); i++) { |
| 913 | if (cs42l73_mclk_coeffs[i].mclk == mclk && |
| 914 | cs42l73_mclk_coeffs[i].srate == srate) |
| 915 | return i; |
| 916 | } |
| 917 | return -EINVAL; |
| 918 | |
| 919 | } |
| 920 | |
| 921 | static int cs42l73_set_mclk(struct snd_soc_dai *dai, unsigned int freq) |
| 922 | { |
| 923 | struct snd_soc_codec *codec = dai->codec; |
| 924 | struct cs42l73_private *priv = snd_soc_codec_get_drvdata(codec); |
| 925 | |
| 926 | int mclkx_coeff; |
| 927 | u32 mclk = 0; |
| 928 | u8 dmmcc = 0; |
| 929 | |
| 930 | /* MCLKX -> MCLK */ |
| 931 | mclkx_coeff = cs42l73_get_mclkx_coeff(freq); |
Jesper Juhl | 86fc499 | 2012-04-12 21:54:34 +0200 | [diff] [blame] | 932 | if (mclkx_coeff < 0) |
| 933 | return mclkx_coeff; |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 934 | |
| 935 | mclk = cs42l73_mclkx_coeffs[mclkx_coeff].mclkx / |
| 936 | cs42l73_mclkx_coeffs[mclkx_coeff].ratio; |
| 937 | |
| 938 | dev_dbg(codec->dev, "MCLK%u %u <-> internal MCLK %u\n", |
| 939 | priv->mclksel + 1, cs42l73_mclkx_coeffs[mclkx_coeff].mclkx, |
| 940 | mclk); |
| 941 | |
| 942 | dmmcc = (priv->mclksel << 4) | |
| 943 | (cs42l73_mclkx_coeffs[mclkx_coeff].mclkdiv << 1); |
| 944 | |
| 945 | snd_soc_write(codec, CS42L73_DMMCC, dmmcc); |
| 946 | |
| 947 | priv->sysclk = mclkx_coeff; |
| 948 | priv->mclk = mclk; |
| 949 | |
| 950 | return 0; |
| 951 | } |
| 952 | |
| 953 | static int cs42l73_set_sysclk(struct snd_soc_dai *dai, |
| 954 | int clk_id, unsigned int freq, int dir) |
| 955 | { |
| 956 | struct snd_soc_codec *codec = dai->codec; |
| 957 | struct cs42l73_private *priv = snd_soc_codec_get_drvdata(codec); |
| 958 | |
| 959 | switch (clk_id) { |
| 960 | case CS42L73_CLKID_MCLK1: |
| 961 | break; |
| 962 | case CS42L73_CLKID_MCLK2: |
| 963 | break; |
| 964 | default: |
| 965 | return -EINVAL; |
| 966 | } |
| 967 | |
| 968 | if ((cs42l73_set_mclk(dai, freq)) < 0) { |
| 969 | dev_err(codec->dev, "Unable to set MCLK for dai %s\n", |
| 970 | dai->name); |
| 971 | return -EINVAL; |
| 972 | } |
| 973 | |
| 974 | priv->mclksel = clk_id; |
| 975 | |
| 976 | return 0; |
| 977 | } |
| 978 | |
| 979 | static int cs42l73_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) |
| 980 | { |
| 981 | struct snd_soc_codec *codec = codec_dai->codec; |
| 982 | struct cs42l73_private *priv = snd_soc_codec_get_drvdata(codec); |
| 983 | u8 id = codec_dai->id; |
Axel Lin | dbb1f51 | 2011-11-18 17:16:22 +0800 | [diff] [blame] | 984 | unsigned int inv, format; |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 985 | u8 spc, mmcc; |
| 986 | |
| 987 | spc = snd_soc_read(codec, CS42L73_SPC(id)); |
| 988 | mmcc = snd_soc_read(codec, CS42L73_MMCC(id)); |
| 989 | |
| 990 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 991 | case SND_SOC_DAIFMT_CBM_CFM: |
| 992 | mmcc |= MS_MASTER; |
| 993 | break; |
| 994 | |
| 995 | case SND_SOC_DAIFMT_CBS_CFS: |
| 996 | mmcc &= ~MS_MASTER; |
| 997 | break; |
| 998 | |
| 999 | default: |
| 1000 | return -EINVAL; |
| 1001 | } |
| 1002 | |
| 1003 | format = (fmt & SND_SOC_DAIFMT_FORMAT_MASK); |
| 1004 | inv = (fmt & SND_SOC_DAIFMT_INV_MASK); |
| 1005 | |
| 1006 | switch (format) { |
| 1007 | case SND_SOC_DAIFMT_I2S: |
| 1008 | spc &= ~SPDIF_PCM; |
| 1009 | break; |
| 1010 | case SND_SOC_DAIFMT_DSP_A: |
| 1011 | case SND_SOC_DAIFMT_DSP_B: |
| 1012 | if (mmcc & MS_MASTER) { |
| 1013 | dev_err(codec->dev, |
| 1014 | "PCM format in slave mode only\n"); |
| 1015 | return -EINVAL; |
| 1016 | } |
| 1017 | if (id == CS42L73_ASP) { |
| 1018 | dev_err(codec->dev, |
| 1019 | "PCM format is not supported on ASP port\n"); |
| 1020 | return -EINVAL; |
| 1021 | } |
| 1022 | spc |= SPDIF_PCM; |
| 1023 | break; |
| 1024 | default: |
| 1025 | return -EINVAL; |
| 1026 | } |
| 1027 | |
| 1028 | if (spc & SPDIF_PCM) { |
Axel Lin | 7b282cb | 2011-11-29 19:47:38 +0800 | [diff] [blame] | 1029 | /* Clear PCM mode, clear PCM_BIT_ORDER bit for MSB->LSB */ |
| 1030 | spc &= ~(PCM_MODE_MASK | PCM_BIT_ORDER); |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1031 | switch (format) { |
| 1032 | case SND_SOC_DAIFMT_DSP_B: |
| 1033 | if (inv == SND_SOC_DAIFMT_IB_IF) |
Axel Lin | 717b8fa | 2011-11-18 16:05:13 +0800 | [diff] [blame] | 1034 | spc |= PCM_MODE0; |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1035 | if (inv == SND_SOC_DAIFMT_IB_NF) |
Axel Lin | 717b8fa | 2011-11-18 16:05:13 +0800 | [diff] [blame] | 1036 | spc |= PCM_MODE1; |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1037 | break; |
| 1038 | case SND_SOC_DAIFMT_DSP_A: |
| 1039 | if (inv == SND_SOC_DAIFMT_IB_IF) |
Axel Lin | 717b8fa | 2011-11-18 16:05:13 +0800 | [diff] [blame] | 1040 | spc |= PCM_MODE1; |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1041 | break; |
| 1042 | default: |
| 1043 | return -EINVAL; |
| 1044 | } |
| 1045 | } |
| 1046 | |
| 1047 | priv->config[id].spc = spc; |
| 1048 | priv->config[id].mmcc = mmcc; |
| 1049 | |
| 1050 | return 0; |
| 1051 | } |
| 1052 | |
| 1053 | static u32 cs42l73_asrc_rates[] = { |
| 1054 | 8000, 11025, 12000, 16000, 22050, |
| 1055 | 24000, 32000, 44100, 48000 |
| 1056 | }; |
| 1057 | |
| 1058 | static unsigned int cs42l73_get_xspfs_coeff(u32 rate) |
| 1059 | { |
| 1060 | int i; |
| 1061 | for (i = 0; i < ARRAY_SIZE(cs42l73_asrc_rates); i++) { |
| 1062 | if (cs42l73_asrc_rates[i] == rate) |
| 1063 | return i + 1; |
| 1064 | } |
| 1065 | return 0; /* 0 = Don't know */ |
| 1066 | } |
| 1067 | |
| 1068 | static void cs42l73_update_asrc(struct snd_soc_codec *codec, int id, int srate) |
| 1069 | { |
| 1070 | u8 spfs = 0; |
| 1071 | |
| 1072 | if (srate > 0) |
| 1073 | spfs = cs42l73_get_xspfs_coeff(srate); |
| 1074 | |
| 1075 | switch (id) { |
| 1076 | case CS42L73_XSP: |
| 1077 | snd_soc_update_bits(codec, CS42L73_VXSPFS, 0x0f, spfs); |
| 1078 | break; |
| 1079 | case CS42L73_ASP: |
| 1080 | snd_soc_update_bits(codec, CS42L73_ASPC, 0x3c, spfs << 2); |
| 1081 | break; |
| 1082 | case CS42L73_VSP: |
| 1083 | snd_soc_update_bits(codec, CS42L73_VXSPFS, 0xf0, spfs << 4); |
| 1084 | break; |
| 1085 | default: |
| 1086 | break; |
| 1087 | } |
| 1088 | } |
| 1089 | |
| 1090 | static int cs42l73_pcm_hw_params(struct snd_pcm_substream *substream, |
| 1091 | struct snd_pcm_hw_params *params, |
| 1092 | struct snd_soc_dai *dai) |
| 1093 | { |
| 1094 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 1095 | struct snd_soc_codec *codec = rtd->codec; |
| 1096 | struct cs42l73_private *priv = snd_soc_codec_get_drvdata(codec); |
| 1097 | int id = dai->id; |
| 1098 | int mclk_coeff; |
| 1099 | int srate = params_rate(params); |
| 1100 | |
| 1101 | if (priv->config[id].mmcc & MS_MASTER) { |
| 1102 | /* CS42L73 Master */ |
| 1103 | /* MCLK -> srate */ |
| 1104 | mclk_coeff = |
| 1105 | cs42l73_get_mclk_coeff(priv->mclk, srate); |
| 1106 | |
| 1107 | if (mclk_coeff < 0) |
| 1108 | return -EINVAL; |
| 1109 | |
| 1110 | dev_dbg(codec->dev, |
| 1111 | "DAI[%d]: MCLK %u, srate %u, MMCC[5:0] = %x\n", |
| 1112 | id, priv->mclk, srate, |
| 1113 | cs42l73_mclk_coeffs[mclk_coeff].mmcc); |
| 1114 | |
| 1115 | priv->config[id].mmcc &= 0xC0; |
| 1116 | priv->config[id].mmcc |= cs42l73_mclk_coeffs[mclk_coeff].mmcc; |
| 1117 | priv->config[id].spc &= 0xFC; |
Axel Lin | 44bed48 | 2012-01-31 09:49:04 +0800 | [diff] [blame] | 1118 | priv->config[id].spc |= MCK_SCLK_MCLK; |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1119 | } else { |
| 1120 | /* CS42L73 Slave */ |
| 1121 | priv->config[id].spc &= 0xFC; |
| 1122 | priv->config[id].spc |= MCK_SCLK_64FS; |
| 1123 | } |
| 1124 | /* Update ASRCs */ |
| 1125 | priv->config[id].srate = srate; |
| 1126 | |
| 1127 | snd_soc_write(codec, CS42L73_SPC(id), priv->config[id].spc); |
| 1128 | snd_soc_write(codec, CS42L73_MMCC(id), priv->config[id].mmcc); |
| 1129 | |
| 1130 | cs42l73_update_asrc(codec, id, srate); |
| 1131 | |
| 1132 | return 0; |
| 1133 | } |
| 1134 | |
| 1135 | static int cs42l73_set_bias_level(struct snd_soc_codec *codec, |
| 1136 | enum snd_soc_bias_level level) |
| 1137 | { |
| 1138 | struct cs42l73_private *cs42l73 = snd_soc_codec_get_drvdata(codec); |
| 1139 | |
| 1140 | switch (level) { |
| 1141 | case SND_SOC_BIAS_ON: |
| 1142 | snd_soc_update_bits(codec, CS42L73_DMMCC, MCLKDIS, 0); |
| 1143 | snd_soc_update_bits(codec, CS42L73_PWRCTL1, PDN, 0); |
| 1144 | break; |
| 1145 | |
| 1146 | case SND_SOC_BIAS_PREPARE: |
| 1147 | break; |
| 1148 | |
| 1149 | case SND_SOC_BIAS_STANDBY: |
| 1150 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
| 1151 | regcache_cache_only(cs42l73->regmap, false); |
| 1152 | regcache_sync(cs42l73->regmap); |
| 1153 | } |
| 1154 | snd_soc_update_bits(codec, CS42L73_PWRCTL1, PDN, 1); |
| 1155 | break; |
| 1156 | |
| 1157 | case SND_SOC_BIAS_OFF: |
| 1158 | snd_soc_update_bits(codec, CS42L73_PWRCTL1, PDN, 1); |
| 1159 | snd_soc_update_bits(codec, CS42L73_DMMCC, MCLKDIS, 1); |
| 1160 | break; |
| 1161 | } |
| 1162 | codec->dapm.bias_level = level; |
| 1163 | return 0; |
| 1164 | } |
| 1165 | |
| 1166 | static int cs42l73_set_tristate(struct snd_soc_dai *dai, int tristate) |
| 1167 | { |
| 1168 | struct snd_soc_codec *codec = dai->codec; |
| 1169 | int id = dai->id; |
| 1170 | |
| 1171 | return snd_soc_update_bits(codec, CS42L73_SPC(id), |
| 1172 | 0x7F, tristate << 7); |
| 1173 | } |
| 1174 | |
| 1175 | static struct snd_pcm_hw_constraint_list constraints_12_24 = { |
| 1176 | .count = ARRAY_SIZE(cs42l73_asrc_rates), |
| 1177 | .list = cs42l73_asrc_rates, |
| 1178 | }; |
| 1179 | |
| 1180 | static int cs42l73_pcm_startup(struct snd_pcm_substream *substream, |
| 1181 | struct snd_soc_dai *dai) |
| 1182 | { |
| 1183 | snd_pcm_hw_constraint_list(substream->runtime, 0, |
| 1184 | SNDRV_PCM_HW_PARAM_RATE, |
| 1185 | &constraints_12_24); |
| 1186 | return 0; |
| 1187 | } |
| 1188 | |
| 1189 | /* SNDRV_PCM_RATE_KNOT -> 12000, 24000 Hz, limit with constraint list */ |
| 1190 | #define CS42L73_RATES (SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_KNOT) |
| 1191 | |
| 1192 | |
| 1193 | #define CS42L73_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ |
| 1194 | SNDRV_PCM_FMTBIT_S24_LE) |
| 1195 | |
Lars-Peter Clausen | 890754a | 2011-11-23 14:11:21 +0100 | [diff] [blame] | 1196 | static const struct snd_soc_dai_ops cs42l73_ops = { |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1197 | .startup = cs42l73_pcm_startup, |
| 1198 | .hw_params = cs42l73_pcm_hw_params, |
| 1199 | .set_fmt = cs42l73_set_dai_fmt, |
| 1200 | .set_sysclk = cs42l73_set_sysclk, |
| 1201 | .set_tristate = cs42l73_set_tristate, |
| 1202 | }; |
| 1203 | |
| 1204 | static struct snd_soc_dai_driver cs42l73_dai[] = { |
| 1205 | { |
| 1206 | .name = "cs42l73-xsp", |
| 1207 | .id = CS42L73_XSP, |
| 1208 | .playback = { |
| 1209 | .stream_name = "XSP Playback", |
| 1210 | .channels_min = 1, |
| 1211 | .channels_max = 2, |
| 1212 | .rates = CS42L73_RATES, |
| 1213 | .formats = CS42L73_FORMATS, |
| 1214 | }, |
| 1215 | .capture = { |
| 1216 | .stream_name = "XSP Capture", |
| 1217 | .channels_min = 1, |
| 1218 | .channels_max = 2, |
| 1219 | .rates = CS42L73_RATES, |
| 1220 | .formats = CS42L73_FORMATS, |
| 1221 | }, |
| 1222 | .ops = &cs42l73_ops, |
| 1223 | .symmetric_rates = 1, |
| 1224 | }, |
| 1225 | { |
| 1226 | .name = "cs42l73-asp", |
| 1227 | .id = CS42L73_ASP, |
| 1228 | .playback = { |
| 1229 | .stream_name = "ASP Playback", |
| 1230 | .channels_min = 2, |
| 1231 | .channels_max = 2, |
| 1232 | .rates = CS42L73_RATES, |
| 1233 | .formats = CS42L73_FORMATS, |
| 1234 | }, |
| 1235 | .capture = { |
| 1236 | .stream_name = "ASP Capture", |
| 1237 | .channels_min = 2, |
| 1238 | .channels_max = 2, |
| 1239 | .rates = CS42L73_RATES, |
| 1240 | .formats = CS42L73_FORMATS, |
| 1241 | }, |
| 1242 | .ops = &cs42l73_ops, |
| 1243 | .symmetric_rates = 1, |
| 1244 | }, |
| 1245 | { |
| 1246 | .name = "cs42l73-vsp", |
| 1247 | .id = CS42L73_VSP, |
| 1248 | .playback = { |
| 1249 | .stream_name = "VSP Playback", |
| 1250 | .channels_min = 1, |
| 1251 | .channels_max = 2, |
| 1252 | .rates = CS42L73_RATES, |
| 1253 | .formats = CS42L73_FORMATS, |
| 1254 | }, |
| 1255 | .capture = { |
| 1256 | .stream_name = "VSP Capture", |
| 1257 | .channels_min = 1, |
| 1258 | .channels_max = 2, |
| 1259 | .rates = CS42L73_RATES, |
| 1260 | .formats = CS42L73_FORMATS, |
| 1261 | }, |
| 1262 | .ops = &cs42l73_ops, |
| 1263 | .symmetric_rates = 1, |
| 1264 | } |
| 1265 | }; |
| 1266 | |
Lars-Peter Clausen | 84b315e | 2011-12-02 10:18:28 +0100 | [diff] [blame] | 1267 | static int cs42l73_suspend(struct snd_soc_codec *codec) |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1268 | { |
| 1269 | cs42l73_set_bias_level(codec, SND_SOC_BIAS_OFF); |
| 1270 | |
| 1271 | return 0; |
| 1272 | } |
| 1273 | |
| 1274 | static int cs42l73_resume(struct snd_soc_codec *codec) |
| 1275 | { |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1276 | cs42l73_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 1277 | return 0; |
| 1278 | } |
| 1279 | |
| 1280 | static int cs42l73_probe(struct snd_soc_codec *codec) |
| 1281 | { |
| 1282 | int ret; |
| 1283 | struct cs42l73_private *cs42l73 = snd_soc_codec_get_drvdata(codec); |
| 1284 | |
| 1285 | codec->control_data = cs42l73->regmap; |
| 1286 | |
| 1287 | ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); |
| 1288 | if (ret < 0) { |
| 1289 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
| 1290 | return ret; |
| 1291 | } |
| 1292 | |
| 1293 | regcache_cache_only(cs42l73->regmap, true); |
| 1294 | |
| 1295 | cs42l73_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 1296 | |
| 1297 | cs42l73->mclksel = CS42L73_CLKID_MCLK1; /* MCLK1 as master clk */ |
| 1298 | cs42l73->mclk = 0; |
| 1299 | |
| 1300 | return ret; |
| 1301 | } |
| 1302 | |
| 1303 | static int cs42l73_remove(struct snd_soc_codec *codec) |
| 1304 | { |
| 1305 | cs42l73_set_bias_level(codec, SND_SOC_BIAS_OFF); |
| 1306 | return 0; |
| 1307 | } |
| 1308 | |
| 1309 | static struct snd_soc_codec_driver soc_codec_dev_cs42l73 = { |
| 1310 | .probe = cs42l73_probe, |
| 1311 | .remove = cs42l73_remove, |
| 1312 | .suspend = cs42l73_suspend, |
| 1313 | .resume = cs42l73_resume, |
| 1314 | .set_bias_level = cs42l73_set_bias_level, |
| 1315 | |
| 1316 | .dapm_widgets = cs42l73_dapm_widgets, |
| 1317 | .num_dapm_widgets = ARRAY_SIZE(cs42l73_dapm_widgets), |
| 1318 | .dapm_routes = cs42l73_audio_map, |
| 1319 | .num_dapm_routes = ARRAY_SIZE(cs42l73_audio_map), |
| 1320 | |
| 1321 | .controls = cs42l73_snd_controls, |
| 1322 | .num_controls = ARRAY_SIZE(cs42l73_snd_controls), |
| 1323 | }; |
| 1324 | |
| 1325 | static struct regmap_config cs42l73_regmap = { |
| 1326 | .reg_bits = 8, |
| 1327 | .val_bits = 8, |
| 1328 | |
| 1329 | .max_register = CS42L73_MAX_REGISTER, |
| 1330 | .reg_defaults = cs42l73_reg_defaults, |
| 1331 | .num_reg_defaults = ARRAY_SIZE(cs42l73_reg_defaults), |
| 1332 | .volatile_reg = cs42l73_volatile_register, |
| 1333 | .readable_reg = cs42l73_readable_register, |
| 1334 | .cache_type = REGCACHE_RBTREE, |
| 1335 | }; |
| 1336 | |
| 1337 | static __devinit int cs42l73_i2c_probe(struct i2c_client *i2c_client, |
| 1338 | const struct i2c_device_id *id) |
| 1339 | { |
| 1340 | struct cs42l73_private *cs42l73; |
| 1341 | int ret; |
| 1342 | unsigned int devid = 0; |
| 1343 | unsigned int reg; |
| 1344 | |
Brian Austin | cc0b401 | 2011-11-28 15:49:31 -0600 | [diff] [blame] | 1345 | cs42l73 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs42l73_private), |
| 1346 | GFP_KERNEL); |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1347 | if (!cs42l73) { |
| 1348 | dev_err(&i2c_client->dev, "could not allocate codec\n"); |
| 1349 | return -ENOMEM; |
| 1350 | } |
| 1351 | |
| 1352 | i2c_set_clientdata(i2c_client, cs42l73); |
| 1353 | |
| 1354 | cs42l73->regmap = regmap_init_i2c(i2c_client, &cs42l73_regmap); |
| 1355 | if (IS_ERR(cs42l73->regmap)) { |
| 1356 | ret = PTR_ERR(cs42l73->regmap); |
| 1357 | dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); |
| 1358 | goto err; |
| 1359 | } |
| 1360 | /* initialize codec */ |
| 1361 | ret = regmap_read(cs42l73->regmap, CS42L73_DEVID_AB, ®); |
| 1362 | devid = (reg & 0xFF) << 12; |
| 1363 | |
| 1364 | ret = regmap_read(cs42l73->regmap, CS42L73_DEVID_CD, ®); |
| 1365 | devid |= (reg & 0xFF) << 4; |
| 1366 | |
| 1367 | ret = regmap_read(cs42l73->regmap, CS42L73_DEVID_E, ®); |
| 1368 | devid |= (reg & 0xF0) >> 4; |
| 1369 | |
| 1370 | |
| 1371 | if (devid != CS42L73_DEVID) { |
Axel Lin | ea07561 | 2011-11-19 10:15:53 +0800 | [diff] [blame] | 1372 | ret = -ENODEV; |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1373 | dev_err(&i2c_client->dev, |
| 1374 | "CS42L73 Device ID (%X). Expected %X\n", |
| 1375 | devid, CS42L73_DEVID); |
| 1376 | goto err_regmap; |
| 1377 | } |
| 1378 | |
| 1379 | ret = regmap_read(cs42l73->regmap, CS42L73_REVID, ®); |
| 1380 | if (ret < 0) { |
| 1381 | dev_err(&i2c_client->dev, "Get Revision ID failed\n"); |
| 1382 | goto err_regmap; |
| 1383 | } |
| 1384 | |
| 1385 | dev_info(&i2c_client->dev, |
Axel Lin | 8421f62 | 2011-11-19 10:17:36 +0800 | [diff] [blame] | 1386 | "Cirrus Logic CS42L73, Revision: %02X\n", reg & 0xFF); |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1387 | |
| 1388 | regcache_cache_only(cs42l73->regmap, true); |
| 1389 | |
| 1390 | ret = snd_soc_register_codec(&i2c_client->dev, |
| 1391 | &soc_codec_dev_cs42l73, cs42l73_dai, |
| 1392 | ARRAY_SIZE(cs42l73_dai)); |
| 1393 | if (ret < 0) |
| 1394 | goto err_regmap; |
| 1395 | return 0; |
| 1396 | |
| 1397 | err_regmap: |
| 1398 | regmap_exit(cs42l73->regmap); |
| 1399 | |
| 1400 | err: |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1401 | return ret; |
| 1402 | } |
| 1403 | |
| 1404 | static __devexit int cs42l73_i2c_remove(struct i2c_client *client) |
| 1405 | { |
| 1406 | struct cs42l73_private *cs42l73 = i2c_get_clientdata(client); |
| 1407 | |
| 1408 | snd_soc_unregister_codec(&client->dev); |
| 1409 | regmap_exit(cs42l73->regmap); |
| 1410 | |
Brian Austin | 6d10c91 | 2011-11-16 12:32:27 -0600 | [diff] [blame] | 1411 | return 0; |
| 1412 | } |
| 1413 | |
| 1414 | static const struct i2c_device_id cs42l73_id[] = { |
| 1415 | {"cs42l73", 0}, |
| 1416 | {} |
| 1417 | }; |
| 1418 | |
| 1419 | MODULE_DEVICE_TABLE(i2c, cs42l73_id); |
| 1420 | |
| 1421 | static struct i2c_driver cs42l73_i2c_driver = { |
| 1422 | .driver = { |
| 1423 | .name = "cs42l73", |
| 1424 | .owner = THIS_MODULE, |
| 1425 | }, |
| 1426 | .id_table = cs42l73_id, |
| 1427 | .probe = cs42l73_i2c_probe, |
| 1428 | .remove = __devexit_p(cs42l73_i2c_remove), |
| 1429 | |
| 1430 | }; |
| 1431 | |
| 1432 | static int __init cs42l73_modinit(void) |
| 1433 | { |
| 1434 | int ret; |
| 1435 | ret = i2c_add_driver(&cs42l73_i2c_driver); |
| 1436 | if (ret != 0) { |
| 1437 | pr_err("Failed to register CS42L73 I2C driver: %d\n", ret); |
| 1438 | return ret; |
| 1439 | } |
| 1440 | return 0; |
| 1441 | } |
| 1442 | |
| 1443 | module_init(cs42l73_modinit); |
| 1444 | |
| 1445 | static void __exit cs42l73_exit(void) |
| 1446 | { |
| 1447 | i2c_del_driver(&cs42l73_i2c_driver); |
| 1448 | } |
| 1449 | |
| 1450 | module_exit(cs42l73_exit); |
| 1451 | |
| 1452 | MODULE_DESCRIPTION("ASoC CS42L73 driver"); |
| 1453 | MODULE_AUTHOR("Georgi Vlaev, Nucleus Systems Ltd, <joe@nucleusys.com>"); |
| 1454 | MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>"); |
| 1455 | MODULE_LICENSE("GPL"); |