Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * Support for IDE interfaces on PowerMacs. |
Bartlomiej Zolnierkiewicz | 58f189f | 2008-02-01 23:09:33 +0100 | [diff] [blame] | 3 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * These IDE interfaces are memory-mapped and have a DBDMA channel |
| 5 | * for doing DMA. |
| 6 | * |
| 7 | * Copyright (C) 1998-2003 Paul Mackerras & Ben. Herrenschmidt |
Bartlomiej Zolnierkiewicz | 8a97206 | 2008-07-16 20:33:38 +0200 | [diff] [blame] | 8 | * Copyright (C) 2007-2008 Bartlomiej Zolnierkiewicz |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License |
| 12 | * as published by the Free Software Foundation; either version |
| 13 | * 2 of the License, or (at your option) any later version. |
| 14 | * |
| 15 | * Some code taken from drivers/ide/ide-dma.c: |
| 16 | * |
| 17 | * Copyright (c) 1995-1998 Mark Lord |
| 18 | * |
| 19 | * TODO: - Use pre-calculated (kauai) timing tables all the time and |
| 20 | * get rid of the "rounded" tables used previously, so we have the |
| 21 | * same table format for all controllers and can then just have one |
| 22 | * big table |
| 23 | * |
| 24 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <linux/types.h> |
| 26 | #include <linux/kernel.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #include <linux/init.h> |
| 28 | #include <linux/delay.h> |
| 29 | #include <linux/ide.h> |
| 30 | #include <linux/notifier.h> |
Paul Gortmaker | bff7832 | 2011-07-03 13:41:29 -0400 | [diff] [blame] | 31 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | #include <linux/reboot.h> |
| 33 | #include <linux/pci.h> |
| 34 | #include <linux/adb.h> |
| 35 | #include <linux/pmu.h> |
| 36 | #include <linux/scatterlist.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 37 | #include <linux/slab.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | |
| 39 | #include <asm/prom.h> |
| 40 | #include <asm/io.h> |
| 41 | #include <asm/dbdma.h> |
| 42 | #include <asm/ide.h> |
| 43 | #include <asm/pci-bridge.h> |
| 44 | #include <asm/machdep.h> |
| 45 | #include <asm/pmac_feature.h> |
| 46 | #include <asm/sections.h> |
| 47 | #include <asm/irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <asm/mediabay.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | |
Bartlomiej Zolnierkiewicz | b36ba53 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 50 | #define DRV_NAME "ide-pmac" |
| 51 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | #undef IDE_PMAC_DEBUG |
| 53 | |
| 54 | #define DMA_WAIT_TIMEOUT 50 |
| 55 | |
| 56 | typedef struct pmac_ide_hwif { |
| 57 | unsigned long regbase; |
| 58 | int irq; |
| 59 | int kind; |
| 60 | int aapl_bus_id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | unsigned broken_dma : 1; |
| 62 | unsigned broken_dma_warn : 1; |
| 63 | struct device_node* node; |
| 64 | struct macio_dev *mdev; |
| 65 | u32 timings[4]; |
| 66 | volatile u32 __iomem * *kauai_fcr; |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 67 | ide_hwif_t *hwif; |
| 68 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | /* Those fields are duplicating what is in hwif. We currently |
| 70 | * can't use the hwif ones because of some assumptions that are |
| 71 | * beeing done by the generic code about the kind of dma controller |
| 72 | * and format of the dma table. This will have to be fixed though. |
| 73 | */ |
| 74 | volatile struct dbdma_regs __iomem * dma_regs; |
| 75 | struct dbdma_cmd* dma_table_cpu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | } pmac_ide_hwif_t; |
| 77 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | enum { |
| 79 | controller_ohare, /* OHare based */ |
| 80 | controller_heathrow, /* Heathrow/Paddington */ |
| 81 | controller_kl_ata3, /* KeyLargo ATA-3 */ |
| 82 | controller_kl_ata4, /* KeyLargo ATA-4 */ |
| 83 | controller_un_ata6, /* UniNorth2 ATA-6 */ |
| 84 | controller_k2_ata6, /* K2 ATA-6 */ |
| 85 | controller_sh_ata6, /* Shasta ATA-6 */ |
| 86 | }; |
| 87 | |
| 88 | static const char* model_name[] = { |
| 89 | "OHare ATA", /* OHare based */ |
| 90 | "Heathrow ATA", /* Heathrow/Paddington */ |
| 91 | "KeyLargo ATA-3", /* KeyLargo ATA-3 (MDMA only) */ |
| 92 | "KeyLargo ATA-4", /* KeyLargo ATA-4 (UDMA/66) */ |
| 93 | "UniNorth ATA-6", /* UniNorth2 ATA-6 (UDMA/100) */ |
| 94 | "K2 ATA-6", /* K2 ATA-6 (UDMA/100) */ |
| 95 | "Shasta ATA-6", /* Shasta ATA-6 (UDMA/133) */ |
| 96 | }; |
| 97 | |
| 98 | /* |
| 99 | * Extra registers, both 32-bit little-endian |
| 100 | */ |
| 101 | #define IDE_TIMING_CONFIG 0x200 |
| 102 | #define IDE_INTERRUPT 0x300 |
| 103 | |
| 104 | /* Kauai (U2) ATA has different register setup */ |
| 105 | #define IDE_KAUAI_PIO_CONFIG 0x200 |
| 106 | #define IDE_KAUAI_ULTRA_CONFIG 0x210 |
| 107 | #define IDE_KAUAI_POLL_CONFIG 0x220 |
| 108 | |
| 109 | /* |
| 110 | * Timing configuration register definitions |
| 111 | */ |
| 112 | |
| 113 | /* Number of IDE_SYSCLK_NS ticks, argument is in nanoseconds */ |
| 114 | #define SYSCLK_TICKS(t) (((t) + IDE_SYSCLK_NS - 1) / IDE_SYSCLK_NS) |
| 115 | #define SYSCLK_TICKS_66(t) (((t) + IDE_SYSCLK_66_NS - 1) / IDE_SYSCLK_66_NS) |
| 116 | #define IDE_SYSCLK_NS 30 /* 33Mhz cell */ |
| 117 | #define IDE_SYSCLK_66_NS 15 /* 66Mhz cell */ |
| 118 | |
| 119 | /* 133Mhz cell, found in shasta. |
| 120 | * See comments about 100 Mhz Uninorth 2... |
| 121 | * Note that PIO_MASK and MDMA_MASK seem to overlap |
| 122 | */ |
| 123 | #define TR_133_PIOREG_PIO_MASK 0xff000fff |
| 124 | #define TR_133_PIOREG_MDMA_MASK 0x00fff800 |
| 125 | #define TR_133_UDMAREG_UDMA_MASK 0x0003ffff |
| 126 | #define TR_133_UDMAREG_UDMA_EN 0x00000001 |
| 127 | |
| 128 | /* 100Mhz cell, found in Uninorth 2. I don't have much infos about |
| 129 | * this one yet, it appears as a pci device (106b/0033) on uninorth |
| 130 | * internal PCI bus and it's clock is controlled like gem or fw. It |
| 131 | * appears to be an evolution of keylargo ATA4 with a timing register |
| 132 | * extended to 2 32bits registers and a similar DBDMA channel. Other |
| 133 | * registers seem to exist but I can't tell much about them. |
| 134 | * |
| 135 | * So far, I'm using pre-calculated tables for this extracted from |
| 136 | * the values used by the MacOS X driver. |
| 137 | * |
| 138 | * The "PIO" register controls PIO and MDMA timings, the "ULTRA" |
| 139 | * register controls the UDMA timings. At least, it seems bit 0 |
| 140 | * of this one enables UDMA vs. MDMA, and bits 4..7 are the |
| 141 | * cycle time in units of 10ns. Bits 8..15 are used by I don't |
| 142 | * know their meaning yet |
| 143 | */ |
| 144 | #define TR_100_PIOREG_PIO_MASK 0xff000fff |
| 145 | #define TR_100_PIOREG_MDMA_MASK 0x00fff000 |
| 146 | #define TR_100_UDMAREG_UDMA_MASK 0x0000ffff |
| 147 | #define TR_100_UDMAREG_UDMA_EN 0x00000001 |
| 148 | |
| 149 | |
| 150 | /* 66Mhz cell, found in KeyLargo. Can do ultra mode 0 to 2 on |
| 151 | * 40 connector cable and to 4 on 80 connector one. |
| 152 | * Clock unit is 15ns (66Mhz) |
| 153 | * |
| 154 | * 3 Values can be programmed: |
| 155 | * - Write data setup, which appears to match the cycle time. They |
| 156 | * also call it DIOW setup. |
| 157 | * - Ready to pause time (from spec) |
| 158 | * - Address setup. That one is weird. I don't see where exactly |
| 159 | * it fits in UDMA cycles, I got it's name from an obscure piece |
| 160 | * of commented out code in Darwin. They leave it to 0, we do as |
| 161 | * well, despite a comment that would lead to think it has a |
| 162 | * min value of 45ns. |
| 163 | * Apple also add 60ns to the write data setup (or cycle time ?) on |
| 164 | * reads. |
| 165 | */ |
| 166 | #define TR_66_UDMA_MASK 0xfff00000 |
| 167 | #define TR_66_UDMA_EN 0x00100000 /* Enable Ultra mode for DMA */ |
| 168 | #define TR_66_UDMA_ADDRSETUP_MASK 0xe0000000 /* Address setup */ |
| 169 | #define TR_66_UDMA_ADDRSETUP_SHIFT 29 |
| 170 | #define TR_66_UDMA_RDY2PAUS_MASK 0x1e000000 /* Ready 2 pause time */ |
| 171 | #define TR_66_UDMA_RDY2PAUS_SHIFT 25 |
| 172 | #define TR_66_UDMA_WRDATASETUP_MASK 0x01e00000 /* Write data setup time */ |
| 173 | #define TR_66_UDMA_WRDATASETUP_SHIFT 21 |
| 174 | #define TR_66_MDMA_MASK 0x000ffc00 |
| 175 | #define TR_66_MDMA_RECOVERY_MASK 0x000f8000 |
| 176 | #define TR_66_MDMA_RECOVERY_SHIFT 15 |
| 177 | #define TR_66_MDMA_ACCESS_MASK 0x00007c00 |
| 178 | #define TR_66_MDMA_ACCESS_SHIFT 10 |
| 179 | #define TR_66_PIO_MASK 0x000003ff |
| 180 | #define TR_66_PIO_RECOVERY_MASK 0x000003e0 |
| 181 | #define TR_66_PIO_RECOVERY_SHIFT 5 |
| 182 | #define TR_66_PIO_ACCESS_MASK 0x0000001f |
| 183 | #define TR_66_PIO_ACCESS_SHIFT 0 |
| 184 | |
| 185 | /* 33Mhz cell, found in OHare, Heathrow (& Paddington) and KeyLargo |
| 186 | * Can do pio & mdma modes, clock unit is 30ns (33Mhz) |
| 187 | * |
| 188 | * The access time and recovery time can be programmed. Some older |
| 189 | * Darwin code base limit OHare to 150ns cycle time. I decided to do |
| 190 | * the same here fore safety against broken old hardware ;) |
| 191 | * The HalfTick bit, when set, adds half a clock (15ns) to the access |
| 192 | * time and removes one from recovery. It's not supported on KeyLargo |
| 193 | * implementation afaik. The E bit appears to be set for PIO mode 0 and |
| 194 | * is used to reach long timings used in this mode. |
| 195 | */ |
| 196 | #define TR_33_MDMA_MASK 0x003ff800 |
| 197 | #define TR_33_MDMA_RECOVERY_MASK 0x001f0000 |
| 198 | #define TR_33_MDMA_RECOVERY_SHIFT 16 |
| 199 | #define TR_33_MDMA_ACCESS_MASK 0x0000f800 |
| 200 | #define TR_33_MDMA_ACCESS_SHIFT 11 |
| 201 | #define TR_33_MDMA_HALFTICK 0x00200000 |
| 202 | #define TR_33_PIO_MASK 0x000007ff |
| 203 | #define TR_33_PIO_E 0x00000400 |
| 204 | #define TR_33_PIO_RECOVERY_MASK 0x000003e0 |
| 205 | #define TR_33_PIO_RECOVERY_SHIFT 5 |
| 206 | #define TR_33_PIO_ACCESS_MASK 0x0000001f |
| 207 | #define TR_33_PIO_ACCESS_SHIFT 0 |
| 208 | |
| 209 | /* |
| 210 | * Interrupt register definitions |
| 211 | */ |
| 212 | #define IDE_INTR_DMA 0x80000000 |
| 213 | #define IDE_INTR_DEVICE 0x40000000 |
| 214 | |
| 215 | /* |
| 216 | * FCR Register on Kauai. Not sure what bit 0x4 is ... |
| 217 | */ |
| 218 | #define KAUAI_FCR_UATA_MAGIC 0x00000004 |
| 219 | #define KAUAI_FCR_UATA_RESET_N 0x00000002 |
| 220 | #define KAUAI_FCR_UATA_ENABLE 0x00000001 |
| 221 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | /* Rounded Multiword DMA timings |
| 223 | * |
| 224 | * I gave up finding a generic formula for all controller |
| 225 | * types and instead, built tables based on timing values |
| 226 | * used by Apple in Darwin's implementation. |
| 227 | */ |
| 228 | struct mdma_timings_t { |
| 229 | int accessTime; |
| 230 | int recoveryTime; |
| 231 | int cycleTime; |
| 232 | }; |
| 233 | |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 234 | struct mdma_timings_t mdma_timings_33[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 235 | { |
| 236 | { 240, 240, 480 }, |
| 237 | { 180, 180, 360 }, |
| 238 | { 135, 135, 270 }, |
| 239 | { 120, 120, 240 }, |
| 240 | { 105, 105, 210 }, |
| 241 | { 90, 90, 180 }, |
| 242 | { 75, 75, 150 }, |
| 243 | { 75, 45, 120 }, |
| 244 | { 0, 0, 0 } |
| 245 | }; |
| 246 | |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 247 | struct mdma_timings_t mdma_timings_33k[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 248 | { |
| 249 | { 240, 240, 480 }, |
| 250 | { 180, 180, 360 }, |
| 251 | { 150, 150, 300 }, |
| 252 | { 120, 120, 240 }, |
| 253 | { 90, 120, 210 }, |
| 254 | { 90, 90, 180 }, |
| 255 | { 90, 60, 150 }, |
| 256 | { 90, 30, 120 }, |
| 257 | { 0, 0, 0 } |
| 258 | }; |
| 259 | |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 260 | struct mdma_timings_t mdma_timings_66[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 261 | { |
| 262 | { 240, 240, 480 }, |
| 263 | { 180, 180, 360 }, |
| 264 | { 135, 135, 270 }, |
| 265 | { 120, 120, 240 }, |
| 266 | { 105, 105, 210 }, |
| 267 | { 90, 90, 180 }, |
| 268 | { 90, 75, 165 }, |
| 269 | { 75, 45, 120 }, |
| 270 | { 0, 0, 0 } |
| 271 | }; |
| 272 | |
| 273 | /* KeyLargo ATA-4 Ultra DMA timings (rounded) */ |
| 274 | struct { |
| 275 | int addrSetup; /* ??? */ |
| 276 | int rdy2pause; |
| 277 | int wrDataSetup; |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 278 | } kl66_udma_timings[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 279 | { |
| 280 | { 0, 180, 120 }, /* Mode 0 */ |
| 281 | { 0, 150, 90 }, /* 1 */ |
| 282 | { 0, 120, 60 }, /* 2 */ |
| 283 | { 0, 90, 45 }, /* 3 */ |
| 284 | { 0, 90, 30 } /* 4 */ |
| 285 | }; |
| 286 | |
| 287 | /* UniNorth 2 ATA/100 timings */ |
| 288 | struct kauai_timing { |
| 289 | int cycle_time; |
| 290 | u32 timing_reg; |
| 291 | }; |
| 292 | |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 293 | static struct kauai_timing kauai_pio_timings[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | { |
| 295 | { 930 , 0x08000fff }, |
| 296 | { 600 , 0x08000a92 }, |
| 297 | { 383 , 0x0800060f }, |
| 298 | { 360 , 0x08000492 }, |
| 299 | { 330 , 0x0800048f }, |
| 300 | { 300 , 0x080003cf }, |
| 301 | { 270 , 0x080003cc }, |
| 302 | { 240 , 0x0800038b }, |
| 303 | { 239 , 0x0800030c }, |
| 304 | { 180 , 0x05000249 }, |
Bartlomiej Zolnierkiewicz | c15d5d4 | 2007-10-11 23:54:01 +0200 | [diff] [blame] | 305 | { 120 , 0x04000148 }, |
| 306 | { 0 , 0 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | }; |
| 308 | |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 309 | static struct kauai_timing kauai_mdma_timings[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | { |
| 311 | { 1260 , 0x00fff000 }, |
| 312 | { 480 , 0x00618000 }, |
| 313 | { 360 , 0x00492000 }, |
| 314 | { 270 , 0x0038e000 }, |
| 315 | { 240 , 0x0030c000 }, |
| 316 | { 210 , 0x002cb000 }, |
| 317 | { 180 , 0x00249000 }, |
| 318 | { 150 , 0x00209000 }, |
| 319 | { 120 , 0x00148000 }, |
| 320 | { 0 , 0 }, |
| 321 | }; |
| 322 | |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 323 | static struct kauai_timing kauai_udma_timings[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 324 | { |
| 325 | { 120 , 0x000070c0 }, |
| 326 | { 90 , 0x00005d80 }, |
| 327 | { 60 , 0x00004a60 }, |
| 328 | { 45 , 0x00003a50 }, |
| 329 | { 30 , 0x00002a30 }, |
| 330 | { 20 , 0x00002921 }, |
| 331 | { 0 , 0 }, |
| 332 | }; |
| 333 | |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 334 | static struct kauai_timing shasta_pio_timings[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | { |
| 336 | { 930 , 0x08000fff }, |
| 337 | { 600 , 0x0A000c97 }, |
| 338 | { 383 , 0x07000712 }, |
| 339 | { 360 , 0x040003cd }, |
| 340 | { 330 , 0x040003cd }, |
| 341 | { 300 , 0x040003cd }, |
| 342 | { 270 , 0x040003cd }, |
| 343 | { 240 , 0x040003cd }, |
| 344 | { 239 , 0x040003cd }, |
| 345 | { 180 , 0x0400028b }, |
Bartlomiej Zolnierkiewicz | c15d5d4 | 2007-10-11 23:54:01 +0200 | [diff] [blame] | 346 | { 120 , 0x0400010a }, |
| 347 | { 0 , 0 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 348 | }; |
| 349 | |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 350 | static struct kauai_timing shasta_mdma_timings[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 351 | { |
| 352 | { 1260 , 0x00fff000 }, |
| 353 | { 480 , 0x00820800 }, |
| 354 | { 360 , 0x00820800 }, |
| 355 | { 270 , 0x00820800 }, |
| 356 | { 240 , 0x00820800 }, |
| 357 | { 210 , 0x00820800 }, |
| 358 | { 180 , 0x00820800 }, |
| 359 | { 150 , 0x0028b000 }, |
| 360 | { 120 , 0x001ca000 }, |
| 361 | { 0 , 0 }, |
| 362 | }; |
| 363 | |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 364 | static struct kauai_timing shasta_udma133_timings[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 365 | { |
| 366 | { 120 , 0x00035901, }, |
| 367 | { 90 , 0x000348b1, }, |
| 368 | { 60 , 0x00033881, }, |
| 369 | { 45 , 0x00033861, }, |
| 370 | { 30 , 0x00033841, }, |
| 371 | { 20 , 0x00033031, }, |
| 372 | { 15 , 0x00033021, }, |
| 373 | { 0 , 0 }, |
| 374 | }; |
| 375 | |
| 376 | |
| 377 | static inline u32 |
| 378 | kauai_lookup_timing(struct kauai_timing* table, int cycle_time) |
| 379 | { |
| 380 | int i; |
| 381 | |
| 382 | for (i=0; table[i].cycle_time; i++) |
| 383 | if (cycle_time > table[i+1].cycle_time) |
| 384 | return table[i].timing_reg; |
Bartlomiej Zolnierkiewicz | 90a87ea | 2007-10-13 17:47:48 +0200 | [diff] [blame] | 385 | BUG(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | return 0; |
| 387 | } |
| 388 | |
| 389 | /* allow up to 256 DBDMA commands per xfer */ |
| 390 | #define MAX_DCMDS 256 |
| 391 | |
| 392 | /* |
| 393 | * Wait 1s for disk to answer on IDE bus after a hard reset |
| 394 | * of the device (via GPIO/FCR). |
| 395 | * |
| 396 | * Some devices seem to "pollute" the bus even after dropping |
| 397 | * the BSY bit (typically some combo drives slave on the UDMA |
| 398 | * bus) after a hard reset. Since we hard reset all drives on |
| 399 | * KeyLargo ATA66, we have to keep that delay around. I may end |
| 400 | * up not hard resetting anymore on these and keep the delay only |
| 401 | * for older interfaces instead (we have to reset when coming |
| 402 | * from MacOS...) --BenH. |
| 403 | */ |
| 404 | #define IDE_WAKEUP_DELAY (1*HZ) |
| 405 | |
Bartlomiej Zolnierkiewicz | 0d07192 | 2008-04-26 22:25:22 +0200 | [diff] [blame] | 406 | static int pmac_ide_init_dma(ide_hwif_t *, const struct ide_port_info *); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 407 | |
Bartlomiej Zolnierkiewicz | 23579a2 | 2008-04-18 00:46:26 +0200 | [diff] [blame] | 408 | #define PMAC_IDE_REG(x) \ |
Bartlomiej Zolnierkiewicz | 4c3032d | 2008-04-27 15:38:32 +0200 | [diff] [blame] | 409 | ((void __iomem *)((drive)->hwif->io_ports.data_addr + (x))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 410 | |
| 411 | /* |
| 412 | * Apply the timings of the proper unit (master/slave) to the shared |
| 413 | * timing register when selecting that unit. This version is for |
| 414 | * ASICs with a single timing register |
| 415 | */ |
Sergei Shtylyov | abb596b | 2009-03-31 20:15:32 +0200 | [diff] [blame] | 416 | static void pmac_ide_apply_timings(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 418 | ide_hwif_t *hwif = drive->hwif; |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 419 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 420 | |
Bartlomiej Zolnierkiewicz | 123995b | 2008-10-13 21:39:40 +0200 | [diff] [blame] | 421 | if (drive->dn & 1) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 422 | writel(pmif->timings[1], PMAC_IDE_REG(IDE_TIMING_CONFIG)); |
| 423 | else |
| 424 | writel(pmif->timings[0], PMAC_IDE_REG(IDE_TIMING_CONFIG)); |
| 425 | (void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG)); |
| 426 | } |
| 427 | |
| 428 | /* |
| 429 | * Apply the timings of the proper unit (master/slave) to the shared |
| 430 | * timing register when selecting that unit. This version is for |
| 431 | * ASICs with a dual timing register (Kauai) |
| 432 | */ |
Sergei Shtylyov | abb596b | 2009-03-31 20:15:32 +0200 | [diff] [blame] | 433 | static void pmac_ide_kauai_apply_timings(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 434 | { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 435 | ide_hwif_t *hwif = drive->hwif; |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 436 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 437 | |
Bartlomiej Zolnierkiewicz | 123995b | 2008-10-13 21:39:40 +0200 | [diff] [blame] | 438 | if (drive->dn & 1) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 439 | writel(pmif->timings[1], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG)); |
| 440 | writel(pmif->timings[3], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG)); |
| 441 | } else { |
| 442 | writel(pmif->timings[0], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG)); |
| 443 | writel(pmif->timings[2], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG)); |
| 444 | } |
| 445 | (void)readl(PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG)); |
| 446 | } |
| 447 | |
| 448 | /* |
| 449 | * Force an update of controller timing values for a given drive |
| 450 | */ |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 451 | static void |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | pmac_ide_do_update_timings(ide_drive_t *drive) |
| 453 | { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 454 | ide_hwif_t *hwif = drive->hwif; |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 455 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 456 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | if (pmif->kind == controller_sh_ata6 || |
| 458 | pmif->kind == controller_un_ata6 || |
| 459 | pmif->kind == controller_k2_ata6) |
Sergei Shtylyov | abb596b | 2009-03-31 20:15:32 +0200 | [diff] [blame] | 460 | pmac_ide_kauai_apply_timings(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | else |
Sergei Shtylyov | abb596b | 2009-03-31 20:15:32 +0200 | [diff] [blame] | 462 | pmac_ide_apply_timings(drive); |
| 463 | } |
| 464 | |
| 465 | static void pmac_dev_select(ide_drive_t *drive) |
| 466 | { |
| 467 | pmac_ide_apply_timings(drive); |
| 468 | |
| 469 | writeb(drive->select | ATA_DEVICE_OBS, |
| 470 | (void __iomem *)drive->hwif->io_ports.device_addr); |
| 471 | } |
| 472 | |
| 473 | static void pmac_kauai_dev_select(ide_drive_t *drive) |
| 474 | { |
| 475 | pmac_ide_kauai_apply_timings(drive); |
| 476 | |
| 477 | writeb(drive->select | ATA_DEVICE_OBS, |
| 478 | (void __iomem *)drive->hwif->io_ports.device_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | } |
| 480 | |
Bartlomiej Zolnierkiewicz | c6dfa86 | 2008-07-23 19:55:51 +0200 | [diff] [blame] | 481 | static void pmac_exec_command(ide_hwif_t *hwif, u8 cmd) |
| 482 | { |
| 483 | writeb(cmd, (void __iomem *)hwif->io_ports.command_addr); |
| 484 | (void)readl((void __iomem *)(hwif->io_ports.data_addr |
| 485 | + IDE_TIMING_CONFIG)); |
| 486 | } |
| 487 | |
Sergei Shtylyov | ecf3a31 | 2009-03-31 20:15:30 +0200 | [diff] [blame] | 488 | static void pmac_write_devctl(ide_hwif_t *hwif, u8 ctl) |
Bartlomiej Zolnierkiewicz | 6e6afb3 | 2008-07-23 19:55:52 +0200 | [diff] [blame] | 489 | { |
Bartlomiej Zolnierkiewicz | 6e6afb3 | 2008-07-23 19:55:52 +0200 | [diff] [blame] | 490 | writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr); |
| 491 | (void)readl((void __iomem *)(hwif->io_ports.data_addr |
| 492 | + IDE_TIMING_CONFIG)); |
| 493 | } |
| 494 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 495 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | * Old tuning functions (called on hdparm -p), sets up drive PIO timings |
| 497 | */ |
Bartlomiej Zolnierkiewicz | e085b3c | 2010-01-19 01:44:41 -0800 | [diff] [blame] | 498 | static void pmac_ide_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 499 | { |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 500 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Bartlomiej Zolnierkiewicz | e085b3c | 2010-01-19 01:44:41 -0800 | [diff] [blame] | 501 | const u8 pio = drive->pio_mode - XFER_PIO_0; |
Bartlomiej Zolnierkiewicz | 8a97206 | 2008-07-16 20:33:38 +0200 | [diff] [blame] | 502 | struct ide_timing *tim = ide_timing_find_mode(XFER_PIO_0 + pio); |
Benjamin Herrenschmidt | 0b46ff2 | 2007-10-13 17:47:50 +0200 | [diff] [blame] | 503 | u32 *timings, t; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | unsigned accessTicks, recTicks; |
| 505 | unsigned accessTime, recTime; |
Bartlomiej Zolnierkiewicz | 7dd0008 | 2007-07-20 01:11:56 +0200 | [diff] [blame] | 506 | unsigned int cycle_time; |
| 507 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 508 | /* which drive is it ? */ |
Bartlomiej Zolnierkiewicz | 123995b | 2008-10-13 21:39:40 +0200 | [diff] [blame] | 509 | timings = &pmif->timings[drive->dn & 1]; |
Benjamin Herrenschmidt | 0b46ff2 | 2007-10-13 17:47:50 +0200 | [diff] [blame] | 510 | t = *timings; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 511 | |
Bartlomiej Zolnierkiewicz | 7dd0008 | 2007-07-20 01:11:56 +0200 | [diff] [blame] | 512 | cycle_time = ide_pio_cycle_time(drive, pio); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | |
| 514 | switch (pmif->kind) { |
| 515 | case controller_sh_ata6: { |
| 516 | /* 133Mhz cell */ |
Bartlomiej Zolnierkiewicz | 7dd0008 | 2007-07-20 01:11:56 +0200 | [diff] [blame] | 517 | u32 tr = kauai_lookup_timing(shasta_pio_timings, cycle_time); |
Benjamin Herrenschmidt | 0b46ff2 | 2007-10-13 17:47:50 +0200 | [diff] [blame] | 518 | t = (t & ~TR_133_PIOREG_PIO_MASK) | tr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 519 | break; |
| 520 | } |
| 521 | case controller_un_ata6: |
| 522 | case controller_k2_ata6: { |
| 523 | /* 100Mhz cell */ |
Bartlomiej Zolnierkiewicz | 7dd0008 | 2007-07-20 01:11:56 +0200 | [diff] [blame] | 524 | u32 tr = kauai_lookup_timing(kauai_pio_timings, cycle_time); |
Benjamin Herrenschmidt | 0b46ff2 | 2007-10-13 17:47:50 +0200 | [diff] [blame] | 525 | t = (t & ~TR_100_PIOREG_PIO_MASK) | tr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 526 | break; |
| 527 | } |
| 528 | case controller_kl_ata4: |
| 529 | /* 66Mhz cell */ |
Bartlomiej Zolnierkiewicz | 8a97206 | 2008-07-16 20:33:38 +0200 | [diff] [blame] | 530 | recTime = cycle_time - tim->active - tim->setup; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 531 | recTime = max(recTime, 150U); |
Bartlomiej Zolnierkiewicz | 8a97206 | 2008-07-16 20:33:38 +0200 | [diff] [blame] | 532 | accessTime = tim->active; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 533 | accessTime = max(accessTime, 150U); |
| 534 | accessTicks = SYSCLK_TICKS_66(accessTime); |
| 535 | accessTicks = min(accessTicks, 0x1fU); |
| 536 | recTicks = SYSCLK_TICKS_66(recTime); |
| 537 | recTicks = min(recTicks, 0x1fU); |
Benjamin Herrenschmidt | 0b46ff2 | 2007-10-13 17:47:50 +0200 | [diff] [blame] | 538 | t = (t & ~TR_66_PIO_MASK) | |
| 539 | (accessTicks << TR_66_PIO_ACCESS_SHIFT) | |
| 540 | (recTicks << TR_66_PIO_RECOVERY_SHIFT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 541 | break; |
| 542 | default: { |
| 543 | /* 33Mhz cell */ |
| 544 | int ebit = 0; |
Bartlomiej Zolnierkiewicz | 8a97206 | 2008-07-16 20:33:38 +0200 | [diff] [blame] | 545 | recTime = cycle_time - tim->active - tim->setup; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | recTime = max(recTime, 150U); |
Bartlomiej Zolnierkiewicz | 8a97206 | 2008-07-16 20:33:38 +0200 | [diff] [blame] | 547 | accessTime = tim->active; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 548 | accessTime = max(accessTime, 150U); |
| 549 | accessTicks = SYSCLK_TICKS(accessTime); |
| 550 | accessTicks = min(accessTicks, 0x1fU); |
| 551 | accessTicks = max(accessTicks, 4U); |
| 552 | recTicks = SYSCLK_TICKS(recTime); |
| 553 | recTicks = min(recTicks, 0x1fU); |
| 554 | recTicks = max(recTicks, 5U) - 4; |
| 555 | if (recTicks > 9) { |
| 556 | recTicks--; /* guess, but it's only for PIO0, so... */ |
| 557 | ebit = 1; |
| 558 | } |
Benjamin Herrenschmidt | 0b46ff2 | 2007-10-13 17:47:50 +0200 | [diff] [blame] | 559 | t = (t & ~TR_33_PIO_MASK) | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 560 | (accessTicks << TR_33_PIO_ACCESS_SHIFT) | |
| 561 | (recTicks << TR_33_PIO_RECOVERY_SHIFT); |
| 562 | if (ebit) |
Benjamin Herrenschmidt | 0b46ff2 | 2007-10-13 17:47:50 +0200 | [diff] [blame] | 563 | t |= TR_33_PIO_E; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 564 | break; |
| 565 | } |
| 566 | } |
| 567 | |
| 568 | #ifdef IDE_PMAC_DEBUG |
| 569 | printk(KERN_ERR "%s: Set PIO timing for mode %d, reg: 0x%08x\n", |
| 570 | drive->name, pio, *timings); |
| 571 | #endif |
| 572 | |
Benjamin Herrenschmidt | 0b46ff2 | 2007-10-13 17:47:50 +0200 | [diff] [blame] | 573 | *timings = t; |
Bartlomiej Zolnierkiewicz | c15d5d4 | 2007-10-11 23:54:01 +0200 | [diff] [blame] | 574 | pmac_ide_do_update_timings(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 575 | } |
| 576 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 577 | /* |
| 578 | * Calculate KeyLargo ATA/66 UDMA timings |
| 579 | */ |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 580 | static int |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | set_timings_udma_ata4(u32 *timings, u8 speed) |
| 582 | { |
| 583 | unsigned rdyToPauseTicks, wrDataSetupTicks, addrTicks; |
| 584 | |
| 585 | if (speed > XFER_UDMA_4) |
| 586 | return 1; |
| 587 | |
| 588 | rdyToPauseTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].rdy2pause); |
| 589 | wrDataSetupTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].wrDataSetup); |
| 590 | addrTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].addrSetup); |
| 591 | |
| 592 | *timings = ((*timings) & ~(TR_66_UDMA_MASK | TR_66_MDMA_MASK)) | |
| 593 | (wrDataSetupTicks << TR_66_UDMA_WRDATASETUP_SHIFT) | |
| 594 | (rdyToPauseTicks << TR_66_UDMA_RDY2PAUS_SHIFT) | |
| 595 | (addrTicks <<TR_66_UDMA_ADDRSETUP_SHIFT) | |
| 596 | TR_66_UDMA_EN; |
| 597 | #ifdef IDE_PMAC_DEBUG |
| 598 | printk(KERN_ERR "ide_pmac: Set UDMA timing for mode %d, reg: 0x%08x\n", |
| 599 | speed & 0xf, *timings); |
| 600 | #endif |
| 601 | |
| 602 | return 0; |
| 603 | } |
| 604 | |
| 605 | /* |
| 606 | * Calculate Kauai ATA/100 UDMA timings |
| 607 | */ |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 608 | static int |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed) |
| 610 | { |
| 611 | struct ide_timing *t = ide_timing_find_mode(speed); |
| 612 | u32 tr; |
| 613 | |
| 614 | if (speed > XFER_UDMA_5 || t == NULL) |
| 615 | return 1; |
| 616 | tr = kauai_lookup_timing(kauai_udma_timings, (int)t->udma); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | *ultra_timings = ((*ultra_timings) & ~TR_100_UDMAREG_UDMA_MASK) | tr; |
| 618 | *ultra_timings = (*ultra_timings) | TR_100_UDMAREG_UDMA_EN; |
| 619 | |
| 620 | return 0; |
| 621 | } |
| 622 | |
| 623 | /* |
| 624 | * Calculate Shasta ATA/133 UDMA timings |
| 625 | */ |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 626 | static int |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed) |
| 628 | { |
| 629 | struct ide_timing *t = ide_timing_find_mode(speed); |
| 630 | u32 tr; |
| 631 | |
| 632 | if (speed > XFER_UDMA_6 || t == NULL) |
| 633 | return 1; |
| 634 | tr = kauai_lookup_timing(shasta_udma133_timings, (int)t->udma); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | *ultra_timings = ((*ultra_timings) & ~TR_133_UDMAREG_UDMA_MASK) | tr; |
| 636 | *ultra_timings = (*ultra_timings) | TR_133_UDMAREG_UDMA_EN; |
| 637 | |
| 638 | return 0; |
| 639 | } |
| 640 | |
| 641 | /* |
| 642 | * Calculate MDMA timings for all cells |
| 643 | */ |
Bartlomiej Zolnierkiewicz | 90f72ec | 2007-10-13 17:47:48 +0200 | [diff] [blame] | 644 | static void |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 645 | set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2, |
Bartlomiej Zolnierkiewicz | 90f72ec | 2007-10-13 17:47:48 +0200 | [diff] [blame] | 646 | u8 speed) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 647 | { |
Bartlomiej Zolnierkiewicz | 4dde449 | 2008-10-10 22:39:19 +0200 | [diff] [blame] | 648 | u16 *id = drive->id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 649 | int cycleTime, accessTime = 0, recTime = 0; |
| 650 | unsigned accessTicks, recTicks; |
| 651 | struct mdma_timings_t* tm = NULL; |
| 652 | int i; |
| 653 | |
| 654 | /* Get default cycle time for mode */ |
| 655 | switch(speed & 0xf) { |
| 656 | case 0: cycleTime = 480; break; |
| 657 | case 1: cycleTime = 150; break; |
| 658 | case 2: cycleTime = 120; break; |
| 659 | default: |
Bartlomiej Zolnierkiewicz | 90f72ec | 2007-10-13 17:47:48 +0200 | [diff] [blame] | 660 | BUG(); |
| 661 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | } |
Bartlomiej Zolnierkiewicz | 90f72ec | 2007-10-13 17:47:48 +0200 | [diff] [blame] | 663 | |
| 664 | /* Check if drive provides explicit DMA cycle time */ |
Bartlomiej Zolnierkiewicz | 4dde449 | 2008-10-10 22:39:19 +0200 | [diff] [blame] | 665 | if ((id[ATA_ID_FIELD_VALID] & 2) && id[ATA_ID_EIDE_DMA_TIME]) |
| 666 | cycleTime = max_t(int, id[ATA_ID_EIDE_DMA_TIME], cycleTime); |
Bartlomiej Zolnierkiewicz | 90f72ec | 2007-10-13 17:47:48 +0200 | [diff] [blame] | 667 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 668 | /* OHare limits according to some old Apple sources */ |
| 669 | if ((intf_type == controller_ohare) && (cycleTime < 150)) |
| 670 | cycleTime = 150; |
| 671 | /* Get the proper timing array for this controller */ |
| 672 | switch(intf_type) { |
| 673 | case controller_sh_ata6: |
| 674 | case controller_un_ata6: |
| 675 | case controller_k2_ata6: |
| 676 | break; |
| 677 | case controller_kl_ata4: |
| 678 | tm = mdma_timings_66; |
| 679 | break; |
| 680 | case controller_kl_ata3: |
| 681 | tm = mdma_timings_33k; |
| 682 | break; |
| 683 | default: |
| 684 | tm = mdma_timings_33; |
| 685 | break; |
| 686 | } |
| 687 | if (tm != NULL) { |
| 688 | /* Lookup matching access & recovery times */ |
| 689 | i = -1; |
| 690 | for (;;) { |
| 691 | if (tm[i+1].cycleTime < cycleTime) |
| 692 | break; |
| 693 | i++; |
| 694 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 695 | cycleTime = tm[i].cycleTime; |
| 696 | accessTime = tm[i].accessTime; |
| 697 | recTime = tm[i].recoveryTime; |
| 698 | |
| 699 | #ifdef IDE_PMAC_DEBUG |
| 700 | printk(KERN_ERR "%s: MDMA, cycleTime: %d, accessTime: %d, recTime: %d\n", |
| 701 | drive->name, cycleTime, accessTime, recTime); |
| 702 | #endif |
| 703 | } |
| 704 | switch(intf_type) { |
| 705 | case controller_sh_ata6: { |
| 706 | /* 133Mhz cell */ |
| 707 | u32 tr = kauai_lookup_timing(shasta_mdma_timings, cycleTime); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | *timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr; |
| 709 | *timings2 = (*timings2) & ~TR_133_UDMAREG_UDMA_EN; |
| 710 | } |
| 711 | case controller_un_ata6: |
| 712 | case controller_k2_ata6: { |
| 713 | /* 100Mhz cell */ |
| 714 | u32 tr = kauai_lookup_timing(kauai_mdma_timings, cycleTime); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 715 | *timings = ((*timings) & ~TR_100_PIOREG_MDMA_MASK) | tr; |
| 716 | *timings2 = (*timings2) & ~TR_100_UDMAREG_UDMA_EN; |
| 717 | } |
| 718 | break; |
| 719 | case controller_kl_ata4: |
| 720 | /* 66Mhz cell */ |
| 721 | accessTicks = SYSCLK_TICKS_66(accessTime); |
| 722 | accessTicks = min(accessTicks, 0x1fU); |
| 723 | accessTicks = max(accessTicks, 0x1U); |
| 724 | recTicks = SYSCLK_TICKS_66(recTime); |
| 725 | recTicks = min(recTicks, 0x1fU); |
| 726 | recTicks = max(recTicks, 0x3U); |
| 727 | /* Clear out mdma bits and disable udma */ |
| 728 | *timings = ((*timings) & ~(TR_66_MDMA_MASK | TR_66_UDMA_MASK)) | |
| 729 | (accessTicks << TR_66_MDMA_ACCESS_SHIFT) | |
| 730 | (recTicks << TR_66_MDMA_RECOVERY_SHIFT); |
| 731 | break; |
| 732 | case controller_kl_ata3: |
| 733 | /* 33Mhz cell on KeyLargo */ |
| 734 | accessTicks = SYSCLK_TICKS(accessTime); |
| 735 | accessTicks = max(accessTicks, 1U); |
| 736 | accessTicks = min(accessTicks, 0x1fU); |
| 737 | accessTime = accessTicks * IDE_SYSCLK_NS; |
| 738 | recTicks = SYSCLK_TICKS(recTime); |
| 739 | recTicks = max(recTicks, 1U); |
| 740 | recTicks = min(recTicks, 0x1fU); |
| 741 | *timings = ((*timings) & ~TR_33_MDMA_MASK) | |
| 742 | (accessTicks << TR_33_MDMA_ACCESS_SHIFT) | |
| 743 | (recTicks << TR_33_MDMA_RECOVERY_SHIFT); |
| 744 | break; |
| 745 | default: { |
| 746 | /* 33Mhz cell on others */ |
| 747 | int halfTick = 0; |
| 748 | int origAccessTime = accessTime; |
| 749 | int origRecTime = recTime; |
| 750 | |
| 751 | accessTicks = SYSCLK_TICKS(accessTime); |
| 752 | accessTicks = max(accessTicks, 1U); |
| 753 | accessTicks = min(accessTicks, 0x1fU); |
| 754 | accessTime = accessTicks * IDE_SYSCLK_NS; |
| 755 | recTicks = SYSCLK_TICKS(recTime); |
| 756 | recTicks = max(recTicks, 2U) - 1; |
| 757 | recTicks = min(recTicks, 0x1fU); |
| 758 | recTime = (recTicks + 1) * IDE_SYSCLK_NS; |
| 759 | if ((accessTicks > 1) && |
| 760 | ((accessTime - IDE_SYSCLK_NS/2) >= origAccessTime) && |
| 761 | ((recTime - IDE_SYSCLK_NS/2) >= origRecTime)) { |
| 762 | halfTick = 1; |
| 763 | accessTicks--; |
| 764 | } |
| 765 | *timings = ((*timings) & ~TR_33_MDMA_MASK) | |
| 766 | (accessTicks << TR_33_MDMA_ACCESS_SHIFT) | |
| 767 | (recTicks << TR_33_MDMA_RECOVERY_SHIFT); |
| 768 | if (halfTick) |
| 769 | *timings |= TR_33_MDMA_HALFTICK; |
| 770 | } |
| 771 | } |
| 772 | #ifdef IDE_PMAC_DEBUG |
| 773 | printk(KERN_ERR "%s: Set MDMA timing for mode %d, reg: 0x%08x\n", |
| 774 | drive->name, speed & 0xf, *timings); |
| 775 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 776 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 777 | |
Bartlomiej Zolnierkiewicz | 8776168 | 2010-01-19 01:45:29 -0800 | [diff] [blame] | 778 | static void pmac_ide_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 779 | { |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 780 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 781 | int ret = 0; |
Bartlomiej Zolnierkiewicz | 085798b | 2007-10-13 17:47:48 +0200 | [diff] [blame] | 782 | u32 *timings, *timings2, tl[2]; |
Bartlomiej Zolnierkiewicz | 123995b | 2008-10-13 21:39:40 +0200 | [diff] [blame] | 783 | u8 unit = drive->dn & 1; |
Bartlomiej Zolnierkiewicz | 8776168 | 2010-01-19 01:45:29 -0800 | [diff] [blame] | 784 | const u8 speed = drive->dma_mode; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 785 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 786 | timings = &pmif->timings[unit]; |
| 787 | timings2 = &pmif->timings[unit+2]; |
Bartlomiej Zolnierkiewicz | 085798b | 2007-10-13 17:47:48 +0200 | [diff] [blame] | 788 | |
| 789 | /* Copy timings to local image */ |
| 790 | tl[0] = *timings; |
| 791 | tl[1] = *timings2; |
| 792 | |
Bartlomiej Zolnierkiewicz | 4db90a1 | 2008-01-25 22:17:18 +0100 | [diff] [blame] | 793 | if (speed >= XFER_UDMA_0) { |
| 794 | if (pmif->kind == controller_kl_ata4) |
| 795 | ret = set_timings_udma_ata4(&tl[0], speed); |
| 796 | else if (pmif->kind == controller_un_ata6 |
| 797 | || pmif->kind == controller_k2_ata6) |
| 798 | ret = set_timings_udma_ata6(&tl[0], &tl[1], speed); |
| 799 | else if (pmif->kind == controller_sh_ata6) |
| 800 | ret = set_timings_udma_shasta(&tl[0], &tl[1], speed); |
| 801 | else |
| 802 | ret = -1; |
| 803 | } else |
| 804 | set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed); |
Bartlomiej Zolnierkiewicz | 5384657 | 2008-12-08 17:52:05 +0100 | [diff] [blame] | 805 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 806 | if (ret) |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame] | 807 | return; |
Bartlomiej Zolnierkiewicz | 085798b | 2007-10-13 17:47:48 +0200 | [diff] [blame] | 808 | |
| 809 | /* Apply timings to controller */ |
| 810 | *timings = tl[0]; |
| 811 | *timings2 = tl[1]; |
| 812 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 813 | pmac_ide_do_update_timings(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 814 | } |
| 815 | |
| 816 | /* |
| 817 | * Blast some well known "safe" values to the timing registers at init or |
| 818 | * wakeup from sleep time, before we do real calculation |
| 819 | */ |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 820 | static void |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 821 | sanitize_timings(pmac_ide_hwif_t *pmif) |
| 822 | { |
| 823 | unsigned int value, value2 = 0; |
| 824 | |
| 825 | switch(pmif->kind) { |
| 826 | case controller_sh_ata6: |
| 827 | value = 0x0a820c97; |
| 828 | value2 = 0x00033031; |
| 829 | break; |
| 830 | case controller_un_ata6: |
| 831 | case controller_k2_ata6: |
| 832 | value = 0x08618a92; |
| 833 | value2 = 0x00002921; |
| 834 | break; |
| 835 | case controller_kl_ata4: |
| 836 | value = 0x0008438c; |
| 837 | break; |
| 838 | case controller_kl_ata3: |
| 839 | value = 0x00084526; |
| 840 | break; |
| 841 | case controller_heathrow: |
| 842 | case controller_ohare: |
| 843 | default: |
| 844 | value = 0x00074526; |
| 845 | break; |
| 846 | } |
| 847 | pmif->timings[0] = pmif->timings[1] = value; |
| 848 | pmif->timings[2] = pmif->timings[3] = value2; |
| 849 | } |
| 850 | |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 851 | static int on_media_bay(pmac_ide_hwif_t *pmif) |
| 852 | { |
| 853 | return pmif->mdev && pmif->mdev->media_bay != NULL; |
| 854 | } |
| 855 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 856 | /* Suspend call back, should be called after the child devices |
| 857 | * have actually been suspended |
| 858 | */ |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 859 | static int pmac_ide_do_suspend(pmac_ide_hwif_t *pmif) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 860 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 861 | /* We clear the timings */ |
| 862 | pmif->timings[0] = 0; |
| 863 | pmif->timings[1] = 0; |
| 864 | |
Benjamin Herrenschmidt | 616299a | 2005-05-01 08:58:41 -0700 | [diff] [blame] | 865 | disable_irq(pmif->irq); |
| 866 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 867 | /* The media bay will handle itself just fine */ |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 868 | if (on_media_bay(pmif)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 869 | return 0; |
| 870 | |
| 871 | /* Kauai has bus control FCRs directly here */ |
| 872 | if (pmif->kauai_fcr) { |
| 873 | u32 fcr = readl(pmif->kauai_fcr); |
| 874 | fcr &= ~(KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE); |
| 875 | writel(fcr, pmif->kauai_fcr); |
| 876 | } |
| 877 | |
| 878 | /* Disable the bus on older machines and the cell on kauai */ |
| 879 | ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, pmif->node, pmif->aapl_bus_id, |
| 880 | 0); |
| 881 | |
| 882 | return 0; |
| 883 | } |
| 884 | |
| 885 | /* Resume call back, should be called before the child devices |
| 886 | * are resumed |
| 887 | */ |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 888 | static int pmac_ide_do_resume(pmac_ide_hwif_t *pmif) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 889 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 890 | /* Hard reset & re-enable controller (do we really need to reset ? -BenH) */ |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 891 | if (!on_media_bay(pmif)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 892 | ppc_md.feature_call(PMAC_FTR_IDE_RESET, pmif->node, pmif->aapl_bus_id, 1); |
| 893 | ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, pmif->node, pmif->aapl_bus_id, 1); |
| 894 | msleep(10); |
| 895 | ppc_md.feature_call(PMAC_FTR_IDE_RESET, pmif->node, pmif->aapl_bus_id, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 896 | |
| 897 | /* Kauai has it different */ |
| 898 | if (pmif->kauai_fcr) { |
| 899 | u32 fcr = readl(pmif->kauai_fcr); |
| 900 | fcr |= KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE; |
| 901 | writel(fcr, pmif->kauai_fcr); |
| 902 | } |
Benjamin Herrenschmidt | 616299a | 2005-05-01 08:58:41 -0700 | [diff] [blame] | 903 | |
| 904 | msleep(jiffies_to_msecs(IDE_WAKEUP_DELAY)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 905 | } |
| 906 | |
| 907 | /* Sanitize drive timings */ |
| 908 | sanitize_timings(pmif); |
| 909 | |
Benjamin Herrenschmidt | 616299a | 2005-05-01 08:58:41 -0700 | [diff] [blame] | 910 | enable_irq(pmif->irq); |
| 911 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 912 | return 0; |
| 913 | } |
| 914 | |
Bartlomiej Zolnierkiewicz | 07a6c66 | 2008-06-15 21:00:23 +0200 | [diff] [blame] | 915 | static u8 pmac_ide_cable_detect(ide_hwif_t *hwif) |
| 916 | { |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 917 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Bartlomiej Zolnierkiewicz | 07a6c66 | 2008-06-15 21:00:23 +0200 | [diff] [blame] | 918 | struct device_node *np = pmif->node; |
| 919 | const char *cable = of_get_property(np, "cable-type", NULL); |
TOMARI Hisanobu | a9d5a97 | 2009-03-31 20:15:34 +0200 | [diff] [blame] | 920 | struct device_node *root = of_find_node_by_path("/"); |
| 921 | const char *model = of_get_property(root, "model", NULL); |
Bartlomiej Zolnierkiewicz | 07a6c66 | 2008-06-15 21:00:23 +0200 | [diff] [blame] | 922 | |
| 923 | /* Get cable type from device-tree. */ |
TOMARI Hisanobu | a9d5a97 | 2009-03-31 20:15:34 +0200 | [diff] [blame] | 924 | if (cable && !strncmp(cable, "80-", 3)) { |
| 925 | /* Some drives fail to detect 80c cable in PowerBook */ |
| 926 | /* These machine use proprietary short IDE cable anyway */ |
| 927 | if (!strncmp(model, "PowerBook", 9)) |
| 928 | return ATA_CBL_PATA40_SHORT; |
| 929 | else |
| 930 | return ATA_CBL_PATA80; |
| 931 | } |
Bartlomiej Zolnierkiewicz | 07a6c66 | 2008-06-15 21:00:23 +0200 | [diff] [blame] | 932 | |
| 933 | /* |
| 934 | * G5's seem to have incorrect cable type in device-tree. |
| 935 | * Let's assume they have a 80 conductor cable, this seem |
| 936 | * to be always the case unless the user mucked around. |
| 937 | */ |
| 938 | if (of_device_is_compatible(np, "K2-UATA") || |
| 939 | of_device_is_compatible(np, "shasta-ata")) |
| 940 | return ATA_CBL_PATA80; |
| 941 | |
| 942 | return ATA_CBL_PATA40; |
| 943 | } |
| 944 | |
Bartlomiej Zolnierkiewicz | 07eb106 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 945 | static void pmac_ide_init_dev(ide_drive_t *drive) |
| 946 | { |
| 947 | ide_hwif_t *hwif = drive->hwif; |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 948 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Bartlomiej Zolnierkiewicz | 07eb106 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 949 | |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 950 | if (on_media_bay(pmif)) { |
| 951 | if (check_media_bay(pmif->mdev->media_bay) == MB_CD) { |
Bartlomiej Zolnierkiewicz | 97100fc | 2008-10-13 21:39:36 +0200 | [diff] [blame] | 952 | drive->dev_flags &= ~IDE_DFLAG_NOPROBE; |
Bartlomiej Zolnierkiewicz | 07eb106 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 953 | return; |
| 954 | } |
Bartlomiej Zolnierkiewicz | 97100fc | 2008-10-13 21:39:36 +0200 | [diff] [blame] | 955 | drive->dev_flags |= IDE_DFLAG_NOPROBE; |
Bartlomiej Zolnierkiewicz | 07eb106 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 956 | } |
| 957 | } |
| 958 | |
Bartlomiej Zolnierkiewicz | 374e042 | 2008-07-23 19:55:56 +0200 | [diff] [blame] | 959 | static const struct ide_tp_ops pmac_tp_ops = { |
| 960 | .exec_command = pmac_exec_command, |
| 961 | .read_status = ide_read_status, |
| 962 | .read_altstatus = ide_read_altstatus, |
Sergei Shtylyov | ecf3a31 | 2009-03-31 20:15:30 +0200 | [diff] [blame] | 963 | .write_devctl = pmac_write_devctl, |
Bartlomiej Zolnierkiewicz | 374e042 | 2008-07-23 19:55:56 +0200 | [diff] [blame] | 964 | |
Sergei Shtylyov | abb596b | 2009-03-31 20:15:32 +0200 | [diff] [blame] | 965 | .dev_select = pmac_dev_select, |
Bartlomiej Zolnierkiewicz | 374e042 | 2008-07-23 19:55:56 +0200 | [diff] [blame] | 966 | .tf_load = ide_tf_load, |
| 967 | .tf_read = ide_tf_read, |
| 968 | |
| 969 | .input_data = ide_input_data, |
| 970 | .output_data = ide_output_data, |
| 971 | }; |
| 972 | |
Sergei Shtylyov | abb596b | 2009-03-31 20:15:32 +0200 | [diff] [blame] | 973 | static const struct ide_tp_ops pmac_ata6_tp_ops = { |
| 974 | .exec_command = pmac_exec_command, |
| 975 | .read_status = ide_read_status, |
| 976 | .read_altstatus = ide_read_altstatus, |
| 977 | .write_devctl = pmac_write_devctl, |
| 978 | |
| 979 | .dev_select = pmac_kauai_dev_select, |
| 980 | .tf_load = ide_tf_load, |
| 981 | .tf_read = ide_tf_read, |
| 982 | |
| 983 | .input_data = ide_input_data, |
| 984 | .output_data = ide_output_data, |
Bartlomiej Zolnierkiewicz | 07a6c66 | 2008-06-15 21:00:23 +0200 | [diff] [blame] | 985 | }; |
| 986 | |
| 987 | static const struct ide_port_ops pmac_ide_ata4_port_ops = { |
Bartlomiej Zolnierkiewicz | 07eb106 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 988 | .init_dev = pmac_ide_init_dev, |
Bartlomiej Zolnierkiewicz | 07a6c66 | 2008-06-15 21:00:23 +0200 | [diff] [blame] | 989 | .set_pio_mode = pmac_ide_set_pio_mode, |
| 990 | .set_dma_mode = pmac_ide_set_dma_mode, |
Bartlomiej Zolnierkiewicz | 07a6c66 | 2008-06-15 21:00:23 +0200 | [diff] [blame] | 991 | .cable_detect = pmac_ide_cable_detect, |
Bartlomiej Zolnierkiewicz | ac95bee | 2008-04-26 22:25:14 +0200 | [diff] [blame] | 992 | }; |
| 993 | |
| 994 | static const struct ide_port_ops pmac_ide_port_ops = { |
Bartlomiej Zolnierkiewicz | 07eb106 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 995 | .init_dev = pmac_ide_init_dev, |
Bartlomiej Zolnierkiewicz | ac95bee | 2008-04-26 22:25:14 +0200 | [diff] [blame] | 996 | .set_pio_mode = pmac_ide_set_pio_mode, |
| 997 | .set_dma_mode = pmac_ide_set_dma_mode, |
Bartlomiej Zolnierkiewicz | ac95bee | 2008-04-26 22:25:14 +0200 | [diff] [blame] | 998 | }; |
| 999 | |
Bartlomiej Zolnierkiewicz | f37afda | 2008-04-26 22:25:24 +0200 | [diff] [blame] | 1000 | static const struct ide_dma_ops pmac_dma_ops; |
Bartlomiej Zolnierkiewicz | 5e37bdc | 2008-04-26 22:25:24 +0200 | [diff] [blame] | 1001 | |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1002 | static const struct ide_port_info pmac_port_info = { |
Bartlomiej Zolnierkiewicz | b36ba53 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 1003 | .name = DRV_NAME, |
Bartlomiej Zolnierkiewicz | 0d07192 | 2008-04-26 22:25:22 +0200 | [diff] [blame] | 1004 | .init_dma = pmac_ide_init_dma, |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1005 | .chipset = ide_pmac, |
Bartlomiej Zolnierkiewicz | 374e042 | 2008-07-23 19:55:56 +0200 | [diff] [blame] | 1006 | .tp_ops = &pmac_tp_ops, |
| 1007 | .port_ops = &pmac_ide_port_ops, |
Bartlomiej Zolnierkiewicz | 5e37bdc | 2008-04-26 22:25:24 +0200 | [diff] [blame] | 1008 | .dma_ops = &pmac_dma_ops, |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1009 | .host_flags = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA | |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1010 | IDE_HFLAG_POST_SET_MODE | |
Bartlomiej Zolnierkiewicz | c5dd43e | 2008-04-28 23:44:37 +0200 | [diff] [blame] | 1011 | IDE_HFLAG_MMIO | |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1012 | IDE_HFLAG_UNMASK_IRQS, |
| 1013 | .pio_mask = ATA_PIO4, |
| 1014 | .mwdma_mask = ATA_MWDMA2, |
| 1015 | }; |
| 1016 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1017 | /* |
| 1018 | * Setup, register & probe an IDE channel driven by this driver, this is |
Bartlomiej Zolnierkiewicz | 5b16464 | 2008-06-15 21:00:23 +0200 | [diff] [blame] | 1019 | * called by one of the 2 probe functions (macio or PCI). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1020 | */ |
Greg Kroah-Hartman | fe31edc | 2012-12-21 13:21:03 -0800 | [diff] [blame] | 1021 | static int pmac_ide_setup_device(pmac_ide_hwif_t *pmif, struct ide_hw *hw) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1022 | { |
| 1023 | struct device_node *np = pmif->node; |
Jeremy Kerr | 018a3d1 | 2006-07-12 15:40:29 +1000 | [diff] [blame] | 1024 | const int *bidp; |
Bartlomiej Zolnierkiewicz | 48c3c10 | 2008-07-23 19:55:57 +0200 | [diff] [blame] | 1025 | struct ide_host *host; |
Bartlomiej Zolnierkiewicz | b36ba53 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 1026 | ide_hwif_t *hwif; |
Bartlomiej Zolnierkiewicz | 9f36d31 | 2009-05-17 19:12:25 +0200 | [diff] [blame] | 1027 | struct ide_hw *hws[] = { hw }; |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1028 | struct ide_port_info d = pmac_port_info; |
Bartlomiej Zolnierkiewicz | 6f904d0 | 2008-07-23 19:55:57 +0200 | [diff] [blame] | 1029 | int rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1030 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1031 | pmif->broken_dma = pmif->broken_dma_warn = 0; |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1032 | if (of_device_is_compatible(np, "shasta-ata")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1033 | pmif->kind = controller_sh_ata6; |
Sergei Shtylyov | abb596b | 2009-03-31 20:15:32 +0200 | [diff] [blame] | 1034 | d.tp_ops = &pmac_ata6_tp_ops; |
| 1035 | d.port_ops = &pmac_ide_ata4_port_ops; |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1036 | d.udma_mask = ATA_UDMA6; |
| 1037 | } else if (of_device_is_compatible(np, "kauai-ata")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1038 | pmif->kind = controller_un_ata6; |
Sergei Shtylyov | abb596b | 2009-03-31 20:15:32 +0200 | [diff] [blame] | 1039 | d.tp_ops = &pmac_ata6_tp_ops; |
| 1040 | d.port_ops = &pmac_ide_ata4_port_ops; |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1041 | d.udma_mask = ATA_UDMA5; |
| 1042 | } else if (of_device_is_compatible(np, "K2-UATA")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1043 | pmif->kind = controller_k2_ata6; |
Sergei Shtylyov | abb596b | 2009-03-31 20:15:32 +0200 | [diff] [blame] | 1044 | d.tp_ops = &pmac_ata6_tp_ops; |
| 1045 | d.port_ops = &pmac_ide_ata4_port_ops; |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1046 | d.udma_mask = ATA_UDMA5; |
| 1047 | } else if (of_device_is_compatible(np, "keylargo-ata")) { |
| 1048 | if (strcmp(np->name, "ata-4") == 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1049 | pmif->kind = controller_kl_ata4; |
Bartlomiej Zolnierkiewicz | 07a6c66 | 2008-06-15 21:00:23 +0200 | [diff] [blame] | 1050 | d.port_ops = &pmac_ide_ata4_port_ops; |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1051 | d.udma_mask = ATA_UDMA4; |
| 1052 | } else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1053 | pmif->kind = controller_kl_ata3; |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1054 | } else if (of_device_is_compatible(np, "heathrow-ata")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1055 | pmif->kind = controller_heathrow; |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1056 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1057 | pmif->kind = controller_ohare; |
| 1058 | pmif->broken_dma = 1; |
| 1059 | } |
| 1060 | |
Stephen Rothwell | 40cd3a4 | 2007-05-01 13:54:02 +1000 | [diff] [blame] | 1061 | bidp = of_get_property(np, "AAPL,bus-id", NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1062 | pmif->aapl_bus_id = bidp ? *bidp : 0; |
| 1063 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1064 | /* On Kauai-type controllers, we make sure the FCR is correct */ |
| 1065 | if (pmif->kauai_fcr) |
| 1066 | writel(KAUAI_FCR_UATA_MAGIC | |
| 1067 | KAUAI_FCR_UATA_RESET_N | |
| 1068 | KAUAI_FCR_UATA_ENABLE, pmif->kauai_fcr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1069 | |
| 1070 | /* Make sure we have sane timings */ |
| 1071 | sanitize_timings(pmif); |
| 1072 | |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 1073 | /* If we are on a media bay, wait for it to settle and lock it */ |
| 1074 | if (pmif->mdev) |
| 1075 | lock_media_bay(pmif->mdev->media_bay); |
Benjamin Herrenschmidt | 9842727 | 2008-07-28 11:29:56 +1000 | [diff] [blame] | 1076 | |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 1077 | host = ide_host_alloc(&d, hws, 1); |
| 1078 | if (host == NULL) { |
| 1079 | rc = -ENOMEM; |
| 1080 | goto bail; |
| 1081 | } |
| 1082 | hwif = pmif->hwif = host->ports[0]; |
| 1083 | |
| 1084 | if (on_media_bay(pmif)) { |
| 1085 | /* Fixup bus ID for media bay */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1086 | if (!bidp) |
| 1087 | pmif->aapl_bus_id = 1; |
| 1088 | } else if (pmif->kind == controller_ohare) { |
| 1089 | /* The code below is having trouble on some ohare machines |
| 1090 | * (timing related ?). Until I can put my hand on one of these |
| 1091 | * units, I keep the old way |
| 1092 | */ |
| 1093 | ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, 0, 1); |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 1094 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1095 | /* This is necessary to enable IDE when net-booting */ |
| 1096 | ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 1); |
| 1097 | ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, pmif->aapl_bus_id, 1); |
| 1098 | msleep(10); |
| 1099 | ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 0); |
| 1100 | msleep(jiffies_to_msecs(IDE_WAKEUP_DELAY)); |
| 1101 | } |
| 1102 | |
Bartlomiej Zolnierkiewicz | b36ba53 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 1103 | printk(KERN_INFO DRV_NAME ": Found Apple %s controller (%s), " |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 1104 | "bus ID %d%s, irq %d\n", model_name[pmif->kind], |
| 1105 | pmif->mdev ? "macio" : "PCI", pmif->aapl_bus_id, |
| 1106 | on_media_bay(pmif) ? " (mediabay)" : "", hw->irq); |
Bartlomiej Zolnierkiewicz | b36ba53 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 1107 | |
Benjamin Herrenschmidt | 9842727 | 2008-07-28 11:29:56 +1000 | [diff] [blame] | 1108 | rc = ide_host_register(host, &d, hws); |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 1109 | if (rc) |
| 1110 | pmif->hwif = NULL; |
Bartlomiej Zolnierkiewicz | 5cbf79c | 2007-05-10 00:01:11 +0200 | [diff] [blame] | 1111 | |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 1112 | if (pmif->mdev) |
| 1113 | unlock_media_bay(pmif->mdev->media_bay); |
| 1114 | |
| 1115 | bail: |
| 1116 | if (rc && host) |
| 1117 | ide_host_free(host); |
| 1118 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1119 | } |
| 1120 | |
Greg Kroah-Hartman | fe31edc | 2012-12-21 13:21:03 -0800 | [diff] [blame] | 1121 | static void pmac_ide_init_ports(struct ide_hw *hw, unsigned long base) |
Bartlomiej Zolnierkiewicz | 5c58666 | 2008-04-18 00:46:29 +0200 | [diff] [blame] | 1122 | { |
| 1123 | int i; |
| 1124 | |
| 1125 | for (i = 0; i < 8; ++i) |
Bartlomiej Zolnierkiewicz | 4c3032d | 2008-04-27 15:38:32 +0200 | [diff] [blame] | 1126 | hw->io_ports_array[i] = base + i * 0x10; |
| 1127 | |
| 1128 | hw->io_ports.ctl_addr = base + 0x160; |
Bartlomiej Zolnierkiewicz | 5c58666 | 2008-04-18 00:46:29 +0200 | [diff] [blame] | 1129 | } |
| 1130 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1131 | /* |
| 1132 | * Attach to a macio probed interface |
| 1133 | */ |
Greg Kroah-Hartman | fe31edc | 2012-12-21 13:21:03 -0800 | [diff] [blame] | 1134 | static int pmac_ide_macio_attach(struct macio_dev *mdev, |
| 1135 | const struct of_device_id *match) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1136 | { |
| 1137 | void __iomem *base; |
| 1138 | unsigned long regbase; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1139 | pmac_ide_hwif_t *pmif; |
Bartlomiej Zolnierkiewicz | 939b0f1 | 2008-04-26 17:36:33 +0200 | [diff] [blame] | 1140 | int irq, rc; |
Bartlomiej Zolnierkiewicz | 9f36d31 | 2009-05-17 19:12:25 +0200 | [diff] [blame] | 1141 | struct ide_hw hw; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1142 | |
Bartlomiej Zolnierkiewicz | 5297a3e | 2008-04-26 17:36:32 +0200 | [diff] [blame] | 1143 | pmif = kzalloc(sizeof(*pmif), GFP_KERNEL); |
| 1144 | if (pmif == NULL) |
| 1145 | return -ENOMEM; |
| 1146 | |
Benjamin Herrenschmidt | cc5d018 | 2005-12-13 18:01:21 +1100 | [diff] [blame] | 1147 | if (macio_resource_count(mdev) == 0) { |
Bartlomiej Zolnierkiewicz | 939b0f1 | 2008-04-26 17:36:33 +0200 | [diff] [blame] | 1148 | printk(KERN_WARNING "ide-pmac: no address for %s\n", |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1149 | mdev->ofdev.dev.of_node->full_name); |
Bartlomiej Zolnierkiewicz | 5297a3e | 2008-04-26 17:36:32 +0200 | [diff] [blame] | 1150 | rc = -ENXIO; |
| 1151 | goto out_free_pmif; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1152 | } |
| 1153 | |
| 1154 | /* Request memory resource for IO ports */ |
| 1155 | if (macio_request_resource(mdev, 0, "ide-pmac (ports)")) { |
Bartlomiej Zolnierkiewicz | 939b0f1 | 2008-04-26 17:36:33 +0200 | [diff] [blame] | 1156 | printk(KERN_ERR "ide-pmac: can't request MMIO resource for " |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1157 | "%s!\n", mdev->ofdev.dev.of_node->full_name); |
Bartlomiej Zolnierkiewicz | 5297a3e | 2008-04-26 17:36:32 +0200 | [diff] [blame] | 1158 | rc = -EBUSY; |
| 1159 | goto out_free_pmif; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1160 | } |
| 1161 | |
| 1162 | /* XXX This is bogus. Should be fixed in the registry by checking |
| 1163 | * the kind of host interrupt controller, a bit like gatwick |
| 1164 | * fixes in irq.c. That works well enough for the single case |
| 1165 | * where that happens though... |
| 1166 | */ |
| 1167 | if (macio_irq_count(mdev) == 0) { |
Bartlomiej Zolnierkiewicz | 939b0f1 | 2008-04-26 17:36:33 +0200 | [diff] [blame] | 1168 | printk(KERN_WARNING "ide-pmac: no intrs for device %s, using " |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1169 | "13\n", mdev->ofdev.dev.of_node->full_name); |
Benjamin Herrenschmidt | 69917c2 | 2006-09-22 12:56:30 +1000 | [diff] [blame] | 1170 | irq = irq_create_mapping(NULL, 13); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1171 | } else |
| 1172 | irq = macio_irq(mdev, 0); |
| 1173 | |
| 1174 | base = ioremap(macio_resource_start(mdev, 0), 0x400); |
| 1175 | regbase = (unsigned long) base; |
| 1176 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1177 | pmif->mdev = mdev; |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1178 | pmif->node = mdev->ofdev.dev.of_node; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1179 | pmif->regbase = regbase; |
| 1180 | pmif->irq = irq; |
| 1181 | pmif->kauai_fcr = NULL; |
Bartlomiej Zolnierkiewicz | 5384657 | 2008-12-08 17:52:05 +0100 | [diff] [blame] | 1182 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1183 | if (macio_resource_count(mdev) >= 2) { |
| 1184 | if (macio_request_resource(mdev, 1, "ide-pmac (dma)")) |
Bartlomiej Zolnierkiewicz | 939b0f1 | 2008-04-26 17:36:33 +0200 | [diff] [blame] | 1185 | printk(KERN_WARNING "ide-pmac: can't request DMA " |
| 1186 | "resource for %s!\n", |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1187 | mdev->ofdev.dev.of_node->full_name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1188 | else |
| 1189 | pmif->dma_regs = ioremap(macio_resource_start(mdev, 1), 0x1000); |
| 1190 | } else |
| 1191 | pmif->dma_regs = NULL; |
Bartlomiej Zolnierkiewicz | 5384657 | 2008-12-08 17:52:05 +0100 | [diff] [blame] | 1192 | |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1193 | dev_set_drvdata(&mdev->ofdev.dev, pmif); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1194 | |
Bartlomiej Zolnierkiewicz | 57c802e | 2008-01-26 20:13:05 +0100 | [diff] [blame] | 1195 | memset(&hw, 0, sizeof(hw)); |
Bartlomiej Zolnierkiewicz | 5c58666 | 2008-04-18 00:46:29 +0200 | [diff] [blame] | 1196 | pmac_ide_init_ports(&hw, pmif->regbase); |
Bartlomiej Zolnierkiewicz | 57c802e | 2008-01-26 20:13:05 +0100 | [diff] [blame] | 1197 | hw.irq = irq; |
Bartlomiej Zolnierkiewicz | c56c564 | 2008-07-16 20:33:40 +0200 | [diff] [blame] | 1198 | hw.dev = &mdev->bus->pdev->dev; |
| 1199 | hw.parent = &mdev->ofdev.dev; |
Bartlomiej Zolnierkiewicz | 57c802e | 2008-01-26 20:13:05 +0100 | [diff] [blame] | 1200 | |
Bartlomiej Zolnierkiewicz | b36ba53 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 1201 | rc = pmac_ide_setup_device(pmif, &hw); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1202 | if (rc != 0) { |
| 1203 | /* The inteface is released to the common IDE layer */ |
| 1204 | dev_set_drvdata(&mdev->ofdev.dev, NULL); |
| 1205 | iounmap(base); |
Bartlomiej Zolnierkiewicz | ed908fa | 2008-02-01 23:09:32 +0100 | [diff] [blame] | 1206 | if (pmif->dma_regs) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1207 | iounmap(pmif->dma_regs); |
Bartlomiej Zolnierkiewicz | ed908fa | 2008-02-01 23:09:32 +0100 | [diff] [blame] | 1208 | macio_release_resource(mdev, 1); |
| 1209 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1210 | macio_release_resource(mdev, 0); |
Bartlomiej Zolnierkiewicz | 5297a3e | 2008-04-26 17:36:32 +0200 | [diff] [blame] | 1211 | kfree(pmif); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1212 | } |
| 1213 | |
| 1214 | return rc; |
Bartlomiej Zolnierkiewicz | 5297a3e | 2008-04-26 17:36:32 +0200 | [diff] [blame] | 1215 | |
| 1216 | out_free_pmif: |
| 1217 | kfree(pmif); |
| 1218 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1219 | } |
| 1220 | |
| 1221 | static int |
David Brownell | 8b4b8a2 | 2006-08-14 23:11:03 -0700 | [diff] [blame] | 1222 | pmac_ide_macio_suspend(struct macio_dev *mdev, pm_message_t mesg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1223 | { |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 1224 | pmac_ide_hwif_t *pmif = dev_get_drvdata(&mdev->ofdev.dev); |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1225 | int rc = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1226 | |
David Brownell | 8b4b8a2 | 2006-08-14 23:11:03 -0700 | [diff] [blame] | 1227 | if (mesg.event != mdev->ofdev.dev.power.power_state.event |
Rafael J. Wysocki | 3a2d5b7 | 2008-02-23 19:13:25 +0100 | [diff] [blame] | 1228 | && (mesg.event & PM_EVENT_SLEEP)) { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1229 | rc = pmac_ide_do_suspend(pmif); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1230 | if (rc == 0) |
David Brownell | 8b4b8a2 | 2006-08-14 23:11:03 -0700 | [diff] [blame] | 1231 | mdev->ofdev.dev.power.power_state = mesg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1232 | } |
| 1233 | |
| 1234 | return rc; |
| 1235 | } |
| 1236 | |
| 1237 | static int |
| 1238 | pmac_ide_macio_resume(struct macio_dev *mdev) |
| 1239 | { |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 1240 | pmac_ide_hwif_t *pmif = dev_get_drvdata(&mdev->ofdev.dev); |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1241 | int rc = 0; |
| 1242 | |
Pavel Machek | ca078ba | 2005-09-03 15:56:57 -0700 | [diff] [blame] | 1243 | if (mdev->ofdev.dev.power.power_state.event != PM_EVENT_ON) { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1244 | rc = pmac_ide_do_resume(pmif); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1245 | if (rc == 0) |
Pavel Machek | 829ca9a | 2005-09-03 15:56:56 -0700 | [diff] [blame] | 1246 | mdev->ofdev.dev.power.power_state = PMSG_ON; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1247 | } |
| 1248 | |
| 1249 | return rc; |
| 1250 | } |
| 1251 | |
| 1252 | /* |
| 1253 | * Attach to a PCI probed interface |
| 1254 | */ |
Greg Kroah-Hartman | fe31edc | 2012-12-21 13:21:03 -0800 | [diff] [blame] | 1255 | static int pmac_ide_pci_attach(struct pci_dev *pdev, |
| 1256 | const struct pci_device_id *id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1257 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1258 | struct device_node *np; |
| 1259 | pmac_ide_hwif_t *pmif; |
| 1260 | void __iomem *base; |
| 1261 | unsigned long rbase, rlen; |
Bartlomiej Zolnierkiewicz | 939b0f1 | 2008-04-26 17:36:33 +0200 | [diff] [blame] | 1262 | int rc; |
Bartlomiej Zolnierkiewicz | 9f36d31 | 2009-05-17 19:12:25 +0200 | [diff] [blame] | 1263 | struct ide_hw hw; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1264 | |
| 1265 | np = pci_device_to_OF_node(pdev); |
| 1266 | if (np == NULL) { |
| 1267 | printk(KERN_ERR "ide-pmac: cannot find MacIO node for Kauai ATA interface\n"); |
| 1268 | return -ENODEV; |
| 1269 | } |
Bartlomiej Zolnierkiewicz | 5297a3e | 2008-04-26 17:36:32 +0200 | [diff] [blame] | 1270 | |
| 1271 | pmif = kzalloc(sizeof(*pmif), GFP_KERNEL); |
| 1272 | if (pmif == NULL) |
| 1273 | return -ENOMEM; |
| 1274 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1275 | if (pci_enable_device(pdev)) { |
Bartlomiej Zolnierkiewicz | 939b0f1 | 2008-04-26 17:36:33 +0200 | [diff] [blame] | 1276 | printk(KERN_WARNING "ide-pmac: Can't enable PCI device for " |
| 1277 | "%s\n", np->full_name); |
Bartlomiej Zolnierkiewicz | 5297a3e | 2008-04-26 17:36:32 +0200 | [diff] [blame] | 1278 | rc = -ENXIO; |
| 1279 | goto out_free_pmif; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1280 | } |
| 1281 | pci_set_master(pdev); |
| 1282 | |
| 1283 | if (pci_request_regions(pdev, "Kauai ATA")) { |
Bartlomiej Zolnierkiewicz | 939b0f1 | 2008-04-26 17:36:33 +0200 | [diff] [blame] | 1284 | printk(KERN_ERR "ide-pmac: Cannot obtain PCI resources for " |
| 1285 | "%s\n", np->full_name); |
Bartlomiej Zolnierkiewicz | 5297a3e | 2008-04-26 17:36:32 +0200 | [diff] [blame] | 1286 | rc = -ENXIO; |
| 1287 | goto out_free_pmif; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1288 | } |
| 1289 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1290 | pmif->mdev = NULL; |
| 1291 | pmif->node = np; |
| 1292 | |
| 1293 | rbase = pci_resource_start(pdev, 0); |
| 1294 | rlen = pci_resource_len(pdev, 0); |
| 1295 | |
| 1296 | base = ioremap(rbase, rlen); |
| 1297 | pmif->regbase = (unsigned long) base + 0x2000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1298 | pmif->dma_regs = base + 0x1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1299 | pmif->kauai_fcr = base; |
| 1300 | pmif->irq = pdev->irq; |
| 1301 | |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1302 | pci_set_drvdata(pdev, pmif); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1303 | |
Bartlomiej Zolnierkiewicz | 57c802e | 2008-01-26 20:13:05 +0100 | [diff] [blame] | 1304 | memset(&hw, 0, sizeof(hw)); |
Bartlomiej Zolnierkiewicz | 5c58666 | 2008-04-18 00:46:29 +0200 | [diff] [blame] | 1305 | pmac_ide_init_ports(&hw, pmif->regbase); |
Bartlomiej Zolnierkiewicz | 57c802e | 2008-01-26 20:13:05 +0100 | [diff] [blame] | 1306 | hw.irq = pdev->irq; |
| 1307 | hw.dev = &pdev->dev; |
| 1308 | |
Bartlomiej Zolnierkiewicz | b36ba53 | 2008-07-23 19:55:49 +0200 | [diff] [blame] | 1309 | rc = pmac_ide_setup_device(pmif, &hw); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1310 | if (rc != 0) { |
| 1311 | /* The inteface is released to the common IDE layer */ |
| 1312 | pci_set_drvdata(pdev, NULL); |
| 1313 | iounmap(base); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1314 | pci_release_regions(pdev); |
Bartlomiej Zolnierkiewicz | 5297a3e | 2008-04-26 17:36:32 +0200 | [diff] [blame] | 1315 | kfree(pmif); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1316 | } |
| 1317 | |
| 1318 | return rc; |
Bartlomiej Zolnierkiewicz | 5297a3e | 2008-04-26 17:36:32 +0200 | [diff] [blame] | 1319 | |
| 1320 | out_free_pmif: |
| 1321 | kfree(pmif); |
| 1322 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1323 | } |
| 1324 | |
| 1325 | static int |
David Brownell | 8b4b8a2 | 2006-08-14 23:11:03 -0700 | [diff] [blame] | 1326 | pmac_ide_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1327 | { |
Joe Perches | f2ba70a | 2010-11-22 11:38:08 -0800 | [diff] [blame] | 1328 | pmac_ide_hwif_t *pmif = pci_get_drvdata(pdev); |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1329 | int rc = 0; |
| 1330 | |
David Brownell | 8b4b8a2 | 2006-08-14 23:11:03 -0700 | [diff] [blame] | 1331 | if (mesg.event != pdev->dev.power.power_state.event |
Rafael J. Wysocki | 3a2d5b7 | 2008-02-23 19:13:25 +0100 | [diff] [blame] | 1332 | && (mesg.event & PM_EVENT_SLEEP)) { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1333 | rc = pmac_ide_do_suspend(pmif); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1334 | if (rc == 0) |
David Brownell | 8b4b8a2 | 2006-08-14 23:11:03 -0700 | [diff] [blame] | 1335 | pdev->dev.power.power_state = mesg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1336 | } |
| 1337 | |
| 1338 | return rc; |
| 1339 | } |
| 1340 | |
| 1341 | static int |
| 1342 | pmac_ide_pci_resume(struct pci_dev *pdev) |
| 1343 | { |
Joe Perches | f2ba70a | 2010-11-22 11:38:08 -0800 | [diff] [blame] | 1344 | pmac_ide_hwif_t *pmif = pci_get_drvdata(pdev); |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1345 | int rc = 0; |
| 1346 | |
Pavel Machek | ca078ba | 2005-09-03 15:56:57 -0700 | [diff] [blame] | 1347 | if (pdev->dev.power.power_state.event != PM_EVENT_ON) { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1348 | rc = pmac_ide_do_resume(pmif); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1349 | if (rc == 0) |
Pavel Machek | 829ca9a | 2005-09-03 15:56:56 -0700 | [diff] [blame] | 1350 | pdev->dev.power.power_state = PMSG_ON; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1351 | } |
| 1352 | |
| 1353 | return rc; |
| 1354 | } |
| 1355 | |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 1356 | #ifdef CONFIG_PMAC_MEDIABAY |
| 1357 | static void pmac_ide_macio_mb_event(struct macio_dev* mdev, int mb_state) |
| 1358 | { |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 1359 | pmac_ide_hwif_t *pmif = dev_get_drvdata(&mdev->ofdev.dev); |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 1360 | |
| 1361 | switch(mb_state) { |
| 1362 | case MB_CD: |
| 1363 | if (!pmif->hwif->present) |
| 1364 | ide_port_scan(pmif->hwif); |
| 1365 | break; |
| 1366 | default: |
| 1367 | if (pmif->hwif->present) |
| 1368 | ide_port_unregister_devices(pmif->hwif); |
| 1369 | } |
| 1370 | } |
| 1371 | #endif /* CONFIG_PMAC_MEDIABAY */ |
| 1372 | |
| 1373 | |
Jeff Mahoney | 5e65577 | 2005-07-06 15:44:41 -0400 | [diff] [blame] | 1374 | static struct of_device_id pmac_ide_macio_match[] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1375 | { |
| 1376 | { |
| 1377 | .name = "IDE", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1378 | }, |
| 1379 | { |
| 1380 | .name = "ATA", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1381 | }, |
| 1382 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1383 | .type = "ide", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1384 | }, |
| 1385 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1386 | .type = "ata", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1387 | }, |
| 1388 | {}, |
| 1389 | }; |
| 1390 | |
| 1391 | static struct macio_driver pmac_ide_macio_driver = |
| 1392 | { |
Benjamin Herrenschmidt | c2cdf6a | 2010-06-02 17:09:18 +1000 | [diff] [blame] | 1393 | .driver = { |
| 1394 | .name = "ide-pmac", |
| 1395 | .owner = THIS_MODULE, |
| 1396 | .of_match_table = pmac_ide_macio_match, |
| 1397 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1398 | .probe = pmac_ide_macio_attach, |
| 1399 | .suspend = pmac_ide_macio_suspend, |
| 1400 | .resume = pmac_ide_macio_resume, |
Benjamin Herrenschmidt | d58b0c3 | 2009-12-01 14:36:28 +0000 | [diff] [blame] | 1401 | #ifdef CONFIG_PMAC_MEDIABAY |
| 1402 | .mediabay_event = pmac_ide_macio_mb_event, |
| 1403 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1404 | }; |
| 1405 | |
Bartlomiej Zolnierkiewicz | 9cbcc5e | 2007-10-16 22:29:56 +0200 | [diff] [blame] | 1406 | static const struct pci_device_id pmac_ide_pci_match[] = { |
| 1407 | { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_UNI_N_ATA), 0 }, |
| 1408 | { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID_ATA100), 0 }, |
| 1409 | { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_K2_ATA100), 0 }, |
| 1410 | { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_SH_ATA), 0 }, |
| 1411 | { PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID2_ATA), 0 }, |
Benjamin Herrenschmidt | 71e4eda | 2007-10-06 18:52:27 +1000 | [diff] [blame] | 1412 | {}, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1413 | }; |
| 1414 | |
| 1415 | static struct pci_driver pmac_ide_pci_driver = { |
| 1416 | .name = "ide-pmac", |
| 1417 | .id_table = pmac_ide_pci_match, |
| 1418 | .probe = pmac_ide_pci_attach, |
| 1419 | .suspend = pmac_ide_pci_suspend, |
| 1420 | .resume = pmac_ide_pci_resume, |
| 1421 | }; |
| 1422 | MODULE_DEVICE_TABLE(pci, pmac_ide_pci_match); |
| 1423 | |
Andrew Morton | 9e5755b | 2007-03-03 17:48:54 +0100 | [diff] [blame] | 1424 | int __init pmac_ide_probe(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1425 | { |
Andrew Morton | 9e5755b | 2007-03-03 17:48:54 +0100 | [diff] [blame] | 1426 | int error; |
| 1427 | |
Benjamin Herrenschmidt | e822250 | 2006-03-28 23:15:54 +1100 | [diff] [blame] | 1428 | if (!machine_is(powermac)) |
Andrew Morton | 9e5755b | 2007-03-03 17:48:54 +0100 | [diff] [blame] | 1429 | return -ENODEV; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1430 | |
| 1431 | #ifdef CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST |
Andrew Morton | 9e5755b | 2007-03-03 17:48:54 +0100 | [diff] [blame] | 1432 | error = pci_register_driver(&pmac_ide_pci_driver); |
| 1433 | if (error) |
| 1434 | goto out; |
| 1435 | error = macio_register_driver(&pmac_ide_macio_driver); |
| 1436 | if (error) { |
| 1437 | pci_unregister_driver(&pmac_ide_pci_driver); |
| 1438 | goto out; |
| 1439 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1440 | #else |
Andrew Morton | 9e5755b | 2007-03-03 17:48:54 +0100 | [diff] [blame] | 1441 | error = macio_register_driver(&pmac_ide_macio_driver); |
| 1442 | if (error) |
| 1443 | goto out; |
| 1444 | error = pci_register_driver(&pmac_ide_pci_driver); |
| 1445 | if (error) { |
| 1446 | macio_unregister_driver(&pmac_ide_macio_driver); |
| 1447 | goto out; |
| 1448 | } |
Benjamin Herrenschmidt | 1beb6a7 | 2005-12-14 13:10:10 +1100 | [diff] [blame] | 1449 | #endif |
Andrew Morton | 9e5755b | 2007-03-03 17:48:54 +0100 | [diff] [blame] | 1450 | out: |
| 1451 | return error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1452 | } |
| 1453 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1454 | /* |
| 1455 | * pmac_ide_build_dmatable builds the DBDMA command list |
| 1456 | * for a transfer and sets the DBDMA channel to point to it. |
| 1457 | */ |
Bartlomiej Zolnierkiewicz | 22981694 | 2009-03-27 12:46:46 +0100 | [diff] [blame] | 1458 | static int pmac_ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1459 | { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1460 | ide_hwif_t *hwif = drive->hwif; |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 1461 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1462 | struct dbdma_cmd *table; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1463 | volatile struct dbdma_regs __iomem *dma = pmif->dma_regs; |
| 1464 | struct scatterlist *sg; |
Bartlomiej Zolnierkiewicz | 22981694 | 2009-03-27 12:46:46 +0100 | [diff] [blame] | 1465 | int wr = !!(cmd->tf_flags & IDE_TFLAG_WRITE); |
| 1466 | int i = cmd->sg_nents, count = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1467 | |
| 1468 | /* DMA table is already aligned */ |
| 1469 | table = (struct dbdma_cmd *) pmif->dma_table_cpu; |
| 1470 | |
| 1471 | /* Make sure DMA controller is stopped (necessary ?) */ |
| 1472 | writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma->control); |
| 1473 | while (readl(&dma->status) & RUN) |
| 1474 | udelay(1); |
| 1475 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1476 | /* Build DBDMA commands list */ |
| 1477 | sg = hwif->sg_table; |
| 1478 | while (i && sg_dma_len(sg)) { |
| 1479 | u32 cur_addr; |
| 1480 | u32 cur_len; |
| 1481 | |
| 1482 | cur_addr = sg_dma_address(sg); |
| 1483 | cur_len = sg_dma_len(sg); |
| 1484 | |
| 1485 | if (pmif->broken_dma && cur_addr & (L1_CACHE_BYTES - 1)) { |
| 1486 | if (pmif->broken_dma_warn == 0) { |
Joe Perches | aca38a5 | 2007-11-27 21:35:55 +0100 | [diff] [blame] | 1487 | printk(KERN_WARNING "%s: DMA on non aligned address, " |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1488 | "switching to PIO on Ohare chipset\n", drive->name); |
| 1489 | pmif->broken_dma_warn = 1; |
| 1490 | } |
Bartlomiej Zolnierkiewicz | 11998b3 | 2009-03-31 20:15:21 +0200 | [diff] [blame] | 1491 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1492 | } |
| 1493 | while (cur_len) { |
| 1494 | unsigned int tc = (cur_len < 0xfe00)? cur_len: 0xfe00; |
| 1495 | |
| 1496 | if (count++ >= MAX_DCMDS) { |
| 1497 | printk(KERN_WARNING "%s: DMA table too small\n", |
| 1498 | drive->name); |
Bartlomiej Zolnierkiewicz | 11998b3 | 2009-03-31 20:15:21 +0200 | [diff] [blame] | 1499 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1500 | } |
| 1501 | st_le16(&table->command, wr? OUTPUT_MORE: INPUT_MORE); |
| 1502 | st_le16(&table->req_count, tc); |
| 1503 | st_le32(&table->phy_addr, cur_addr); |
| 1504 | table->cmd_dep = 0; |
| 1505 | table->xfer_status = 0; |
| 1506 | table->res_count = 0; |
| 1507 | cur_addr += tc; |
| 1508 | cur_len -= tc; |
| 1509 | ++table; |
| 1510 | } |
Jens Axboe | 55c16a7 | 2007-07-25 08:13:56 +0200 | [diff] [blame] | 1511 | sg = sg_next(sg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1512 | i--; |
| 1513 | } |
| 1514 | |
| 1515 | /* convert the last command to an input/output last command */ |
| 1516 | if (count) { |
| 1517 | st_le16(&table[-1].command, wr? OUTPUT_LAST: INPUT_LAST); |
| 1518 | /* add the stop command to the end of the list */ |
| 1519 | memset(table, 0, sizeof(struct dbdma_cmd)); |
| 1520 | st_le16(&table->command, DBDMA_STOP); |
| 1521 | mb(); |
| 1522 | writel(hwif->dmatable_dma, &dma->cmdptr); |
| 1523 | return 1; |
| 1524 | } |
| 1525 | |
| 1526 | printk(KERN_DEBUG "%s: empty DMA table?\n", drive->name); |
Bartlomiej Zolnierkiewicz | f6fb786 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 1527 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1528 | return 0; /* revert to PIO for this request */ |
| 1529 | } |
| 1530 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1531 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1532 | * Prepare a DMA transfer. We build the DMA table, adjust the timings for |
| 1533 | * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion |
| 1534 | */ |
Bartlomiej Zolnierkiewicz | 22981694 | 2009-03-27 12:46:46 +0100 | [diff] [blame] | 1535 | static int pmac_ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1536 | { |
Bartlomiej Zolnierkiewicz | 898ec22 | 2009-01-06 17:20:52 +0100 | [diff] [blame] | 1537 | ide_hwif_t *hwif = drive->hwif; |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 1538 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Bartlomiej Zolnierkiewicz | 9055ba3 | 2008-10-13 21:39:45 +0200 | [diff] [blame] | 1539 | u8 unit = drive->dn & 1, ata4 = (pmif->kind == controller_kl_ata4); |
Bartlomiej Zolnierkiewicz | 22981694 | 2009-03-27 12:46:46 +0100 | [diff] [blame] | 1540 | u8 write = !!(cmd->tf_flags & IDE_TFLAG_WRITE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1541 | |
Bartlomiej Zolnierkiewicz | 11998b3 | 2009-03-31 20:15:21 +0200 | [diff] [blame] | 1542 | if (pmac_ide_build_dmatable(drive, cmd) == 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1543 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1544 | |
| 1545 | /* Apple adds 60ns to wrDataSetup on reads */ |
| 1546 | if (ata4 && (pmif->timings[unit] & TR_66_UDMA_EN)) { |
Bartlomiej Zolnierkiewicz | 22981694 | 2009-03-27 12:46:46 +0100 | [diff] [blame] | 1547 | writel(pmif->timings[unit] + (write ? 0 : 0x00800000UL), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1548 | PMAC_IDE_REG(IDE_TIMING_CONFIG)); |
| 1549 | (void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG)); |
| 1550 | } |
| 1551 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1552 | return 0; |
| 1553 | } |
| 1554 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1555 | /* |
| 1556 | * Kick the DMA controller into life after the DMA command has been issued |
| 1557 | * to the drive. |
| 1558 | */ |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 1559 | static void |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1560 | pmac_ide_dma_start(ide_drive_t *drive) |
| 1561 | { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1562 | ide_hwif_t *hwif = drive->hwif; |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 1563 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1564 | volatile struct dbdma_regs __iomem *dma; |
| 1565 | |
| 1566 | dma = pmif->dma_regs; |
| 1567 | |
| 1568 | writel((RUN << 16) | RUN, &dma->control); |
| 1569 | /* Make sure it gets to the controller right now */ |
| 1570 | (void)readl(&dma->control); |
| 1571 | } |
| 1572 | |
| 1573 | /* |
| 1574 | * After a DMA transfer, make sure the controller is stopped |
| 1575 | */ |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 1576 | static int |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1577 | pmac_ide_dma_end (ide_drive_t *drive) |
| 1578 | { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1579 | ide_hwif_t *hwif = drive->hwif; |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 1580 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Bartlomiej Zolnierkiewicz | 9055ba3 | 2008-10-13 21:39:45 +0200 | [diff] [blame] | 1581 | volatile struct dbdma_regs __iomem *dma = pmif->dma_regs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1582 | u32 dstat; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1583 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1584 | dstat = readl(&dma->status); |
| 1585 | writel(((RUN|WAKE|DEAD) << 16), &dma->control); |
Bartlomiej Zolnierkiewicz | f5e0b5e | 2008-10-13 21:39:45 +0200 | [diff] [blame] | 1586 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1587 | /* verify good dma status. we don't check for ACTIVE beeing 0. We should... |
| 1588 | * in theory, but with ATAPI decices doing buffer underruns, that would |
| 1589 | * cause us to disable DMA, which isn't what we want |
| 1590 | */ |
| 1591 | return (dstat & (RUN|DEAD)) != RUN; |
| 1592 | } |
| 1593 | |
| 1594 | /* |
| 1595 | * Check out that the interrupt we got was for us. We can't always know this |
| 1596 | * for sure with those Apple interfaces (well, we could on the recent ones but |
| 1597 | * that's not implemented yet), on the other hand, we don't have shared interrupts |
| 1598 | * so it's not really a problem |
| 1599 | */ |
Jon Loeliger | aacaf9b | 2005-09-17 10:36:54 -0500 | [diff] [blame] | 1600 | static int |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1601 | pmac_ide_dma_test_irq (ide_drive_t *drive) |
| 1602 | { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1603 | ide_hwif_t *hwif = drive->hwif; |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 1604 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Bartlomiej Zolnierkiewicz | 9055ba3 | 2008-10-13 21:39:45 +0200 | [diff] [blame] | 1605 | volatile struct dbdma_regs __iomem *dma = pmif->dma_regs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1606 | unsigned long status, timeout; |
| 1607 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1608 | /* We have to things to deal with here: |
| 1609 | * |
| 1610 | * - The dbdma won't stop if the command was started |
| 1611 | * but completed with an error without transferring all |
| 1612 | * datas. This happens when bad blocks are met during |
| 1613 | * a multi-block transfer. |
| 1614 | * |
| 1615 | * - The dbdma fifo hasn't yet finished flushing to |
| 1616 | * to system memory when the disk interrupt occurs. |
| 1617 | * |
| 1618 | */ |
| 1619 | |
| 1620 | /* If ACTIVE is cleared, the STOP command have passed and |
| 1621 | * transfer is complete. |
| 1622 | */ |
| 1623 | status = readl(&dma->status); |
| 1624 | if (!(status & ACTIVE)) |
| 1625 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1626 | |
| 1627 | /* If dbdma didn't execute the STOP command yet, the |
| 1628 | * active bit is still set. We consider that we aren't |
| 1629 | * sharing interrupts (which is hopefully the case with |
| 1630 | * those controllers) and so we just try to flush the |
| 1631 | * channel for pending data in the fifo |
| 1632 | */ |
| 1633 | udelay(1); |
| 1634 | writel((FLUSH << 16) | FLUSH, &dma->control); |
| 1635 | timeout = 0; |
| 1636 | for (;;) { |
| 1637 | udelay(1); |
| 1638 | status = readl(&dma->status); |
| 1639 | if ((status & FLUSH) == 0) |
| 1640 | break; |
| 1641 | if (++timeout > 100) { |
Joe Perches | b1681c5 | 2010-02-03 18:44:44 -0800 | [diff] [blame] | 1642 | printk(KERN_WARNING "ide%d, ide_dma_test_irq timeout flushing channel\n", |
| 1643 | hwif->index); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1644 | break; |
| 1645 | } |
| 1646 | } |
| 1647 | return 1; |
| 1648 | } |
| 1649 | |
Bartlomiej Zolnierkiewicz | 15ce926 | 2008-01-26 20:13:03 +0100 | [diff] [blame] | 1650 | static void pmac_ide_dma_host_set(ide_drive_t *drive, int on) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1651 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1652 | } |
| 1653 | |
Sergei Shtylyov | 841d2a9 | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 1654 | static void |
| 1655 | pmac_ide_dma_lost_irq (ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1656 | { |
Bartlomiej Zolnierkiewicz | 7b8797a | 2008-07-23 19:55:48 +0200 | [diff] [blame] | 1657 | ide_hwif_t *hwif = drive->hwif; |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 1658 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Bartlomiej Zolnierkiewicz | 9055ba3 | 2008-10-13 21:39:45 +0200 | [diff] [blame] | 1659 | volatile struct dbdma_regs __iomem *dma = pmif->dma_regs; |
| 1660 | unsigned long status = readl(&dma->status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1661 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1662 | printk(KERN_ERR "ide-pmac lost interrupt, dma status: %lx\n", status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1663 | } |
| 1664 | |
Bartlomiej Zolnierkiewicz | f37afda | 2008-04-26 22:25:24 +0200 | [diff] [blame] | 1665 | static const struct ide_dma_ops pmac_dma_ops = { |
Bartlomiej Zolnierkiewicz | 5e37bdc | 2008-04-26 22:25:24 +0200 | [diff] [blame] | 1666 | .dma_host_set = pmac_ide_dma_host_set, |
| 1667 | .dma_setup = pmac_ide_dma_setup, |
Bartlomiej Zolnierkiewicz | 5e37bdc | 2008-04-26 22:25:24 +0200 | [diff] [blame] | 1668 | .dma_start = pmac_ide_dma_start, |
| 1669 | .dma_end = pmac_ide_dma_end, |
| 1670 | .dma_test_irq = pmac_ide_dma_test_irq, |
Bartlomiej Zolnierkiewicz | 5e37bdc | 2008-04-26 22:25:24 +0200 | [diff] [blame] | 1671 | .dma_lost_irq = pmac_ide_dma_lost_irq, |
| 1672 | }; |
| 1673 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1674 | /* |
| 1675 | * Allocate the data structures needed for using DMA with an interface |
| 1676 | * and fill the proper list of functions pointers |
| 1677 | */ |
Greg Kroah-Hartman | fe31edc | 2012-12-21 13:21:03 -0800 | [diff] [blame] | 1678 | static int pmac_ide_init_dma(ide_hwif_t *hwif, const struct ide_port_info *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1679 | { |
Jingoo Han | 58e48be | 2013-09-09 14:41:14 +0900 | [diff] [blame^] | 1680 | pmac_ide_hwif_t *pmif = dev_get_drvdata(hwif->gendev.parent); |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 1681 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
| 1682 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1683 | /* We won't need pci_dev if we switch to generic consistent |
| 1684 | * DMA routines ... |
| 1685 | */ |
Bartlomiej Zolnierkiewicz | 0d07192 | 2008-04-26 22:25:22 +0200 | [diff] [blame] | 1686 | if (dev == NULL || pmif->dma_regs == 0) |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1687 | return -ENODEV; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1688 | /* |
| 1689 | * Allocate space for the DBDMA commands. |
| 1690 | * The +2 is +1 for the stop command and +1 to allow for |
| 1691 | * aligning the start address to a multiple of 16 bytes. |
| 1692 | */ |
Jack Stone | d5f840b | 2009-04-18 17:42:19 +0200 | [diff] [blame] | 1693 | pmif->dma_table_cpu = pci_alloc_consistent( |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 1694 | dev, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1695 | (MAX_DCMDS + 2) * sizeof(struct dbdma_cmd), |
| 1696 | &hwif->dmatable_dma); |
| 1697 | if (pmif->dma_table_cpu == NULL) { |
| 1698 | printk(KERN_ERR "%s: unable to allocate DMA command list\n", |
| 1699 | hwif->name); |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1700 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1701 | } |
| 1702 | |
Bartlomiej Zolnierkiewicz | 4f52a32 | 2008-01-26 20:13:08 +0100 | [diff] [blame] | 1703 | hwif->sg_max_nents = MAX_DCMDS; |
| 1704 | |
Bartlomiej Zolnierkiewicz | c413b9b | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1705 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1706 | } |
Bartlomiej Zolnierkiewicz | ade2daf | 2008-01-26 20:13:07 +0100 | [diff] [blame] | 1707 | |
| 1708 | module_init(pmac_ide_probe); |
Adrian Bunk | de9facb | 2008-04-02 21:22:03 +0200 | [diff] [blame] | 1709 | |
| 1710 | MODULE_LICENSE("GPL"); |