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gerrit-public.fairphone.software / kernel / msm-4.9 / 5a009adf32d28bacc02da2ddeb69765848266ce1 / . / drivers / net / wireless / mwifiex / 11n_rxreorder.h
blob: 13ecb6101e23aa03df35a85c7344afcb5f27c113 [file] [log] [blame]
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700[diff] [blame]1/*
2 * Marvell Wireless LAN device driver: 802.11n RX Re-ordering
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#ifndef _MWIFIEX_11N_RXREORDER_H_
21#define _MWIFIEX_11N_RXREORDER_H_
22
23#define MIN_FLUSH_TIMER_MS 50
24
25#define PKT_TYPE_BAR 0xE7
26#define MAX_TID_VALUE (2 << 11)
27#define TWOPOW11 (2 << 10)
28
29#define BLOCKACKPARAM_TID_POS 2
30#define BLOCKACKPARAM_AMSDU_SUPP_MASK 0x1
31#define BLOCKACKPARAM_WINSIZE_POS 6
32#define DELBA_TID_POS 12
33#define DELBA_INITIATOR_POS 11
34#define TYPE_DELBA_SENT 1
35#define TYPE_DELBA_RECEIVE 2
36#define IMMEDIATE_BLOCK_ACK 0x2
37
38#define ADDBA_RSP_STATUS_ACCEPT 0
39
Stone Piao92583922012-06-20 20:21:10 -0700[diff] [blame]40#define MWIFIEX_DEF_11N_RX_SEQ_NUM 0xffff
Avinash Patil5a009ad2012-08-03 18:06:10 -0700[diff] [blame^]41#define BA_SETUP_MAX_PACKET_THRESHOLD 16
42#define BA_SETUP_PACKET_OFFSET 16
Stone Piao92583922012-06-20 20:21:10 -0700[diff] [blame]43
44static inline void mwifiex_reset_11n_rx_seq_num(struct mwifiex_private *priv)
45{
46 memset(priv->rx_seq, 0xff, sizeof(priv->rx_seq));
47}
48
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700[diff] [blame]49int mwifiex_11n_rx_reorder_pkt(struct mwifiex_private *,
50 u16 seqNum,
51 u16 tid, u8 *ta,
52 u8 pkttype, void *payload);
Yogesh Ashok Powar3e822632012-03-12 19:35:08 -0700[diff] [blame]53void mwifiex_del_ba_tbl(struct mwifiex_private *priv, int Tid,
54 u8 *PeerMACAddr, u8 type, int initiator);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700[diff] [blame]55void mwifiex_11n_ba_stream_timeout(struct mwifiex_private *priv,
56 struct host_cmd_ds_11n_batimeout *event);
57int mwifiex_ret_11n_addba_resp(struct mwifiex_private *priv,
58 struct host_cmd_ds_command
59 *resp);
Amitkumar Karwar572e8f32011-04-13 17:27:08 -0700[diff] [blame]60int mwifiex_cmd_11n_delba(struct host_cmd_ds_command *cmd,
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700[diff] [blame]61 void *data_buf);
62int mwifiex_cmd_11n_addba_rsp_gen(struct mwifiex_private *priv,
Amitkumar Karwara5ffddb2011-06-20 15:21:48 -0700[diff] [blame]63 struct host_cmd_ds_command *cmd,
64 struct host_cmd_ds_11n_addba_req
65 *cmd_addba_req);
Amitkumar Karwar572e8f32011-04-13 17:27:08 -0700[diff] [blame]66int mwifiex_cmd_11n_addba_req(struct host_cmd_ds_command *cmd,
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700[diff] [blame]67 void *data_buf);
68void mwifiex_11n_cleanup_reorder_tbl(struct mwifiex_private *priv);
69struct mwifiex_rx_reorder_tbl *mwifiex_11n_get_rxreorder_tbl(struct
70 mwifiex_private
71 *priv, int tid,
72 u8 *ta);
Avinash Patild1cf3b92012-08-03 18:06:09 -0700[diff] [blame]73struct mwifiex_rx_reorder_tbl *
74mwifiex_11n_get_rx_reorder_tbl(struct mwifiex_private *priv, int tid, u8 *ta);
Bing Zhao5e6e3a92011-03-21 18:00:50 -0700[diff] [blame]75
76#endif /* _MWIFIEX_11N_RXREORDER_H_ */