David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 1 | /* |
| 2 | * winbond-cir.c - Driver for the Consumer IR functionality of Winbond |
| 3 | * SuperI/O chips. |
| 4 | * |
| 5 | * Currently supports the Winbond WPCD376i chip (PNP id WEC1022), but |
| 6 | * could probably support others (Winbond WEC102X, NatSemi, etc) |
| 7 | * with minor modifications. |
| 8 | * |
| 9 | * Original Author: David Härdeman <david@hardeman.nu> |
| 10 | * Copyright (C) 2009 David Härdeman <david@hardeman.nu> |
| 11 | * |
| 12 | * Dedicated to Matilda, my newborn daughter, without whose loving attention |
| 13 | * this driver would have been finished in half the time and with a fraction |
| 14 | * of the bugs. |
| 15 | * |
| 16 | * Written using: |
| 17 | * o Winbond WPCD376I datasheet helpfully provided by Jesse Barnes at Intel |
| 18 | * o NatSemi PC87338/PC97338 datasheet (for the serial port stuff) |
| 19 | * o DSDT dumps |
| 20 | * |
| 21 | * Supported features: |
| 22 | * o RC6 |
| 23 | * o Wake-On-CIR functionality |
| 24 | * |
| 25 | * To do: |
| 26 | * o Test NEC and RC5 |
| 27 | * |
| 28 | * Left as an exercise for the reader: |
| 29 | * o Learning (I have neither the hardware, nor the need) |
| 30 | * o IR Transmit (ibid) |
| 31 | * |
| 32 | * This program is free software; you can redistribute it and/or modify |
| 33 | * it under the terms of the GNU General Public License as published by |
| 34 | * the Free Software Foundation; either version 2 of the License, or |
| 35 | * (at your option) any later version. |
| 36 | * |
| 37 | * This program is distributed in the hope that it will be useful, |
| 38 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 39 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 40 | * GNU General Public License for more details. |
| 41 | * |
| 42 | * You should have received a copy of the GNU General Public License |
| 43 | * along with this program; if not, write to the Free Software |
| 44 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 45 | */ |
| 46 | |
| 47 | #include <linux/module.h> |
| 48 | #include <linux/pnp.h> |
| 49 | #include <linux/interrupt.h> |
| 50 | #include <linux/timer.h> |
| 51 | #include <linux/input.h> |
| 52 | #include <linux/leds.h> |
| 53 | #include <linux/list.h> |
| 54 | #include <linux/spinlock.h> |
| 55 | #include <linux/pci_ids.h> |
| 56 | #include <linux/io.h> |
| 57 | #include <linux/bitrev.h> |
| 58 | #include <linux/bitops.h> |
| 59 | |
| 60 | #define DRVNAME "winbond-cir" |
| 61 | |
| 62 | /* CEIR Wake-Up Registers, relative to data->wbase */ |
| 63 | #define WBCIR_REG_WCEIR_CTL 0x03 /* CEIR Receiver Control */ |
| 64 | #define WBCIR_REG_WCEIR_STS 0x04 /* CEIR Receiver Status */ |
| 65 | #define WBCIR_REG_WCEIR_EV_EN 0x05 /* CEIR Receiver Event Enable */ |
| 66 | #define WBCIR_REG_WCEIR_CNTL 0x06 /* CEIR Receiver Counter Low */ |
| 67 | #define WBCIR_REG_WCEIR_CNTH 0x07 /* CEIR Receiver Counter High */ |
| 68 | #define WBCIR_REG_WCEIR_INDEX 0x08 /* CEIR Receiver Index */ |
| 69 | #define WBCIR_REG_WCEIR_DATA 0x09 /* CEIR Receiver Data */ |
| 70 | #define WBCIR_REG_WCEIR_CSL 0x0A /* CEIR Re. Compare Strlen */ |
| 71 | #define WBCIR_REG_WCEIR_CFG1 0x0B /* CEIR Re. Configuration 1 */ |
| 72 | #define WBCIR_REG_WCEIR_CFG2 0x0C /* CEIR Re. Configuration 2 */ |
| 73 | |
| 74 | /* CEIR Enhanced Functionality Registers, relative to data->ebase */ |
| 75 | #define WBCIR_REG_ECEIR_CTS 0x00 /* Enhanced IR Control Status */ |
| 76 | #define WBCIR_REG_ECEIR_CCTL 0x01 /* Infrared Counter Control */ |
| 77 | #define WBCIR_REG_ECEIR_CNT_LO 0x02 /* Infrared Counter LSB */ |
| 78 | #define WBCIR_REG_ECEIR_CNT_HI 0x03 /* Infrared Counter MSB */ |
| 79 | #define WBCIR_REG_ECEIR_IREM 0x04 /* Infrared Emitter Status */ |
| 80 | |
| 81 | /* SP3 Banked Registers, relative to data->sbase */ |
| 82 | #define WBCIR_REG_SP3_BSR 0x03 /* Bank Select, all banks */ |
| 83 | /* Bank 0 */ |
| 84 | #define WBCIR_REG_SP3_RXDATA 0x00 /* FIFO RX data (r) */ |
| 85 | #define WBCIR_REG_SP3_TXDATA 0x00 /* FIFO TX data (w) */ |
| 86 | #define WBCIR_REG_SP3_IER 0x01 /* Interrupt Enable */ |
| 87 | #define WBCIR_REG_SP3_EIR 0x02 /* Event Identification (r) */ |
| 88 | #define WBCIR_REG_SP3_FCR 0x02 /* FIFO Control (w) */ |
| 89 | #define WBCIR_REG_SP3_MCR 0x04 /* Mode Control */ |
| 90 | #define WBCIR_REG_SP3_LSR 0x05 /* Link Status */ |
| 91 | #define WBCIR_REG_SP3_MSR 0x06 /* Modem Status */ |
| 92 | #define WBCIR_REG_SP3_ASCR 0x07 /* Aux Status and Control */ |
| 93 | /* Bank 2 */ |
| 94 | #define WBCIR_REG_SP3_BGDL 0x00 /* Baud Divisor LSB */ |
| 95 | #define WBCIR_REG_SP3_BGDH 0x01 /* Baud Divisor MSB */ |
| 96 | #define WBCIR_REG_SP3_EXCR1 0x02 /* Extended Control 1 */ |
| 97 | #define WBCIR_REG_SP3_EXCR2 0x04 /* Extended Control 2 */ |
| 98 | #define WBCIR_REG_SP3_TXFLV 0x06 /* TX FIFO Level */ |
| 99 | #define WBCIR_REG_SP3_RXFLV 0x07 /* RX FIFO Level */ |
| 100 | /* Bank 3 */ |
| 101 | #define WBCIR_REG_SP3_MRID 0x00 /* Module Identification */ |
| 102 | #define WBCIR_REG_SP3_SH_LCR 0x01 /* LCR Shadow */ |
| 103 | #define WBCIR_REG_SP3_SH_FCR 0x02 /* FCR Shadow */ |
| 104 | /* Bank 4 */ |
| 105 | #define WBCIR_REG_SP3_IRCR1 0x02 /* Infrared Control 1 */ |
| 106 | /* Bank 5 */ |
| 107 | #define WBCIR_REG_SP3_IRCR2 0x04 /* Infrared Control 2 */ |
| 108 | /* Bank 6 */ |
| 109 | #define WBCIR_REG_SP3_IRCR3 0x00 /* Infrared Control 3 */ |
| 110 | #define WBCIR_REG_SP3_SIR_PW 0x02 /* SIR Pulse Width */ |
| 111 | /* Bank 7 */ |
| 112 | #define WBCIR_REG_SP3_IRRXDC 0x00 /* IR RX Demod Control */ |
| 113 | #define WBCIR_REG_SP3_IRTXMC 0x01 /* IR TX Mod Control */ |
| 114 | #define WBCIR_REG_SP3_RCCFG 0x02 /* CEIR Config */ |
| 115 | #define WBCIR_REG_SP3_IRCFG1 0x04 /* Infrared Config 1 */ |
| 116 | #define WBCIR_REG_SP3_IRCFG4 0x07 /* Infrared Config 4 */ |
| 117 | |
| 118 | /* |
| 119 | * Magic values follow |
| 120 | */ |
| 121 | |
| 122 | /* No interrupts for WBCIR_REG_SP3_IER and WBCIR_REG_SP3_EIR */ |
| 123 | #define WBCIR_IRQ_NONE 0x00 |
| 124 | /* RX data bit for WBCIR_REG_SP3_IER and WBCIR_REG_SP3_EIR */ |
| 125 | #define WBCIR_IRQ_RX 0x01 |
| 126 | /* Over/Under-flow bit for WBCIR_REG_SP3_IER and WBCIR_REG_SP3_EIR */ |
| 127 | #define WBCIR_IRQ_ERR 0x04 |
| 128 | /* Led enable/disable bit for WBCIR_REG_ECEIR_CTS */ |
| 129 | #define WBCIR_LED_ENABLE 0x80 |
| 130 | /* RX data available bit for WBCIR_REG_SP3_LSR */ |
| 131 | #define WBCIR_RX_AVAIL 0x01 |
| 132 | /* RX disable bit for WBCIR_REG_SP3_ASCR */ |
| 133 | #define WBCIR_RX_DISABLE 0x20 |
| 134 | /* Extended mode enable bit for WBCIR_REG_SP3_EXCR1 */ |
| 135 | #define WBCIR_EXT_ENABLE 0x01 |
| 136 | /* Select compare register in WBCIR_REG_WCEIR_INDEX (bits 5 & 6) */ |
| 137 | #define WBCIR_REGSEL_COMPARE 0x10 |
| 138 | /* Select mask register in WBCIR_REG_WCEIR_INDEX (bits 5 & 6) */ |
| 139 | #define WBCIR_REGSEL_MASK 0x20 |
| 140 | /* Starting address of selected register in WBCIR_REG_WCEIR_INDEX */ |
| 141 | #define WBCIR_REG_ADDR0 0x00 |
| 142 | |
| 143 | /* Valid banks for the SP3 UART */ |
| 144 | enum wbcir_bank { |
| 145 | WBCIR_BANK_0 = 0x00, |
| 146 | WBCIR_BANK_1 = 0x80, |
| 147 | WBCIR_BANK_2 = 0xE0, |
| 148 | WBCIR_BANK_3 = 0xE4, |
| 149 | WBCIR_BANK_4 = 0xE8, |
| 150 | WBCIR_BANK_5 = 0xEC, |
| 151 | WBCIR_BANK_6 = 0xF0, |
| 152 | WBCIR_BANK_7 = 0xF4, |
| 153 | }; |
| 154 | |
| 155 | /* Supported IR Protocols */ |
| 156 | enum wbcir_protocol { |
| 157 | IR_PROTOCOL_RC5 = 0x0, |
| 158 | IR_PROTOCOL_NEC = 0x1, |
| 159 | IR_PROTOCOL_RC6 = 0x2, |
| 160 | }; |
| 161 | |
| 162 | /* Misc */ |
| 163 | #define WBCIR_NAME "Winbond CIR" |
| 164 | #define WBCIR_ID_FAMILY 0xF1 /* Family ID for the WPCD376I */ |
| 165 | #define WBCIR_ID_CHIP 0x04 /* Chip ID for the WPCD376I */ |
| 166 | #define IR_KEYPRESS_TIMEOUT 250 /* FIXME: should be per-protocol? */ |
| 167 | #define INVALID_SCANCODE 0x7FFFFFFF /* Invalid with all protos */ |
| 168 | #define WAKEUP_IOMEM_LEN 0x10 /* Wake-Up I/O Reg Len */ |
| 169 | #define EHFUNC_IOMEM_LEN 0x10 /* Enhanced Func I/O Reg Len */ |
| 170 | #define SP_IOMEM_LEN 0x08 /* Serial Port 3 (IR) Reg Len */ |
| 171 | #define WBCIR_MAX_IDLE_BYTES 10 |
| 172 | |
| 173 | static DEFINE_SPINLOCK(wbcir_lock); |
| 174 | static DEFINE_RWLOCK(keytable_lock); |
| 175 | |
| 176 | struct wbcir_key { |
| 177 | u32 scancode; |
| 178 | unsigned int keycode; |
| 179 | }; |
| 180 | |
| 181 | struct wbcir_keyentry { |
| 182 | struct wbcir_key key; |
| 183 | struct list_head list; |
| 184 | }; |
| 185 | |
| 186 | static struct wbcir_key rc6_def_keymap[] = { |
| 187 | { 0x800F0400, KEY_NUMERIC_0 }, |
| 188 | { 0x800F0401, KEY_NUMERIC_1 }, |
| 189 | { 0x800F0402, KEY_NUMERIC_2 }, |
| 190 | { 0x800F0403, KEY_NUMERIC_3 }, |
| 191 | { 0x800F0404, KEY_NUMERIC_4 }, |
| 192 | { 0x800F0405, KEY_NUMERIC_5 }, |
| 193 | { 0x800F0406, KEY_NUMERIC_6 }, |
| 194 | { 0x800F0407, KEY_NUMERIC_7 }, |
| 195 | { 0x800F0408, KEY_NUMERIC_8 }, |
| 196 | { 0x800F0409, KEY_NUMERIC_9 }, |
| 197 | { 0x800F041D, KEY_NUMERIC_STAR }, |
| 198 | { 0x800F041C, KEY_NUMERIC_POUND }, |
| 199 | { 0x800F0410, KEY_VOLUMEUP }, |
| 200 | { 0x800F0411, KEY_VOLUMEDOWN }, |
| 201 | { 0x800F0412, KEY_CHANNELUP }, |
| 202 | { 0x800F0413, KEY_CHANNELDOWN }, |
| 203 | { 0x800F040E, KEY_MUTE }, |
| 204 | { 0x800F040D, KEY_VENDOR }, /* Vista Logo Key */ |
| 205 | { 0x800F041E, KEY_UP }, |
| 206 | { 0x800F041F, KEY_DOWN }, |
| 207 | { 0x800F0420, KEY_LEFT }, |
| 208 | { 0x800F0421, KEY_RIGHT }, |
| 209 | { 0x800F0422, KEY_OK }, |
| 210 | { 0x800F0423, KEY_ESC }, |
| 211 | { 0x800F040F, KEY_INFO }, |
| 212 | { 0x800F040A, KEY_CLEAR }, |
| 213 | { 0x800F040B, KEY_ENTER }, |
| 214 | { 0x800F045B, KEY_RED }, |
| 215 | { 0x800F045C, KEY_GREEN }, |
| 216 | { 0x800F045D, KEY_YELLOW }, |
| 217 | { 0x800F045E, KEY_BLUE }, |
| 218 | { 0x800F045A, KEY_TEXT }, |
| 219 | { 0x800F0427, KEY_SWITCHVIDEOMODE }, |
| 220 | { 0x800F040C, KEY_POWER }, |
| 221 | { 0x800F0450, KEY_RADIO }, |
| 222 | { 0x800F0448, KEY_PVR }, |
| 223 | { 0x800F0447, KEY_AUDIO }, |
| 224 | { 0x800F0426, KEY_EPG }, |
| 225 | { 0x800F0449, KEY_CAMERA }, |
| 226 | { 0x800F0425, KEY_TV }, |
| 227 | { 0x800F044A, KEY_VIDEO }, |
| 228 | { 0x800F0424, KEY_DVD }, |
| 229 | { 0x800F0416, KEY_PLAY }, |
| 230 | { 0x800F0418, KEY_PAUSE }, |
| 231 | { 0x800F0419, KEY_STOP }, |
| 232 | { 0x800F0414, KEY_FASTFORWARD }, |
| 233 | { 0x800F041A, KEY_NEXT }, |
| 234 | { 0x800F041B, KEY_PREVIOUS }, |
| 235 | { 0x800F0415, KEY_REWIND }, |
| 236 | { 0x800F0417, KEY_RECORD }, |
| 237 | }; |
| 238 | |
| 239 | /* Registers and other state is protected by wbcir_lock */ |
| 240 | struct wbcir_data { |
| 241 | unsigned long wbase; /* Wake-Up Baseaddr */ |
| 242 | unsigned long ebase; /* Enhanced Func. Baseaddr */ |
| 243 | unsigned long sbase; /* Serial Port Baseaddr */ |
| 244 | unsigned int irq; /* Serial Port IRQ */ |
| 245 | |
| 246 | struct input_dev *input_dev; |
| 247 | struct timer_list timer_keyup; |
| 248 | struct led_trigger *rxtrigger; |
| 249 | struct led_trigger *txtrigger; |
| 250 | struct led_classdev led; |
| 251 | |
| 252 | u32 last_scancode; |
| 253 | unsigned int last_keycode; |
| 254 | u8 last_toggle; |
| 255 | u8 keypressed; |
| 256 | unsigned long keyup_jiffies; |
| 257 | unsigned int idle_count; |
| 258 | |
| 259 | /* RX irdata and parsing state */ |
| 260 | unsigned long irdata[30]; |
| 261 | unsigned int irdata_count; |
| 262 | unsigned int irdata_idle; |
| 263 | unsigned int irdata_off; |
| 264 | unsigned int irdata_error; |
| 265 | |
| 266 | /* Protected by keytable_lock */ |
| 267 | struct list_head keytable; |
| 268 | }; |
| 269 | |
| 270 | static enum wbcir_protocol protocol = IR_PROTOCOL_RC6; |
| 271 | module_param(protocol, uint, 0444); |
| 272 | MODULE_PARM_DESC(protocol, "IR protocol to use " |
| 273 | "(0 = RC5, 1 = NEC, 2 = RC6A, default)"); |
| 274 | |
| 275 | static int invert; /* default = 0 */ |
| 276 | module_param(invert, bool, 0444); |
| 277 | MODULE_PARM_DESC(invert, "Invert the signal from the IR receiver"); |
| 278 | |
| 279 | static unsigned int wake_sc = 0x800F040C; |
| 280 | module_param(wake_sc, uint, 0644); |
| 281 | MODULE_PARM_DESC(wake_sc, "Scancode of the power-on IR command"); |
| 282 | |
| 283 | static unsigned int wake_rc6mode = 6; |
| 284 | module_param(wake_rc6mode, uint, 0644); |
| 285 | MODULE_PARM_DESC(wake_rc6mode, "RC6 mode for the power-on command " |
| 286 | "(0 = 0, 6 = 6A, default)"); |
| 287 | |
| 288 | |
| 289 | |
| 290 | /***************************************************************************** |
| 291 | * |
| 292 | * UTILITY FUNCTIONS |
| 293 | * |
| 294 | *****************************************************************************/ |
| 295 | |
| 296 | /* Caller needs to hold wbcir_lock */ |
| 297 | static void |
| 298 | wbcir_set_bits(unsigned long addr, u8 bits, u8 mask) |
| 299 | { |
| 300 | u8 val; |
| 301 | |
| 302 | val = inb(addr); |
| 303 | val = ((val & ~mask) | (bits & mask)); |
| 304 | outb(val, addr); |
| 305 | } |
| 306 | |
| 307 | /* Selects the register bank for the serial port */ |
| 308 | static inline void |
| 309 | wbcir_select_bank(struct wbcir_data *data, enum wbcir_bank bank) |
| 310 | { |
| 311 | outb(bank, data->sbase + WBCIR_REG_SP3_BSR); |
| 312 | } |
| 313 | |
| 314 | static enum led_brightness |
| 315 | wbcir_led_brightness_get(struct led_classdev *led_cdev) |
| 316 | { |
| 317 | struct wbcir_data *data = container_of(led_cdev, |
| 318 | struct wbcir_data, |
| 319 | led); |
| 320 | |
| 321 | if (inb(data->ebase + WBCIR_REG_ECEIR_CTS) & WBCIR_LED_ENABLE) |
| 322 | return LED_FULL; |
| 323 | else |
| 324 | return LED_OFF; |
| 325 | } |
| 326 | |
| 327 | static void |
| 328 | wbcir_led_brightness_set(struct led_classdev *led_cdev, |
| 329 | enum led_brightness brightness) |
| 330 | { |
| 331 | struct wbcir_data *data = container_of(led_cdev, |
| 332 | struct wbcir_data, |
| 333 | led); |
| 334 | |
| 335 | wbcir_set_bits(data->ebase + WBCIR_REG_ECEIR_CTS, |
| 336 | brightness == LED_OFF ? 0x00 : WBCIR_LED_ENABLE, |
| 337 | WBCIR_LED_ENABLE); |
| 338 | } |
| 339 | |
| 340 | /* Manchester encodes bits to RC6 message cells (see wbcir_parse_rc6) */ |
| 341 | static u8 |
| 342 | wbcir_to_rc6cells(u8 val) |
| 343 | { |
| 344 | u8 coded = 0x00; |
| 345 | int i; |
| 346 | |
| 347 | val &= 0x0F; |
| 348 | for (i = 0; i < 4; i++) { |
| 349 | if (val & 0x01) |
| 350 | coded |= 0x02 << (i * 2); |
| 351 | else |
| 352 | coded |= 0x01 << (i * 2); |
| 353 | val >>= 1; |
| 354 | } |
| 355 | |
| 356 | return coded; |
| 357 | } |
| 358 | |
| 359 | |
| 360 | |
| 361 | /***************************************************************************** |
| 362 | * |
| 363 | * INPUT FUNCTIONS |
| 364 | * |
| 365 | *****************************************************************************/ |
| 366 | |
| 367 | static unsigned int |
| 368 | wbcir_do_getkeycode(struct wbcir_data *data, u32 scancode) |
| 369 | { |
| 370 | struct wbcir_keyentry *keyentry; |
| 371 | unsigned int keycode = KEY_RESERVED; |
| 372 | unsigned long flags; |
| 373 | |
| 374 | read_lock_irqsave(&keytable_lock, flags); |
| 375 | |
| 376 | list_for_each_entry(keyentry, &data->keytable, list) { |
| 377 | if (keyentry->key.scancode == scancode) { |
| 378 | keycode = keyentry->key.keycode; |
| 379 | break; |
| 380 | } |
| 381 | } |
| 382 | |
| 383 | read_unlock_irqrestore(&keytable_lock, flags); |
| 384 | return keycode; |
| 385 | } |
| 386 | |
| 387 | static int |
Dmitry Torokhov | 58b9399 | 2010-03-08 22:37:10 -0800 | [diff] [blame] | 388 | wbcir_getkeycode(struct input_dev *dev, |
| 389 | unsigned int scancode, unsigned int *keycode) |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 390 | { |
| 391 | struct wbcir_data *data = input_get_drvdata(dev); |
| 392 | |
Dmitry Torokhov | 58b9399 | 2010-03-08 22:37:10 -0800 | [diff] [blame] | 393 | *keycode = wbcir_do_getkeycode(data, scancode); |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 394 | return 0; |
| 395 | } |
| 396 | |
| 397 | static int |
Dmitry Torokhov | 58b9399 | 2010-03-08 22:37:10 -0800 | [diff] [blame] | 398 | wbcir_setkeycode(struct input_dev *dev, |
| 399 | unsigned int scancode, unsigned int keycode) |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 400 | { |
| 401 | struct wbcir_data *data = input_get_drvdata(dev); |
| 402 | struct wbcir_keyentry *keyentry; |
| 403 | struct wbcir_keyentry *new_keyentry; |
| 404 | unsigned long flags; |
| 405 | unsigned int old_keycode = KEY_RESERVED; |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 406 | |
| 407 | new_keyentry = kmalloc(sizeof(*new_keyentry), GFP_KERNEL); |
| 408 | if (!new_keyentry) |
| 409 | return -ENOMEM; |
| 410 | |
| 411 | write_lock_irqsave(&keytable_lock, flags); |
| 412 | |
| 413 | list_for_each_entry(keyentry, &data->keytable, list) { |
| 414 | if (keyentry->key.scancode != scancode) |
| 415 | continue; |
| 416 | |
| 417 | old_keycode = keyentry->key.keycode; |
| 418 | keyentry->key.keycode = keycode; |
| 419 | |
| 420 | if (keyentry->key.keycode == KEY_RESERVED) { |
| 421 | list_del(&keyentry->list); |
| 422 | kfree(keyentry); |
| 423 | } |
| 424 | |
| 425 | break; |
| 426 | } |
| 427 | |
| 428 | set_bit(keycode, dev->keybit); |
| 429 | |
| 430 | if (old_keycode == KEY_RESERVED) { |
| 431 | new_keyentry->key.scancode = scancode; |
| 432 | new_keyentry->key.keycode = keycode; |
| 433 | list_add(&new_keyentry->list, &data->keytable); |
| 434 | } else { |
| 435 | kfree(new_keyentry); |
| 436 | clear_bit(old_keycode, dev->keybit); |
| 437 | list_for_each_entry(keyentry, &data->keytable, list) { |
| 438 | if (keyentry->key.keycode == old_keycode) { |
| 439 | set_bit(old_keycode, dev->keybit); |
| 440 | break; |
| 441 | } |
| 442 | } |
| 443 | } |
| 444 | |
| 445 | write_unlock_irqrestore(&keytable_lock, flags); |
| 446 | return 0; |
| 447 | } |
| 448 | |
| 449 | /* |
| 450 | * Timer function to report keyup event some time after keydown is |
| 451 | * reported by the ISR. |
| 452 | */ |
| 453 | static void |
| 454 | wbcir_keyup(unsigned long cookie) |
| 455 | { |
| 456 | struct wbcir_data *data = (struct wbcir_data *)cookie; |
| 457 | unsigned long flags; |
| 458 | |
| 459 | /* |
| 460 | * data->keyup_jiffies is used to prevent a race condition if a |
| 461 | * hardware interrupt occurs at this point and the keyup timer |
| 462 | * event is moved further into the future as a result. |
| 463 | * |
| 464 | * The timer will then be reactivated and this function called |
| 465 | * again in the future. We need to exit gracefully in that case |
| 466 | * to allow the input subsystem to do its auto-repeat magic or |
| 467 | * a keyup event might follow immediately after the keydown. |
| 468 | */ |
| 469 | |
| 470 | spin_lock_irqsave(&wbcir_lock, flags); |
| 471 | |
| 472 | if (time_is_after_eq_jiffies(data->keyup_jiffies) && data->keypressed) { |
| 473 | data->keypressed = 0; |
| 474 | led_trigger_event(data->rxtrigger, LED_OFF); |
| 475 | input_report_key(data->input_dev, data->last_keycode, 0); |
| 476 | input_sync(data->input_dev); |
| 477 | } |
| 478 | |
| 479 | spin_unlock_irqrestore(&wbcir_lock, flags); |
| 480 | } |
| 481 | |
| 482 | static void |
| 483 | wbcir_keydown(struct wbcir_data *data, u32 scancode, u8 toggle) |
| 484 | { |
| 485 | unsigned int keycode; |
| 486 | |
| 487 | /* Repeat? */ |
| 488 | if (data->last_scancode == scancode && |
| 489 | data->last_toggle == toggle && |
| 490 | data->keypressed) |
| 491 | goto set_timer; |
| 492 | data->last_scancode = scancode; |
| 493 | |
| 494 | /* Do we need to release an old keypress? */ |
| 495 | if (data->keypressed) { |
| 496 | input_report_key(data->input_dev, data->last_keycode, 0); |
| 497 | input_sync(data->input_dev); |
| 498 | data->keypressed = 0; |
| 499 | } |
| 500 | |
| 501 | /* Report scancode */ |
| 502 | input_event(data->input_dev, EV_MSC, MSC_SCAN, (int)scancode); |
| 503 | |
| 504 | /* Do we know this scancode? */ |
| 505 | keycode = wbcir_do_getkeycode(data, scancode); |
| 506 | if (keycode == KEY_RESERVED) |
| 507 | goto set_timer; |
| 508 | |
| 509 | /* Register a keypress */ |
| 510 | input_report_key(data->input_dev, keycode, 1); |
| 511 | data->keypressed = 1; |
| 512 | data->last_keycode = keycode; |
| 513 | data->last_toggle = toggle; |
| 514 | |
| 515 | set_timer: |
| 516 | input_sync(data->input_dev); |
| 517 | led_trigger_event(data->rxtrigger, |
| 518 | data->keypressed ? LED_FULL : LED_OFF); |
| 519 | data->keyup_jiffies = jiffies + msecs_to_jiffies(IR_KEYPRESS_TIMEOUT); |
| 520 | mod_timer(&data->timer_keyup, data->keyup_jiffies); |
| 521 | } |
| 522 | |
| 523 | |
| 524 | |
| 525 | /***************************************************************************** |
| 526 | * |
| 527 | * IR PARSING FUNCTIONS |
| 528 | * |
| 529 | *****************************************************************************/ |
| 530 | |
| 531 | /* Resets all irdata */ |
| 532 | static void |
| 533 | wbcir_reset_irdata(struct wbcir_data *data) |
| 534 | { |
| 535 | memset(data->irdata, 0, sizeof(data->irdata)); |
| 536 | data->irdata_count = 0; |
| 537 | data->irdata_off = 0; |
| 538 | data->irdata_error = 0; |
David Härdeman | 197d4db | 2010-02-24 02:08:29 -0800 | [diff] [blame] | 539 | data->idle_count = 0; |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 540 | } |
| 541 | |
| 542 | /* Adds one bit of irdata */ |
| 543 | static void |
| 544 | add_irdata_bit(struct wbcir_data *data, int set) |
| 545 | { |
| 546 | if (data->irdata_count >= sizeof(data->irdata) * 8) { |
| 547 | data->irdata_error = 1; |
| 548 | return; |
| 549 | } |
| 550 | |
| 551 | if (set) |
| 552 | __set_bit(data->irdata_count, data->irdata); |
| 553 | data->irdata_count++; |
| 554 | } |
| 555 | |
| 556 | /* Gets count bits of irdata */ |
| 557 | static u16 |
| 558 | get_bits(struct wbcir_data *data, int count) |
| 559 | { |
| 560 | u16 val = 0x0; |
| 561 | |
| 562 | if (data->irdata_count - data->irdata_off < count) { |
| 563 | data->irdata_error = 1; |
| 564 | return 0x0; |
| 565 | } |
| 566 | |
| 567 | while (count > 0) { |
| 568 | val <<= 1; |
| 569 | if (test_bit(data->irdata_off, data->irdata)) |
| 570 | val |= 0x1; |
| 571 | count--; |
| 572 | data->irdata_off++; |
| 573 | } |
| 574 | |
| 575 | return val; |
| 576 | } |
| 577 | |
| 578 | /* Reads 16 cells and converts them to a byte */ |
| 579 | static u8 |
| 580 | wbcir_rc6cells_to_byte(struct wbcir_data *data) |
| 581 | { |
| 582 | u16 raw = get_bits(data, 16); |
| 583 | u8 val = 0x00; |
| 584 | int bit; |
| 585 | |
| 586 | for (bit = 0; bit < 8; bit++) { |
| 587 | switch (raw & 0x03) { |
| 588 | case 0x01: |
| 589 | break; |
| 590 | case 0x02: |
| 591 | val |= (0x01 << bit); |
| 592 | break; |
| 593 | default: |
| 594 | data->irdata_error = 1; |
| 595 | break; |
| 596 | } |
| 597 | raw >>= 2; |
| 598 | } |
| 599 | |
| 600 | return val; |
| 601 | } |
| 602 | |
| 603 | /* Decodes a number of bits from raw RC5 data */ |
| 604 | static u8 |
| 605 | wbcir_get_rc5bits(struct wbcir_data *data, unsigned int count) |
| 606 | { |
| 607 | u16 raw = get_bits(data, count * 2); |
| 608 | u8 val = 0x00; |
| 609 | int bit; |
| 610 | |
| 611 | for (bit = 0; bit < count; bit++) { |
| 612 | switch (raw & 0x03) { |
| 613 | case 0x01: |
| 614 | val |= (0x01 << bit); |
| 615 | break; |
| 616 | case 0x02: |
| 617 | break; |
| 618 | default: |
| 619 | data->irdata_error = 1; |
| 620 | break; |
| 621 | } |
| 622 | raw >>= 2; |
| 623 | } |
| 624 | |
| 625 | return val; |
| 626 | } |
| 627 | |
| 628 | static void |
| 629 | wbcir_parse_rc6(struct device *dev, struct wbcir_data *data) |
| 630 | { |
| 631 | /* |
| 632 | * Normal bits are manchester coded as follows: |
| 633 | * cell0 + cell1 = logic "0" |
| 634 | * cell1 + cell0 = logic "1" |
| 635 | * |
| 636 | * The IR pulse has the following components: |
| 637 | * |
| 638 | * Leader - 6 * cell1 - discarded |
| 639 | * Gap - 2 * cell0 - discarded |
| 640 | * Start bit - Normal Coding - always "1" |
| 641 | * Mode Bit 2 - 0 - Normal Coding |
| 642 | * Toggle bit - Normal Coding with double bit time, |
| 643 | * e.g. cell0 + cell0 + cell1 + cell1 |
| 644 | * means logic "0". |
| 645 | * |
| 646 | * The rest depends on the mode, the following modes are known: |
| 647 | * |
| 648 | * MODE 0: |
| 649 | * Address Bit 7 - 0 - Normal Coding |
| 650 | * Command Bit 7 - 0 - Normal Coding |
| 651 | * |
| 652 | * MODE 6: |
| 653 | * The above Toggle Bit is used as a submode bit, 0 = A, 1 = B. |
| 654 | * Submode B is for pointing devices, only remotes using submode A |
| 655 | * are supported. |
| 656 | * |
| 657 | * Customer range bit - 0 => Customer = 7 bits, 0...127 |
| 658 | * 1 => Customer = 15 bits, 32768...65535 |
| 659 | * Customer Bits - Normal Coding |
| 660 | * |
| 661 | * Customer codes are allocated by Philips. The rest of the bits |
| 662 | * are customer dependent. The following is commonly used (and the |
| 663 | * only supported config): |
| 664 | * |
| 665 | * Toggle Bit - Normal Coding |
| 666 | * Address Bit 6 - 0 - Normal Coding |
| 667 | * Command Bit 7 - 0 - Normal Coding |
| 668 | * |
| 669 | * All modes are followed by at least 6 * cell0. |
| 670 | * |
| 671 | * MODE 0 msglen: |
| 672 | * 1 * 2 (start bit) + 3 * 2 (mode) + 2 * 2 (toggle) + |
| 673 | * 8 * 2 (address) + 8 * 2 (command) = |
| 674 | * 44 cells |
| 675 | * |
| 676 | * MODE 6A msglen: |
| 677 | * 1 * 2 (start bit) + 3 * 2 (mode) + 2 * 2 (submode) + |
| 678 | * 1 * 2 (customer range bit) + 7/15 * 2 (customer bits) + |
| 679 | * 1 * 2 (toggle bit) + 7 * 2 (address) + 8 * 2 (command) = |
| 680 | * 60 - 76 cells |
| 681 | */ |
| 682 | u8 mode; |
| 683 | u8 toggle; |
| 684 | u16 customer = 0x0; |
| 685 | u8 address; |
| 686 | u8 command; |
| 687 | u32 scancode; |
| 688 | |
| 689 | /* Leader mark */ |
| 690 | while (get_bits(data, 1) && !data->irdata_error) |
| 691 | /* Do nothing */; |
| 692 | |
| 693 | /* Leader space */ |
| 694 | if (get_bits(data, 1)) { |
| 695 | dev_dbg(dev, "RC6 - Invalid leader space\n"); |
| 696 | return; |
| 697 | } |
| 698 | |
| 699 | /* Start bit */ |
| 700 | if (get_bits(data, 2) != 0x02) { |
| 701 | dev_dbg(dev, "RC6 - Invalid start bit\n"); |
| 702 | return; |
| 703 | } |
| 704 | |
| 705 | /* Mode */ |
| 706 | mode = get_bits(data, 6); |
| 707 | switch (mode) { |
| 708 | case 0x15: /* 010101 = b000 */ |
| 709 | mode = 0; |
| 710 | break; |
| 711 | case 0x29: /* 101001 = b110 */ |
| 712 | mode = 6; |
| 713 | break; |
| 714 | default: |
| 715 | dev_dbg(dev, "RC6 - Invalid mode\n"); |
| 716 | return; |
| 717 | } |
| 718 | |
| 719 | /* Toggle bit / Submode bit */ |
| 720 | toggle = get_bits(data, 4); |
| 721 | switch (toggle) { |
| 722 | case 0x03: |
| 723 | toggle = 0; |
| 724 | break; |
| 725 | case 0x0C: |
| 726 | toggle = 1; |
| 727 | break; |
| 728 | default: |
| 729 | dev_dbg(dev, "RC6 - Toggle bit error\n"); |
| 730 | break; |
| 731 | } |
| 732 | |
| 733 | /* Customer */ |
| 734 | if (mode == 6) { |
| 735 | if (toggle != 0) { |
| 736 | dev_dbg(dev, "RC6B - Not Supported\n"); |
| 737 | return; |
| 738 | } |
| 739 | |
| 740 | customer = wbcir_rc6cells_to_byte(data); |
| 741 | |
| 742 | if (customer & 0x80) { |
| 743 | /* 15 bit customer value */ |
| 744 | customer <<= 8; |
| 745 | customer |= wbcir_rc6cells_to_byte(data); |
| 746 | } |
| 747 | } |
| 748 | |
| 749 | /* Address */ |
| 750 | address = wbcir_rc6cells_to_byte(data); |
| 751 | if (mode == 6) { |
| 752 | toggle = address >> 7; |
| 753 | address &= 0x7F; |
| 754 | } |
| 755 | |
| 756 | /* Command */ |
| 757 | command = wbcir_rc6cells_to_byte(data); |
| 758 | |
| 759 | /* Create scancode */ |
| 760 | scancode = command; |
| 761 | scancode |= address << 8; |
| 762 | scancode |= customer << 16; |
| 763 | |
| 764 | /* Last sanity check */ |
| 765 | if (data->irdata_error) { |
| 766 | dev_dbg(dev, "RC6 - Cell error(s)\n"); |
| 767 | return; |
| 768 | } |
| 769 | |
David Härdeman | 93fb84b | 2010-01-28 22:28:27 -0800 | [diff] [blame] | 770 | dev_dbg(dev, "IR-RC6 ad 0x%02X cm 0x%02X cu 0x%04X " |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 771 | "toggle %u mode %u scan 0x%08X\n", |
| 772 | address, |
| 773 | command, |
| 774 | customer, |
| 775 | (unsigned int)toggle, |
| 776 | (unsigned int)mode, |
| 777 | scancode); |
| 778 | |
| 779 | wbcir_keydown(data, scancode, toggle); |
| 780 | } |
| 781 | |
| 782 | static void |
| 783 | wbcir_parse_rc5(struct device *dev, struct wbcir_data *data) |
| 784 | { |
| 785 | /* |
| 786 | * Bits are manchester coded as follows: |
| 787 | * cell1 + cell0 = logic "0" |
| 788 | * cell0 + cell1 = logic "1" |
| 789 | * (i.e. the reverse of RC6) |
| 790 | * |
| 791 | * Start bit 1 - "1" - discarded |
| 792 | * Start bit 2 - Must be inverted to get command bit 6 |
| 793 | * Toggle bit |
| 794 | * Address Bit 4 - 0 |
| 795 | * Command Bit 5 - 0 |
| 796 | */ |
| 797 | u8 toggle; |
| 798 | u8 address; |
| 799 | u8 command; |
| 800 | u32 scancode; |
| 801 | |
| 802 | /* Start bit 1 */ |
| 803 | if (!get_bits(data, 1)) { |
| 804 | dev_dbg(dev, "RC5 - Invalid start bit\n"); |
| 805 | return; |
| 806 | } |
| 807 | |
| 808 | /* Start bit 2 */ |
| 809 | if (!wbcir_get_rc5bits(data, 1)) |
| 810 | command = 0x40; |
| 811 | else |
| 812 | command = 0x00; |
| 813 | |
| 814 | toggle = wbcir_get_rc5bits(data, 1); |
| 815 | address = wbcir_get_rc5bits(data, 5); |
| 816 | command |= wbcir_get_rc5bits(data, 6); |
| 817 | scancode = address << 7 | command; |
| 818 | |
| 819 | /* Last sanity check */ |
| 820 | if (data->irdata_error) { |
| 821 | dev_dbg(dev, "RC5 - Invalid message\n"); |
| 822 | return; |
| 823 | } |
| 824 | |
| 825 | dev_dbg(dev, "IR-RC5 ad %u cm %u t %u s %u\n", |
| 826 | (unsigned int)address, |
| 827 | (unsigned int)command, |
| 828 | (unsigned int)toggle, |
| 829 | (unsigned int)scancode); |
| 830 | |
| 831 | wbcir_keydown(data, scancode, toggle); |
| 832 | } |
| 833 | |
| 834 | static void |
| 835 | wbcir_parse_nec(struct device *dev, struct wbcir_data *data) |
| 836 | { |
| 837 | /* |
| 838 | * Each bit represents 560 us. |
| 839 | * |
| 840 | * Leader - 9 ms burst |
| 841 | * Gap - 4.5 ms silence |
| 842 | * Address1 bit 0 - 7 - Address 1 |
| 843 | * Address2 bit 0 - 7 - Address 2 |
| 844 | * Command1 bit 0 - 7 - Command 1 |
| 845 | * Command2 bit 0 - 7 - Command 2 |
| 846 | * |
| 847 | * Note the bit order! |
| 848 | * |
| 849 | * With the old NEC protocol, Address2 was the inverse of Address1 |
| 850 | * and Command2 was the inverse of Command1 and were used as |
| 851 | * an error check. |
| 852 | * |
| 853 | * With NEC extended, Address1 is the LSB of the Address and |
| 854 | * Address2 is the MSB, Command parsing remains unchanged. |
| 855 | * |
| 856 | * A repeat message is coded as: |
| 857 | * Leader - 9 ms burst |
| 858 | * Gap - 2.25 ms silence |
| 859 | * Repeat - 560 us active |
| 860 | */ |
| 861 | u8 address1; |
| 862 | u8 address2; |
| 863 | u8 command1; |
| 864 | u8 command2; |
| 865 | u16 address; |
| 866 | u32 scancode; |
| 867 | |
| 868 | /* Leader mark */ |
| 869 | while (get_bits(data, 1) && !data->irdata_error) |
| 870 | /* Do nothing */; |
| 871 | |
| 872 | /* Leader space */ |
| 873 | if (get_bits(data, 4)) { |
| 874 | dev_dbg(dev, "NEC - Invalid leader space\n"); |
| 875 | return; |
| 876 | } |
| 877 | |
| 878 | /* Repeat? */ |
| 879 | if (get_bits(data, 1)) { |
| 880 | if (!data->keypressed) { |
| 881 | dev_dbg(dev, "NEC - Stray repeat message\n"); |
| 882 | return; |
| 883 | } |
| 884 | |
| 885 | dev_dbg(dev, "IR-NEC repeat s %u\n", |
| 886 | (unsigned int)data->last_scancode); |
| 887 | |
| 888 | wbcir_keydown(data, data->last_scancode, data->last_toggle); |
| 889 | return; |
| 890 | } |
| 891 | |
| 892 | /* Remaining leader space */ |
| 893 | if (get_bits(data, 3)) { |
| 894 | dev_dbg(dev, "NEC - Invalid leader space\n"); |
| 895 | return; |
| 896 | } |
| 897 | |
| 898 | address1 = bitrev8(get_bits(data, 8)); |
| 899 | address2 = bitrev8(get_bits(data, 8)); |
| 900 | command1 = bitrev8(get_bits(data, 8)); |
| 901 | command2 = bitrev8(get_bits(data, 8)); |
| 902 | |
| 903 | /* Sanity check */ |
| 904 | if (data->irdata_error) { |
| 905 | dev_dbg(dev, "NEC - Invalid message\n"); |
| 906 | return; |
| 907 | } |
| 908 | |
| 909 | /* Check command validity */ |
| 910 | if (command1 != ~command2) { |
| 911 | dev_dbg(dev, "NEC - Command bytes mismatch\n"); |
| 912 | return; |
| 913 | } |
| 914 | |
| 915 | /* Check for extended NEC protocol */ |
| 916 | address = address1; |
| 917 | if (address1 != ~address2) |
| 918 | address |= address2 << 8; |
| 919 | |
| 920 | scancode = address << 8 | command1; |
| 921 | |
| 922 | dev_dbg(dev, "IR-NEC ad %u cm %u s %u\n", |
| 923 | (unsigned int)address, |
| 924 | (unsigned int)command1, |
| 925 | (unsigned int)scancode); |
| 926 | |
| 927 | wbcir_keydown(data, scancode, !data->last_toggle); |
| 928 | } |
| 929 | |
| 930 | |
| 931 | |
| 932 | /***************************************************************************** |
| 933 | * |
| 934 | * INTERRUPT FUNCTIONS |
| 935 | * |
| 936 | *****************************************************************************/ |
| 937 | |
| 938 | static irqreturn_t |
| 939 | wbcir_irq_handler(int irqno, void *cookie) |
| 940 | { |
| 941 | struct pnp_dev *device = cookie; |
| 942 | struct wbcir_data *data = pnp_get_drvdata(device); |
| 943 | struct device *dev = &device->dev; |
| 944 | u8 status; |
| 945 | unsigned long flags; |
| 946 | u8 irdata[8]; |
| 947 | int i; |
| 948 | unsigned int hw; |
| 949 | |
| 950 | spin_lock_irqsave(&wbcir_lock, flags); |
| 951 | |
| 952 | wbcir_select_bank(data, WBCIR_BANK_0); |
| 953 | |
| 954 | status = inb(data->sbase + WBCIR_REG_SP3_EIR); |
| 955 | |
| 956 | if (!(status & (WBCIR_IRQ_RX | WBCIR_IRQ_ERR))) { |
| 957 | spin_unlock_irqrestore(&wbcir_lock, flags); |
| 958 | return IRQ_NONE; |
| 959 | } |
| 960 | |
| 961 | if (status & WBCIR_IRQ_ERR) |
| 962 | data->irdata_error = 1; |
| 963 | |
| 964 | if (!(status & WBCIR_IRQ_RX)) |
| 965 | goto out; |
| 966 | |
| 967 | /* Since RXHDLEV is set, at least 8 bytes are in the FIFO */ |
| 968 | insb(data->sbase + WBCIR_REG_SP3_RXDATA, &irdata[0], 8); |
| 969 | |
| 970 | for (i = 0; i < sizeof(irdata); i++) { |
| 971 | hw = hweight8(irdata[i]); |
| 972 | if (hw > 4) |
| 973 | add_irdata_bit(data, 0); |
| 974 | else |
| 975 | add_irdata_bit(data, 1); |
| 976 | |
| 977 | if (hw == 8) |
| 978 | data->idle_count++; |
| 979 | else |
| 980 | data->idle_count = 0; |
| 981 | } |
| 982 | |
| 983 | if (data->idle_count > WBCIR_MAX_IDLE_BYTES) { |
| 984 | /* Set RXINACTIVE... */ |
| 985 | outb(WBCIR_RX_DISABLE, data->sbase + WBCIR_REG_SP3_ASCR); |
| 986 | |
| 987 | /* ...and drain the FIFO */ |
| 988 | while (inb(data->sbase + WBCIR_REG_SP3_LSR) & WBCIR_RX_AVAIL) |
| 989 | inb(data->sbase + WBCIR_REG_SP3_RXDATA); |
| 990 | |
| 991 | dev_dbg(dev, "IRDATA:\n"); |
| 992 | for (i = 0; i < data->irdata_count; i += BITS_PER_LONG) |
| 993 | dev_dbg(dev, "0x%08lX\n", data->irdata[i/BITS_PER_LONG]); |
| 994 | |
| 995 | switch (protocol) { |
| 996 | case IR_PROTOCOL_RC5: |
| 997 | wbcir_parse_rc5(dev, data); |
| 998 | break; |
| 999 | case IR_PROTOCOL_RC6: |
| 1000 | wbcir_parse_rc6(dev, data); |
| 1001 | break; |
| 1002 | case IR_PROTOCOL_NEC: |
| 1003 | wbcir_parse_nec(dev, data); |
| 1004 | break; |
| 1005 | } |
| 1006 | |
| 1007 | wbcir_reset_irdata(data); |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 1008 | } |
| 1009 | |
| 1010 | out: |
| 1011 | spin_unlock_irqrestore(&wbcir_lock, flags); |
| 1012 | return IRQ_HANDLED; |
| 1013 | } |
| 1014 | |
| 1015 | |
| 1016 | |
| 1017 | /***************************************************************************** |
| 1018 | * |
David Härdeman | 197d4db | 2010-02-24 02:08:29 -0800 | [diff] [blame] | 1019 | * SETUP/INIT/SUSPEND/RESUME FUNCTIONS |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 1020 | * |
| 1021 | *****************************************************************************/ |
| 1022 | |
| 1023 | static void |
| 1024 | wbcir_shutdown(struct pnp_dev *device) |
| 1025 | { |
| 1026 | struct device *dev = &device->dev; |
| 1027 | struct wbcir_data *data = pnp_get_drvdata(device); |
| 1028 | int do_wake = 1; |
| 1029 | u8 match[11]; |
| 1030 | u8 mask[11]; |
| 1031 | u8 rc6_csl = 0; |
| 1032 | int i; |
| 1033 | |
| 1034 | memset(match, 0, sizeof(match)); |
| 1035 | memset(mask, 0, sizeof(mask)); |
| 1036 | |
| 1037 | if (wake_sc == INVALID_SCANCODE || !device_may_wakeup(dev)) { |
| 1038 | do_wake = 0; |
| 1039 | goto finish; |
| 1040 | } |
| 1041 | |
| 1042 | switch (protocol) { |
| 1043 | case IR_PROTOCOL_RC5: |
| 1044 | if (wake_sc > 0xFFF) { |
| 1045 | do_wake = 0; |
| 1046 | dev_err(dev, "RC5 - Invalid wake scancode\n"); |
| 1047 | break; |
| 1048 | } |
| 1049 | |
| 1050 | /* Mask = 13 bits, ex toggle */ |
| 1051 | mask[0] = 0xFF; |
| 1052 | mask[1] = 0x17; |
| 1053 | |
| 1054 | match[0] = (wake_sc & 0x003F); /* 6 command bits */ |
| 1055 | match[0] |= (wake_sc & 0x0180) >> 1; /* 2 address bits */ |
| 1056 | match[1] = (wake_sc & 0x0E00) >> 9; /* 3 address bits */ |
| 1057 | if (!(wake_sc & 0x0040)) /* 2nd start bit */ |
| 1058 | match[1] |= 0x10; |
| 1059 | |
| 1060 | break; |
| 1061 | |
| 1062 | case IR_PROTOCOL_NEC: |
| 1063 | if (wake_sc > 0xFFFFFF) { |
| 1064 | do_wake = 0; |
| 1065 | dev_err(dev, "NEC - Invalid wake scancode\n"); |
| 1066 | break; |
| 1067 | } |
| 1068 | |
| 1069 | mask[0] = mask[1] = mask[2] = mask[3] = 0xFF; |
| 1070 | |
| 1071 | match[1] = bitrev8((wake_sc & 0xFF)); |
| 1072 | match[0] = ~match[1]; |
| 1073 | |
| 1074 | match[3] = bitrev8((wake_sc & 0xFF00) >> 8); |
| 1075 | if (wake_sc > 0xFFFF) |
| 1076 | match[2] = bitrev8((wake_sc & 0xFF0000) >> 16); |
| 1077 | else |
| 1078 | match[2] = ~match[3]; |
| 1079 | |
| 1080 | break; |
| 1081 | |
| 1082 | case IR_PROTOCOL_RC6: |
| 1083 | |
| 1084 | if (wake_rc6mode == 0) { |
| 1085 | if (wake_sc > 0xFFFF) { |
| 1086 | do_wake = 0; |
| 1087 | dev_err(dev, "RC6 - Invalid wake scancode\n"); |
| 1088 | break; |
| 1089 | } |
| 1090 | |
| 1091 | /* Command */ |
| 1092 | match[0] = wbcir_to_rc6cells(wake_sc >> 0); |
| 1093 | mask[0] = 0xFF; |
| 1094 | match[1] = wbcir_to_rc6cells(wake_sc >> 4); |
| 1095 | mask[1] = 0xFF; |
| 1096 | |
| 1097 | /* Address */ |
| 1098 | match[2] = wbcir_to_rc6cells(wake_sc >> 8); |
| 1099 | mask[2] = 0xFF; |
| 1100 | match[3] = wbcir_to_rc6cells(wake_sc >> 12); |
| 1101 | mask[3] = 0xFF; |
| 1102 | |
| 1103 | /* Header */ |
| 1104 | match[4] = 0x50; /* mode1 = mode0 = 0, ignore toggle */ |
| 1105 | mask[4] = 0xF0; |
| 1106 | match[5] = 0x09; /* start bit = 1, mode2 = 0 */ |
| 1107 | mask[5] = 0x0F; |
| 1108 | |
| 1109 | rc6_csl = 44; |
| 1110 | |
| 1111 | } else if (wake_rc6mode == 6) { |
| 1112 | i = 0; |
| 1113 | |
| 1114 | /* Command */ |
| 1115 | match[i] = wbcir_to_rc6cells(wake_sc >> 0); |
| 1116 | mask[i++] = 0xFF; |
| 1117 | match[i] = wbcir_to_rc6cells(wake_sc >> 4); |
| 1118 | mask[i++] = 0xFF; |
| 1119 | |
| 1120 | /* Address + Toggle */ |
| 1121 | match[i] = wbcir_to_rc6cells(wake_sc >> 8); |
| 1122 | mask[i++] = 0xFF; |
| 1123 | match[i] = wbcir_to_rc6cells(wake_sc >> 12); |
| 1124 | mask[i++] = 0x3F; |
| 1125 | |
| 1126 | /* Customer bits 7 - 0 */ |
| 1127 | match[i] = wbcir_to_rc6cells(wake_sc >> 16); |
| 1128 | mask[i++] = 0xFF; |
| 1129 | match[i] = wbcir_to_rc6cells(wake_sc >> 20); |
| 1130 | mask[i++] = 0xFF; |
| 1131 | |
| 1132 | if (wake_sc & 0x80000000) { |
| 1133 | /* Customer range bit and bits 15 - 8 */ |
| 1134 | match[i] = wbcir_to_rc6cells(wake_sc >> 24); |
| 1135 | mask[i++] = 0xFF; |
| 1136 | match[i] = wbcir_to_rc6cells(wake_sc >> 28); |
| 1137 | mask[i++] = 0xFF; |
| 1138 | rc6_csl = 76; |
| 1139 | } else if (wake_sc <= 0x007FFFFF) { |
| 1140 | rc6_csl = 60; |
| 1141 | } else { |
| 1142 | do_wake = 0; |
| 1143 | dev_err(dev, "RC6 - Invalid wake scancode\n"); |
| 1144 | break; |
| 1145 | } |
| 1146 | |
| 1147 | /* Header */ |
| 1148 | match[i] = 0x93; /* mode1 = mode0 = 1, submode = 0 */ |
| 1149 | mask[i++] = 0xFF; |
| 1150 | match[i] = 0x0A; /* start bit = 1, mode2 = 1 */ |
| 1151 | mask[i++] = 0x0F; |
| 1152 | |
| 1153 | } else { |
| 1154 | do_wake = 0; |
| 1155 | dev_err(dev, "RC6 - Invalid wake mode\n"); |
| 1156 | } |
| 1157 | |
| 1158 | break; |
| 1159 | |
| 1160 | default: |
| 1161 | do_wake = 0; |
| 1162 | break; |
| 1163 | } |
| 1164 | |
| 1165 | finish: |
| 1166 | if (do_wake) { |
| 1167 | /* Set compare and compare mask */ |
| 1168 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_INDEX, |
| 1169 | WBCIR_REGSEL_COMPARE | WBCIR_REG_ADDR0, |
| 1170 | 0x3F); |
| 1171 | outsb(data->wbase + WBCIR_REG_WCEIR_DATA, match, 11); |
| 1172 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_INDEX, |
| 1173 | WBCIR_REGSEL_MASK | WBCIR_REG_ADDR0, |
| 1174 | 0x3F); |
| 1175 | outsb(data->wbase + WBCIR_REG_WCEIR_DATA, mask, 11); |
| 1176 | |
| 1177 | /* RC6 Compare String Len */ |
| 1178 | outb(rc6_csl, data->wbase + WBCIR_REG_WCEIR_CSL); |
| 1179 | |
| 1180 | /* Clear status bits NEC_REP, BUFF, MSG_END, MATCH */ |
| 1181 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_STS, 0x17, 0x17); |
| 1182 | |
| 1183 | /* Clear BUFF_EN, Clear END_EN, Set MATCH_EN */ |
| 1184 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_EV_EN, 0x01, 0x07); |
| 1185 | |
| 1186 | /* Set CEIR_EN */ |
| 1187 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_CTL, 0x01, 0x01); |
| 1188 | |
| 1189 | } else { |
| 1190 | /* Clear BUFF_EN, Clear END_EN, Clear MATCH_EN */ |
| 1191 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_EV_EN, 0x00, 0x07); |
| 1192 | |
| 1193 | /* Clear CEIR_EN */ |
| 1194 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_CTL, 0x00, 0x01); |
| 1195 | } |
| 1196 | |
| 1197 | /* Disable interrupts */ |
David Härdeman | 197d4db | 2010-02-24 02:08:29 -0800 | [diff] [blame] | 1198 | wbcir_select_bank(data, WBCIR_BANK_0); |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 1199 | outb(WBCIR_IRQ_NONE, data->sbase + WBCIR_REG_SP3_IER); |
David Härdeman | 197d4db | 2010-02-24 02:08:29 -0800 | [diff] [blame] | 1200 | |
| 1201 | /* |
| 1202 | * ACPI will set the HW disable bit for SP3 which means that the |
| 1203 | * output signals are left in an undefined state which may cause |
| 1204 | * spurious interrupts which we need to ignore until the hardware |
| 1205 | * is reinitialized. |
| 1206 | */ |
| 1207 | disable_irq(data->irq); |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 1208 | } |
| 1209 | |
| 1210 | static int |
| 1211 | wbcir_suspend(struct pnp_dev *device, pm_message_t state) |
| 1212 | { |
| 1213 | wbcir_shutdown(device); |
| 1214 | return 0; |
| 1215 | } |
| 1216 | |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 1217 | static void |
David Härdeman | 197d4db | 2010-02-24 02:08:29 -0800 | [diff] [blame] | 1218 | wbcir_init_hw(struct wbcir_data *data) |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 1219 | { |
| 1220 | u8 tmp; |
| 1221 | |
David Härdeman | 197d4db | 2010-02-24 02:08:29 -0800 | [diff] [blame] | 1222 | /* Disable interrupts */ |
| 1223 | wbcir_select_bank(data, WBCIR_BANK_0); |
| 1224 | outb(WBCIR_IRQ_NONE, data->sbase + WBCIR_REG_SP3_IER); |
| 1225 | |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 1226 | /* Set PROT_SEL, RX_INV, Clear CEIR_EN (needed for the led) */ |
| 1227 | tmp = protocol << 4; |
| 1228 | if (invert) |
| 1229 | tmp |= 0x08; |
| 1230 | outb(tmp, data->wbase + WBCIR_REG_WCEIR_CTL); |
| 1231 | |
| 1232 | /* Clear status bits NEC_REP, BUFF, MSG_END, MATCH */ |
| 1233 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_STS, 0x17, 0x17); |
| 1234 | |
| 1235 | /* Clear BUFF_EN, Clear END_EN, Clear MATCH_EN */ |
| 1236 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_EV_EN, 0x00, 0x07); |
| 1237 | |
| 1238 | /* Set RC5 cell time to correspond to 36 kHz */ |
| 1239 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_CFG1, 0x4A, 0x7F); |
| 1240 | |
| 1241 | /* Set IRTX_INV */ |
| 1242 | if (invert) |
| 1243 | outb(0x04, data->ebase + WBCIR_REG_ECEIR_CCTL); |
| 1244 | else |
| 1245 | outb(0x00, data->ebase + WBCIR_REG_ECEIR_CCTL); |
| 1246 | |
| 1247 | /* |
| 1248 | * Clear IR LED, set SP3 clock to 24Mhz |
| 1249 | * set SP3_IRRX_SW to binary 01, helpfully not documented |
| 1250 | */ |
| 1251 | outb(0x10, data->ebase + WBCIR_REG_ECEIR_CTS); |
David Härdeman | 197d4db | 2010-02-24 02:08:29 -0800 | [diff] [blame] | 1252 | |
| 1253 | /* Enable extended mode */ |
| 1254 | wbcir_select_bank(data, WBCIR_BANK_2); |
| 1255 | outb(WBCIR_EXT_ENABLE, data->sbase + WBCIR_REG_SP3_EXCR1); |
| 1256 | |
| 1257 | /* |
| 1258 | * Configure baud generator, IR data will be sampled at |
| 1259 | * a bitrate of: (24Mhz * prescaler) / (divisor * 16). |
| 1260 | * |
| 1261 | * The ECIR registers include a flag to change the |
| 1262 | * 24Mhz clock freq to 48Mhz. |
| 1263 | * |
| 1264 | * It's not documented in the specs, but fifo levels |
| 1265 | * other than 16 seems to be unsupported. |
| 1266 | */ |
| 1267 | |
| 1268 | /* prescaler 1.0, tx/rx fifo lvl 16 */ |
| 1269 | outb(0x30, data->sbase + WBCIR_REG_SP3_EXCR2); |
| 1270 | |
| 1271 | /* Set baud divisor to generate one byte per bit/cell */ |
| 1272 | switch (protocol) { |
| 1273 | case IR_PROTOCOL_RC5: |
| 1274 | outb(0xA7, data->sbase + WBCIR_REG_SP3_BGDL); |
| 1275 | break; |
| 1276 | case IR_PROTOCOL_RC6: |
| 1277 | outb(0x53, data->sbase + WBCIR_REG_SP3_BGDL); |
| 1278 | break; |
| 1279 | case IR_PROTOCOL_NEC: |
| 1280 | outb(0x69, data->sbase + WBCIR_REG_SP3_BGDL); |
| 1281 | break; |
| 1282 | } |
| 1283 | outb(0x00, data->sbase + WBCIR_REG_SP3_BGDH); |
| 1284 | |
| 1285 | /* Set CEIR mode */ |
| 1286 | wbcir_select_bank(data, WBCIR_BANK_0); |
| 1287 | outb(0xC0, data->sbase + WBCIR_REG_SP3_MCR); |
| 1288 | inb(data->sbase + WBCIR_REG_SP3_LSR); /* Clear LSR */ |
| 1289 | inb(data->sbase + WBCIR_REG_SP3_MSR); /* Clear MSR */ |
| 1290 | |
| 1291 | /* Disable RX demod, run-length encoding/decoding, set freq span */ |
| 1292 | wbcir_select_bank(data, WBCIR_BANK_7); |
| 1293 | outb(0x10, data->sbase + WBCIR_REG_SP3_RCCFG); |
| 1294 | |
| 1295 | /* Disable timer */ |
| 1296 | wbcir_select_bank(data, WBCIR_BANK_4); |
| 1297 | outb(0x00, data->sbase + WBCIR_REG_SP3_IRCR1); |
| 1298 | |
| 1299 | /* Enable MSR interrupt, Clear AUX_IRX */ |
| 1300 | wbcir_select_bank(data, WBCIR_BANK_5); |
| 1301 | outb(0x00, data->sbase + WBCIR_REG_SP3_IRCR2); |
| 1302 | |
| 1303 | /* Disable CRC */ |
| 1304 | wbcir_select_bank(data, WBCIR_BANK_6); |
| 1305 | outb(0x20, data->sbase + WBCIR_REG_SP3_IRCR3); |
| 1306 | |
| 1307 | /* Set RX/TX (de)modulation freq, not really used */ |
| 1308 | wbcir_select_bank(data, WBCIR_BANK_7); |
| 1309 | outb(0xF2, data->sbase + WBCIR_REG_SP3_IRRXDC); |
| 1310 | outb(0x69, data->sbase + WBCIR_REG_SP3_IRTXMC); |
| 1311 | |
| 1312 | /* Set invert and pin direction */ |
| 1313 | if (invert) |
| 1314 | outb(0x10, data->sbase + WBCIR_REG_SP3_IRCFG4); |
| 1315 | else |
| 1316 | outb(0x00, data->sbase + WBCIR_REG_SP3_IRCFG4); |
| 1317 | |
| 1318 | /* Set FIFO thresholds (RX = 8, TX = 3), reset RX/TX */ |
| 1319 | wbcir_select_bank(data, WBCIR_BANK_0); |
| 1320 | outb(0x97, data->sbase + WBCIR_REG_SP3_FCR); |
| 1321 | |
| 1322 | /* Clear AUX status bits */ |
| 1323 | outb(0xE0, data->sbase + WBCIR_REG_SP3_ASCR); |
| 1324 | |
| 1325 | /* Enable interrupts */ |
| 1326 | wbcir_reset_irdata(data); |
| 1327 | outb(WBCIR_IRQ_RX | WBCIR_IRQ_ERR, data->sbase + WBCIR_REG_SP3_IER); |
| 1328 | } |
| 1329 | |
| 1330 | static int |
| 1331 | wbcir_resume(struct pnp_dev *device) |
| 1332 | { |
| 1333 | struct wbcir_data *data = pnp_get_drvdata(device); |
| 1334 | |
| 1335 | wbcir_init_hw(data); |
| 1336 | enable_irq(data->irq); |
| 1337 | |
| 1338 | return 0; |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 1339 | } |
| 1340 | |
| 1341 | static int __devinit |
| 1342 | wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id) |
| 1343 | { |
| 1344 | struct device *dev = &device->dev; |
| 1345 | struct wbcir_data *data; |
| 1346 | int err; |
| 1347 | |
| 1348 | if (!(pnp_port_len(device, 0) == EHFUNC_IOMEM_LEN && |
| 1349 | pnp_port_len(device, 1) == WAKEUP_IOMEM_LEN && |
| 1350 | pnp_port_len(device, 2) == SP_IOMEM_LEN)) { |
| 1351 | dev_err(dev, "Invalid resources\n"); |
| 1352 | return -ENODEV; |
| 1353 | } |
| 1354 | |
| 1355 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
| 1356 | if (!data) { |
| 1357 | err = -ENOMEM; |
| 1358 | goto exit; |
| 1359 | } |
| 1360 | |
| 1361 | pnp_set_drvdata(device, data); |
| 1362 | |
| 1363 | data->ebase = pnp_port_start(device, 0); |
| 1364 | data->wbase = pnp_port_start(device, 1); |
| 1365 | data->sbase = pnp_port_start(device, 2); |
| 1366 | data->irq = pnp_irq(device, 0); |
| 1367 | |
| 1368 | if (data->wbase == 0 || data->ebase == 0 || |
| 1369 | data->sbase == 0 || data->irq == 0) { |
| 1370 | err = -ENODEV; |
| 1371 | dev_err(dev, "Invalid resources\n"); |
| 1372 | goto exit_free_data; |
| 1373 | } |
| 1374 | |
| 1375 | dev_dbg(&device->dev, "Found device " |
| 1376 | "(w: 0x%lX, e: 0x%lX, s: 0x%lX, i: %u)\n", |
| 1377 | data->wbase, data->ebase, data->sbase, data->irq); |
| 1378 | |
| 1379 | if (!request_region(data->wbase, WAKEUP_IOMEM_LEN, DRVNAME)) { |
| 1380 | dev_err(dev, "Region 0x%lx-0x%lx already in use!\n", |
| 1381 | data->wbase, data->wbase + WAKEUP_IOMEM_LEN - 1); |
| 1382 | err = -EBUSY; |
| 1383 | goto exit_free_data; |
| 1384 | } |
| 1385 | |
| 1386 | if (!request_region(data->ebase, EHFUNC_IOMEM_LEN, DRVNAME)) { |
| 1387 | dev_err(dev, "Region 0x%lx-0x%lx already in use!\n", |
| 1388 | data->ebase, data->ebase + EHFUNC_IOMEM_LEN - 1); |
| 1389 | err = -EBUSY; |
| 1390 | goto exit_release_wbase; |
| 1391 | } |
| 1392 | |
| 1393 | if (!request_region(data->sbase, SP_IOMEM_LEN, DRVNAME)) { |
| 1394 | dev_err(dev, "Region 0x%lx-0x%lx already in use!\n", |
| 1395 | data->sbase, data->sbase + SP_IOMEM_LEN - 1); |
| 1396 | err = -EBUSY; |
| 1397 | goto exit_release_ebase; |
| 1398 | } |
| 1399 | |
| 1400 | err = request_irq(data->irq, wbcir_irq_handler, |
| 1401 | IRQF_DISABLED, DRVNAME, device); |
| 1402 | if (err) { |
| 1403 | dev_err(dev, "Failed to claim IRQ %u\n", data->irq); |
| 1404 | err = -EBUSY; |
| 1405 | goto exit_release_sbase; |
| 1406 | } |
| 1407 | |
| 1408 | led_trigger_register_simple("cir-tx", &data->txtrigger); |
| 1409 | if (!data->txtrigger) { |
| 1410 | err = -ENOMEM; |
| 1411 | goto exit_free_irq; |
| 1412 | } |
| 1413 | |
| 1414 | led_trigger_register_simple("cir-rx", &data->rxtrigger); |
| 1415 | if (!data->rxtrigger) { |
| 1416 | err = -ENOMEM; |
| 1417 | goto exit_unregister_txtrigger; |
| 1418 | } |
| 1419 | |
| 1420 | data->led.name = "cir::activity"; |
| 1421 | data->led.default_trigger = "cir-rx"; |
| 1422 | data->led.brightness_set = wbcir_led_brightness_set; |
| 1423 | data->led.brightness_get = wbcir_led_brightness_get; |
| 1424 | err = led_classdev_register(&device->dev, &data->led); |
| 1425 | if (err) |
| 1426 | goto exit_unregister_rxtrigger; |
| 1427 | |
| 1428 | data->input_dev = input_allocate_device(); |
| 1429 | if (!data->input_dev) { |
| 1430 | err = -ENOMEM; |
| 1431 | goto exit_unregister_led; |
| 1432 | } |
| 1433 | |
| 1434 | data->input_dev->evbit[0] = BIT(EV_KEY); |
| 1435 | data->input_dev->name = WBCIR_NAME; |
| 1436 | data->input_dev->phys = "wbcir/cir0"; |
| 1437 | data->input_dev->id.bustype = BUS_HOST; |
| 1438 | data->input_dev->id.vendor = PCI_VENDOR_ID_WINBOND; |
| 1439 | data->input_dev->id.product = WBCIR_ID_FAMILY; |
| 1440 | data->input_dev->id.version = WBCIR_ID_CHIP; |
| 1441 | data->input_dev->getkeycode = wbcir_getkeycode; |
| 1442 | data->input_dev->setkeycode = wbcir_setkeycode; |
| 1443 | input_set_capability(data->input_dev, EV_MSC, MSC_SCAN); |
| 1444 | input_set_drvdata(data->input_dev, data); |
| 1445 | |
| 1446 | err = input_register_device(data->input_dev); |
| 1447 | if (err) |
| 1448 | goto exit_free_input; |
| 1449 | |
| 1450 | data->last_scancode = INVALID_SCANCODE; |
| 1451 | INIT_LIST_HEAD(&data->keytable); |
| 1452 | setup_timer(&data->timer_keyup, wbcir_keyup, (unsigned long)data); |
| 1453 | |
| 1454 | /* Load default keymaps */ |
| 1455 | if (protocol == IR_PROTOCOL_RC6) { |
| 1456 | int i; |
| 1457 | for (i = 0; i < ARRAY_SIZE(rc6_def_keymap); i++) { |
| 1458 | err = wbcir_setkeycode(data->input_dev, |
| 1459 | (int)rc6_def_keymap[i].scancode, |
| 1460 | (int)rc6_def_keymap[i].keycode); |
| 1461 | if (err) |
| 1462 | goto exit_unregister_keys; |
| 1463 | } |
| 1464 | } |
| 1465 | |
| 1466 | device_init_wakeup(&device->dev, 1); |
| 1467 | |
David Härdeman | 197d4db | 2010-02-24 02:08:29 -0800 | [diff] [blame] | 1468 | wbcir_init_hw(data); |
David Härdeman | e258b80 | 2009-09-21 17:04:53 -0700 | [diff] [blame] | 1469 | |
| 1470 | return 0; |
| 1471 | |
| 1472 | exit_unregister_keys: |
| 1473 | if (!list_empty(&data->keytable)) { |
| 1474 | struct wbcir_keyentry *key; |
| 1475 | struct wbcir_keyentry *keytmp; |
| 1476 | |
| 1477 | list_for_each_entry_safe(key, keytmp, &data->keytable, list) { |
| 1478 | list_del(&key->list); |
| 1479 | kfree(key); |
| 1480 | } |
| 1481 | } |
| 1482 | input_unregister_device(data->input_dev); |
| 1483 | /* Can't call input_free_device on an unregistered device */ |
| 1484 | data->input_dev = NULL; |
| 1485 | exit_free_input: |
| 1486 | input_free_device(data->input_dev); |
| 1487 | exit_unregister_led: |
| 1488 | led_classdev_unregister(&data->led); |
| 1489 | exit_unregister_rxtrigger: |
| 1490 | led_trigger_unregister_simple(data->rxtrigger); |
| 1491 | exit_unregister_txtrigger: |
| 1492 | led_trigger_unregister_simple(data->txtrigger); |
| 1493 | exit_free_irq: |
| 1494 | free_irq(data->irq, device); |
| 1495 | exit_release_sbase: |
| 1496 | release_region(data->sbase, SP_IOMEM_LEN); |
| 1497 | exit_release_ebase: |
| 1498 | release_region(data->ebase, EHFUNC_IOMEM_LEN); |
| 1499 | exit_release_wbase: |
| 1500 | release_region(data->wbase, WAKEUP_IOMEM_LEN); |
| 1501 | exit_free_data: |
| 1502 | kfree(data); |
| 1503 | pnp_set_drvdata(device, NULL); |
| 1504 | exit: |
| 1505 | return err; |
| 1506 | } |
| 1507 | |
| 1508 | static void __devexit |
| 1509 | wbcir_remove(struct pnp_dev *device) |
| 1510 | { |
| 1511 | struct wbcir_data *data = pnp_get_drvdata(device); |
| 1512 | struct wbcir_keyentry *key; |
| 1513 | struct wbcir_keyentry *keytmp; |
| 1514 | |
| 1515 | /* Disable interrupts */ |
| 1516 | wbcir_select_bank(data, WBCIR_BANK_0); |
| 1517 | outb(WBCIR_IRQ_NONE, data->sbase + WBCIR_REG_SP3_IER); |
| 1518 | |
| 1519 | del_timer_sync(&data->timer_keyup); |
| 1520 | |
| 1521 | free_irq(data->irq, device); |
| 1522 | |
| 1523 | /* Clear status bits NEC_REP, BUFF, MSG_END, MATCH */ |
| 1524 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_STS, 0x17, 0x17); |
| 1525 | |
| 1526 | /* Clear CEIR_EN */ |
| 1527 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_CTL, 0x00, 0x01); |
| 1528 | |
| 1529 | /* Clear BUFF_EN, END_EN, MATCH_EN */ |
| 1530 | wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_EV_EN, 0x00, 0x07); |
| 1531 | |
| 1532 | /* This will generate a keyup event if necessary */ |
| 1533 | input_unregister_device(data->input_dev); |
| 1534 | |
| 1535 | led_trigger_unregister_simple(data->rxtrigger); |
| 1536 | led_trigger_unregister_simple(data->txtrigger); |
| 1537 | led_classdev_unregister(&data->led); |
| 1538 | |
| 1539 | /* This is ok since &data->led isn't actually used */ |
| 1540 | wbcir_led_brightness_set(&data->led, LED_OFF); |
| 1541 | |
| 1542 | release_region(data->wbase, WAKEUP_IOMEM_LEN); |
| 1543 | release_region(data->ebase, EHFUNC_IOMEM_LEN); |
| 1544 | release_region(data->sbase, SP_IOMEM_LEN); |
| 1545 | |
| 1546 | list_for_each_entry_safe(key, keytmp, &data->keytable, list) { |
| 1547 | list_del(&key->list); |
| 1548 | kfree(key); |
| 1549 | } |
| 1550 | |
| 1551 | kfree(data); |
| 1552 | |
| 1553 | pnp_set_drvdata(device, NULL); |
| 1554 | } |
| 1555 | |
| 1556 | static const struct pnp_device_id wbcir_ids[] = { |
| 1557 | { "WEC1022", 0 }, |
| 1558 | { "", 0 } |
| 1559 | }; |
| 1560 | MODULE_DEVICE_TABLE(pnp, wbcir_ids); |
| 1561 | |
| 1562 | static struct pnp_driver wbcir_driver = { |
| 1563 | .name = WBCIR_NAME, |
| 1564 | .id_table = wbcir_ids, |
| 1565 | .probe = wbcir_probe, |
| 1566 | .remove = __devexit_p(wbcir_remove), |
| 1567 | .suspend = wbcir_suspend, |
| 1568 | .resume = wbcir_resume, |
| 1569 | .shutdown = wbcir_shutdown |
| 1570 | }; |
| 1571 | |
| 1572 | static int __init |
| 1573 | wbcir_init(void) |
| 1574 | { |
| 1575 | int ret; |
| 1576 | |
| 1577 | switch (protocol) { |
| 1578 | case IR_PROTOCOL_RC5: |
| 1579 | case IR_PROTOCOL_NEC: |
| 1580 | case IR_PROTOCOL_RC6: |
| 1581 | break; |
| 1582 | default: |
| 1583 | printk(KERN_ERR DRVNAME ": Invalid protocol argument\n"); |
| 1584 | return -EINVAL; |
| 1585 | } |
| 1586 | |
| 1587 | ret = pnp_register_driver(&wbcir_driver); |
| 1588 | if (ret) |
| 1589 | printk(KERN_ERR DRVNAME ": Unable to register driver\n"); |
| 1590 | |
| 1591 | return ret; |
| 1592 | } |
| 1593 | |
| 1594 | static void __exit |
| 1595 | wbcir_exit(void) |
| 1596 | { |
| 1597 | pnp_unregister_driver(&wbcir_driver); |
| 1598 | } |
| 1599 | |
| 1600 | MODULE_AUTHOR("David Härdeman <david@hardeman.nu>"); |
| 1601 | MODULE_DESCRIPTION("Winbond SuperI/O Consumer IR Driver"); |
| 1602 | MODULE_LICENSE("GPL"); |
| 1603 | |
| 1604 | module_init(wbcir_init); |
| 1605 | module_exit(wbcir_exit); |
| 1606 | |
| 1607 | |