Leo (Hao) Chen | 266dead | 2009-10-09 19:13:08 -0700 | [diff] [blame] | 1 | /***************************************************************************** |
| 2 | * Copyright 2004 - 2009 Broadcom Corporation. All rights reserved. |
| 3 | * |
| 4 | * Unless you and Broadcom execute a separate written software license |
| 5 | * agreement governing use of this software, this software is licensed to you |
| 6 | * under the terms of the GNU General Public License version 2, available at |
| 7 | * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). |
| 8 | * |
| 9 | * Notwithstanding the above, under no circumstances may you combine this |
| 10 | * software in any way with any other Broadcom software provided under a |
| 11 | * license other than the GPL, without Broadcom's express prior written |
| 12 | * consent. |
| 13 | *****************************************************************************/ |
| 14 | |
| 15 | /* ---- Include Files ---------------------------------------------------- */ |
| 16 | #include <linux/version.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/types.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/kernel.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame^] | 21 | #include <linux/slab.h> |
Leo (Hao) Chen | 266dead | 2009-10-09 19:13:08 -0700 | [diff] [blame] | 22 | #include <linux/string.h> |
| 23 | #include <linux/ioport.h> |
| 24 | #include <linux/device.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/err.h> |
| 27 | #include <linux/io.h> |
| 28 | #include <linux/platform_device.h> |
| 29 | #include <linux/mtd/mtd.h> |
| 30 | #include <linux/mtd/nand.h> |
| 31 | #include <linux/mtd/nand_ecc.h> |
| 32 | #include <linux/mtd/partitions.h> |
| 33 | |
| 34 | #include <asm/mach-types.h> |
| 35 | #include <asm/system.h> |
| 36 | |
| 37 | #include <mach/reg_nand.h> |
| 38 | #include <mach/reg_umi.h> |
| 39 | |
| 40 | #include "nand_bcm_umi.h" |
| 41 | |
| 42 | #include <mach/memory_settings.h> |
| 43 | |
| 44 | #define USE_DMA 1 |
| 45 | #include <mach/dma.h> |
| 46 | #include <linux/dma-mapping.h> |
| 47 | #include <linux/completion.h> |
| 48 | |
| 49 | /* ---- External Variable Declarations ----------------------------------- */ |
| 50 | /* ---- External Function Prototypes ------------------------------------- */ |
| 51 | /* ---- Public Variables ------------------------------------------------- */ |
| 52 | /* ---- Private Constants and Types -------------------------------------- */ |
| 53 | static const __devinitconst char gBanner[] = KERN_INFO \ |
| 54 | "BCM UMI MTD NAND Driver: 1.00\n"; |
| 55 | |
| 56 | #ifdef CONFIG_MTD_PARTITIONS |
| 57 | const char *part_probes[] = { "cmdlinepart", NULL }; |
| 58 | #endif |
| 59 | |
| 60 | #if NAND_ECC_BCH |
| 61 | static uint8_t scan_ff_pattern[] = { 0xff }; |
| 62 | |
| 63 | static struct nand_bbt_descr largepage_bbt = { |
| 64 | .options = 0, |
| 65 | .offs = 0, |
| 66 | .len = 1, |
| 67 | .pattern = scan_ff_pattern |
| 68 | }; |
| 69 | #endif |
| 70 | |
| 71 | /* |
| 72 | ** Preallocate a buffer to avoid having to do this every dma operation. |
| 73 | ** This is the size of the preallocated coherent DMA buffer. |
| 74 | */ |
| 75 | #if USE_DMA |
| 76 | #define DMA_MIN_BUFLEN 512 |
| 77 | #define DMA_MAX_BUFLEN PAGE_SIZE |
| 78 | #define USE_DIRECT_IO(len) (((len) < DMA_MIN_BUFLEN) || \ |
| 79 | ((len) > DMA_MAX_BUFLEN)) |
| 80 | |
| 81 | /* |
| 82 | * The current NAND data space goes from 0x80001900 to 0x80001FFF, |
| 83 | * which is only 0x700 = 1792 bytes long. This is too small for 2K, 4K page |
| 84 | * size NAND flash. Need to break the DMA down to multiple 1Ks. |
| 85 | * |
| 86 | * Need to make sure REG_NAND_DATA_PADDR + DMA_MAX_LEN < 0x80002000 |
| 87 | */ |
| 88 | #define DMA_MAX_LEN 1024 |
| 89 | |
| 90 | #else /* !USE_DMA */ |
| 91 | #define DMA_MIN_BUFLEN 0 |
| 92 | #define DMA_MAX_BUFLEN 0 |
| 93 | #define USE_DIRECT_IO(len) 1 |
| 94 | #endif |
| 95 | /* ---- Private Function Prototypes -------------------------------------- */ |
| 96 | static void bcm_umi_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len); |
| 97 | static void bcm_umi_nand_write_buf(struct mtd_info *mtd, const u_char * buf, |
| 98 | int len); |
| 99 | |
| 100 | /* ---- Private Variables ------------------------------------------------ */ |
| 101 | static struct mtd_info *board_mtd; |
| 102 | static void __iomem *bcm_umi_io_base; |
| 103 | static void *virtPtr; |
| 104 | static dma_addr_t physPtr; |
| 105 | static struct completion nand_comp; |
| 106 | |
| 107 | /* ---- Private Functions ------------------------------------------------ */ |
| 108 | #if NAND_ECC_BCH |
| 109 | #include "bcm_umi_bch.c" |
| 110 | #else |
| 111 | #include "bcm_umi_hamming.c" |
| 112 | #endif |
| 113 | |
| 114 | #if USE_DMA |
| 115 | |
| 116 | /* Handler called when the DMA finishes. */ |
| 117 | static void nand_dma_handler(DMA_Device_t dev, int reason, void *userData) |
| 118 | { |
| 119 | complete(&nand_comp); |
| 120 | } |
| 121 | |
| 122 | static int nand_dma_init(void) |
| 123 | { |
| 124 | int rc; |
| 125 | |
| 126 | rc = dma_set_device_handler(DMA_DEVICE_NAND_MEM_TO_MEM, |
| 127 | nand_dma_handler, NULL); |
| 128 | if (rc != 0) { |
| 129 | printk(KERN_ERR "dma_set_device_handler failed: %d\n", rc); |
| 130 | return rc; |
| 131 | } |
| 132 | |
| 133 | virtPtr = |
| 134 | dma_alloc_coherent(NULL, DMA_MAX_BUFLEN, &physPtr, GFP_KERNEL); |
| 135 | if (virtPtr == NULL) { |
| 136 | printk(KERN_ERR "NAND - Failed to allocate memory for DMA buffer\n"); |
| 137 | return -ENOMEM; |
| 138 | } |
| 139 | |
| 140 | return 0; |
| 141 | } |
| 142 | |
| 143 | static void nand_dma_term(void) |
| 144 | { |
| 145 | if (virtPtr != NULL) |
| 146 | dma_free_coherent(NULL, DMA_MAX_BUFLEN, virtPtr, physPtr); |
| 147 | } |
| 148 | |
| 149 | static void nand_dma_read(void *buf, int len) |
| 150 | { |
| 151 | int offset = 0; |
| 152 | int tmp_len = 0; |
| 153 | int len_left = len; |
| 154 | DMA_Handle_t hndl; |
| 155 | |
| 156 | if (virtPtr == NULL) |
| 157 | panic("nand_dma_read: virtPtr == NULL\n"); |
| 158 | |
| 159 | if ((void *)physPtr == NULL) |
| 160 | panic("nand_dma_read: physPtr == NULL\n"); |
| 161 | |
| 162 | hndl = dma_request_channel(DMA_DEVICE_NAND_MEM_TO_MEM); |
| 163 | if (hndl < 0) { |
| 164 | printk(KERN_ERR |
| 165 | "nand_dma_read: unable to allocate dma channel: %d\n", |
| 166 | (int)hndl); |
| 167 | panic("\n"); |
| 168 | } |
| 169 | |
| 170 | while (len_left > 0) { |
| 171 | if (len_left > DMA_MAX_LEN) { |
| 172 | tmp_len = DMA_MAX_LEN; |
| 173 | len_left -= DMA_MAX_LEN; |
| 174 | } else { |
| 175 | tmp_len = len_left; |
| 176 | len_left = 0; |
| 177 | } |
| 178 | |
| 179 | init_completion(&nand_comp); |
| 180 | dma_transfer_mem_to_mem(hndl, REG_NAND_DATA_PADDR, |
| 181 | physPtr + offset, tmp_len); |
| 182 | wait_for_completion(&nand_comp); |
| 183 | |
| 184 | offset += tmp_len; |
| 185 | } |
| 186 | |
| 187 | dma_free_channel(hndl); |
| 188 | |
| 189 | if (buf != NULL) |
| 190 | memcpy(buf, virtPtr, len); |
| 191 | } |
| 192 | |
| 193 | static void nand_dma_write(const void *buf, int len) |
| 194 | { |
| 195 | int offset = 0; |
| 196 | int tmp_len = 0; |
| 197 | int len_left = len; |
| 198 | DMA_Handle_t hndl; |
| 199 | |
| 200 | if (buf == NULL) |
| 201 | panic("nand_dma_write: buf == NULL\n"); |
| 202 | |
| 203 | if (virtPtr == NULL) |
| 204 | panic("nand_dma_write: virtPtr == NULL\n"); |
| 205 | |
| 206 | if ((void *)physPtr == NULL) |
| 207 | panic("nand_dma_write: physPtr == NULL\n"); |
| 208 | |
| 209 | memcpy(virtPtr, buf, len); |
| 210 | |
| 211 | |
| 212 | hndl = dma_request_channel(DMA_DEVICE_NAND_MEM_TO_MEM); |
| 213 | if (hndl < 0) { |
| 214 | printk(KERN_ERR |
| 215 | "nand_dma_write: unable to allocate dma channel: %d\n", |
| 216 | (int)hndl); |
| 217 | panic("\n"); |
| 218 | } |
| 219 | |
| 220 | while (len_left > 0) { |
| 221 | if (len_left > DMA_MAX_LEN) { |
| 222 | tmp_len = DMA_MAX_LEN; |
| 223 | len_left -= DMA_MAX_LEN; |
| 224 | } else { |
| 225 | tmp_len = len_left; |
| 226 | len_left = 0; |
| 227 | } |
| 228 | |
| 229 | init_completion(&nand_comp); |
| 230 | dma_transfer_mem_to_mem(hndl, physPtr + offset, |
| 231 | REG_NAND_DATA_PADDR, tmp_len); |
| 232 | wait_for_completion(&nand_comp); |
| 233 | |
| 234 | offset += tmp_len; |
| 235 | } |
| 236 | |
| 237 | dma_free_channel(hndl); |
| 238 | } |
| 239 | |
| 240 | #endif |
| 241 | |
| 242 | static int nand_dev_ready(struct mtd_info *mtd) |
| 243 | { |
| 244 | return nand_bcm_umi_dev_ready(); |
| 245 | } |
| 246 | |
| 247 | /**************************************************************************** |
| 248 | * |
| 249 | * bcm_umi_nand_inithw |
| 250 | * |
| 251 | * This routine does the necessary hardware (board-specific) |
| 252 | * initializations. This includes setting up the timings, etc. |
| 253 | * |
| 254 | ***************************************************************************/ |
| 255 | int bcm_umi_nand_inithw(void) |
| 256 | { |
| 257 | /* Configure nand timing parameters */ |
| 258 | REG_UMI_NAND_TCR &= ~0x7ffff; |
| 259 | REG_UMI_NAND_TCR |= HW_CFG_NAND_TCR; |
| 260 | |
| 261 | #if !defined(CONFIG_MTD_NAND_BCM_UMI_HWCS) |
| 262 | /* enable software control of CS */ |
| 263 | REG_UMI_NAND_TCR |= REG_UMI_NAND_TCR_CS_SWCTRL; |
| 264 | #endif |
| 265 | |
| 266 | /* keep NAND chip select asserted */ |
| 267 | REG_UMI_NAND_RCSR |= REG_UMI_NAND_RCSR_CS_ASSERTED; |
| 268 | |
| 269 | REG_UMI_NAND_TCR &= ~REG_UMI_NAND_TCR_WORD16; |
| 270 | /* enable writes to flash */ |
| 271 | REG_UMI_MMD_ICR |= REG_UMI_MMD_ICR_FLASH_WP; |
| 272 | |
| 273 | writel(NAND_CMD_RESET, bcm_umi_io_base + REG_NAND_CMD_OFFSET); |
| 274 | nand_bcm_umi_wait_till_ready(); |
| 275 | |
| 276 | #if NAND_ECC_BCH |
| 277 | nand_bcm_umi_bch_config_ecc(NAND_ECC_NUM_BYTES); |
| 278 | #endif |
| 279 | |
| 280 | return 0; |
| 281 | } |
| 282 | |
| 283 | /* Used to turn latch the proper register for access. */ |
| 284 | static void bcm_umi_nand_hwcontrol(struct mtd_info *mtd, int cmd, |
| 285 | unsigned int ctrl) |
| 286 | { |
| 287 | /* send command to hardware */ |
| 288 | struct nand_chip *chip = mtd->priv; |
| 289 | if (ctrl & NAND_CTRL_CHANGE) { |
| 290 | if (ctrl & NAND_CLE) { |
| 291 | chip->IO_ADDR_W = bcm_umi_io_base + REG_NAND_CMD_OFFSET; |
| 292 | goto CMD; |
| 293 | } |
| 294 | if (ctrl & NAND_ALE) { |
| 295 | chip->IO_ADDR_W = |
| 296 | bcm_umi_io_base + REG_NAND_ADDR_OFFSET; |
| 297 | goto CMD; |
| 298 | } |
| 299 | chip->IO_ADDR_W = bcm_umi_io_base + REG_NAND_DATA8_OFFSET; |
| 300 | } |
| 301 | |
| 302 | CMD: |
| 303 | /* Send command to chip directly */ |
| 304 | if (cmd != NAND_CMD_NONE) |
| 305 | writeb(cmd, chip->IO_ADDR_W); |
| 306 | } |
| 307 | |
| 308 | static void bcm_umi_nand_write_buf(struct mtd_info *mtd, const u_char * buf, |
| 309 | int len) |
| 310 | { |
| 311 | if (USE_DIRECT_IO(len)) { |
| 312 | /* Do it the old way if the buffer is small or too large. |
| 313 | * Probably quicker than starting and checking dma. */ |
| 314 | int i; |
| 315 | struct nand_chip *this = mtd->priv; |
| 316 | |
| 317 | for (i = 0; i < len; i++) |
| 318 | writeb(buf[i], this->IO_ADDR_W); |
| 319 | } |
| 320 | #if USE_DMA |
| 321 | else |
| 322 | nand_dma_write(buf, len); |
| 323 | #endif |
| 324 | } |
| 325 | |
| 326 | static void bcm_umi_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len) |
| 327 | { |
| 328 | if (USE_DIRECT_IO(len)) { |
| 329 | int i; |
| 330 | struct nand_chip *this = mtd->priv; |
| 331 | |
| 332 | for (i = 0; i < len; i++) |
| 333 | buf[i] = readb(this->IO_ADDR_R); |
| 334 | } |
| 335 | #if USE_DMA |
| 336 | else |
| 337 | nand_dma_read(buf, len); |
| 338 | #endif |
| 339 | } |
| 340 | |
| 341 | static uint8_t readbackbuf[NAND_MAX_PAGESIZE]; |
| 342 | static int bcm_umi_nand_verify_buf(struct mtd_info *mtd, const u_char * buf, |
| 343 | int len) |
| 344 | { |
| 345 | /* |
| 346 | * Try to readback page with ECC correction. This is necessary |
| 347 | * for MLC parts which may have permanently stuck bits. |
| 348 | */ |
| 349 | struct nand_chip *chip = mtd->priv; |
| 350 | int ret = chip->ecc.read_page(mtd, chip, readbackbuf, 0); |
| 351 | if (ret < 0) |
| 352 | return -EFAULT; |
| 353 | else { |
| 354 | if (memcmp(readbackbuf, buf, len) == 0) |
| 355 | return 0; |
| 356 | |
| 357 | return -EFAULT; |
| 358 | } |
| 359 | return 0; |
| 360 | } |
| 361 | |
| 362 | static int __devinit bcm_umi_nand_probe(struct platform_device *pdev) |
| 363 | { |
| 364 | struct nand_chip *this; |
| 365 | struct resource *r; |
| 366 | int err = 0; |
| 367 | |
| 368 | printk(gBanner); |
| 369 | |
| 370 | /* Allocate memory for MTD device structure and private data */ |
| 371 | board_mtd = |
| 372 | kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), |
| 373 | GFP_KERNEL); |
| 374 | if (!board_mtd) { |
| 375 | printk(KERN_WARNING |
| 376 | "Unable to allocate NAND MTD device structure.\n"); |
| 377 | return -ENOMEM; |
| 378 | } |
| 379 | |
| 380 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 381 | |
| 382 | if (!r) |
| 383 | return -ENXIO; |
| 384 | |
Daniel Mack | 3ad2f3f | 2010-02-03 08:01:28 +0800 | [diff] [blame] | 385 | /* map physical address */ |
Leo (Hao) Chen | 266dead | 2009-10-09 19:13:08 -0700 | [diff] [blame] | 386 | bcm_umi_io_base = ioremap(r->start, r->end - r->start + 1); |
| 387 | |
| 388 | if (!bcm_umi_io_base) { |
| 389 | printk(KERN_ERR "ioremap to access BCM UMI NAND chip failed\n"); |
| 390 | kfree(board_mtd); |
| 391 | return -EIO; |
| 392 | } |
| 393 | |
| 394 | /* Get pointer to private data */ |
| 395 | this = (struct nand_chip *)(&board_mtd[1]); |
| 396 | |
| 397 | /* Initialize structures */ |
| 398 | memset((char *)board_mtd, 0, sizeof(struct mtd_info)); |
| 399 | memset((char *)this, 0, sizeof(struct nand_chip)); |
| 400 | |
| 401 | /* Link the private data with the MTD structure */ |
| 402 | board_mtd->priv = this; |
| 403 | |
| 404 | /* Initialize the NAND hardware. */ |
| 405 | if (bcm_umi_nand_inithw() < 0) { |
| 406 | printk(KERN_ERR "BCM UMI NAND chip could not be initialized\n"); |
| 407 | iounmap(bcm_umi_io_base); |
| 408 | kfree(board_mtd); |
| 409 | return -EIO; |
| 410 | } |
| 411 | |
| 412 | /* Set address of NAND IO lines */ |
| 413 | this->IO_ADDR_W = bcm_umi_io_base + REG_NAND_DATA8_OFFSET; |
| 414 | this->IO_ADDR_R = bcm_umi_io_base + REG_NAND_DATA8_OFFSET; |
| 415 | |
| 416 | /* Set command delay time, see datasheet for correct value */ |
| 417 | this->chip_delay = 0; |
| 418 | /* Assign the device ready function, if available */ |
| 419 | this->dev_ready = nand_dev_ready; |
| 420 | this->options = 0; |
| 421 | |
| 422 | this->write_buf = bcm_umi_nand_write_buf; |
| 423 | this->read_buf = bcm_umi_nand_read_buf; |
| 424 | this->verify_buf = bcm_umi_nand_verify_buf; |
| 425 | |
| 426 | this->cmd_ctrl = bcm_umi_nand_hwcontrol; |
| 427 | this->ecc.mode = NAND_ECC_HW; |
| 428 | this->ecc.size = 512; |
| 429 | this->ecc.bytes = NAND_ECC_NUM_BYTES; |
| 430 | #if NAND_ECC_BCH |
| 431 | this->ecc.read_page = bcm_umi_bch_read_page_hwecc; |
| 432 | this->ecc.write_page = bcm_umi_bch_write_page_hwecc; |
| 433 | #else |
| 434 | this->ecc.correct = nand_correct_data512; |
| 435 | this->ecc.calculate = bcm_umi_hamming_get_hw_ecc; |
| 436 | this->ecc.hwctl = bcm_umi_hamming_enable_hwecc; |
| 437 | #endif |
| 438 | |
| 439 | #if USE_DMA |
| 440 | err = nand_dma_init(); |
| 441 | if (err != 0) |
| 442 | return err; |
| 443 | #endif |
| 444 | |
| 445 | /* Figure out the size of the device that we have. |
| 446 | * We need to do this to figure out which ECC |
| 447 | * layout we'll be using. |
| 448 | */ |
| 449 | |
| 450 | err = nand_scan_ident(board_mtd, 1); |
| 451 | if (err) { |
| 452 | printk(KERN_ERR "nand_scan failed: %d\n", err); |
| 453 | iounmap(bcm_umi_io_base); |
| 454 | kfree(board_mtd); |
| 455 | return err; |
| 456 | } |
| 457 | |
| 458 | /* Now that we know the nand size, we can setup the ECC layout */ |
| 459 | |
| 460 | switch (board_mtd->writesize) { /* writesize is the pagesize */ |
| 461 | case 4096: |
| 462 | this->ecc.layout = &nand_hw_eccoob_4096; |
| 463 | break; |
| 464 | case 2048: |
| 465 | this->ecc.layout = &nand_hw_eccoob_2048; |
| 466 | break; |
| 467 | case 512: |
| 468 | this->ecc.layout = &nand_hw_eccoob_512; |
| 469 | break; |
| 470 | default: |
| 471 | { |
| 472 | printk(KERN_ERR "NAND - Unrecognized pagesize: %d\n", |
| 473 | board_mtd->writesize); |
| 474 | return -EINVAL; |
| 475 | } |
| 476 | } |
| 477 | |
| 478 | #if NAND_ECC_BCH |
| 479 | if (board_mtd->writesize > 512) { |
| 480 | if (this->options & NAND_USE_FLASH_BBT) |
| 481 | largepage_bbt.options = NAND_BBT_SCAN2NDPAGE; |
| 482 | this->badblock_pattern = &largepage_bbt; |
| 483 | } |
| 484 | #endif |
| 485 | |
| 486 | /* Now finish off the scan, now that ecc.layout has been initialized. */ |
| 487 | |
| 488 | err = nand_scan_tail(board_mtd); |
| 489 | if (err) { |
| 490 | printk(KERN_ERR "nand_scan failed: %d\n", err); |
| 491 | iounmap(bcm_umi_io_base); |
| 492 | kfree(board_mtd); |
| 493 | return err; |
| 494 | } |
| 495 | |
| 496 | /* Register the partitions */ |
| 497 | { |
| 498 | int nr_partitions; |
| 499 | struct mtd_partition *partition_info; |
| 500 | |
| 501 | board_mtd->name = "bcm_umi-nand"; |
| 502 | nr_partitions = |
| 503 | parse_mtd_partitions(board_mtd, part_probes, |
| 504 | &partition_info, 0); |
| 505 | |
| 506 | if (nr_partitions <= 0) { |
| 507 | printk(KERN_ERR "BCM UMI NAND: Too few partitions - %d\n", |
| 508 | nr_partitions); |
| 509 | iounmap(bcm_umi_io_base); |
| 510 | kfree(board_mtd); |
| 511 | return -EIO; |
| 512 | } |
| 513 | add_mtd_partitions(board_mtd, partition_info, nr_partitions); |
| 514 | } |
| 515 | |
| 516 | /* Return happy */ |
| 517 | return 0; |
| 518 | } |
| 519 | |
| 520 | static int bcm_umi_nand_remove(struct platform_device *pdev) |
| 521 | { |
| 522 | #if USE_DMA |
| 523 | nand_dma_term(); |
| 524 | #endif |
| 525 | |
| 526 | /* Release resources, unregister device */ |
| 527 | nand_release(board_mtd); |
| 528 | |
Daniel Mack | 3ad2f3f | 2010-02-03 08:01:28 +0800 | [diff] [blame] | 529 | /* unmap physical address */ |
Leo (Hao) Chen | 266dead | 2009-10-09 19:13:08 -0700 | [diff] [blame] | 530 | iounmap(bcm_umi_io_base); |
| 531 | |
| 532 | /* Free the MTD device structure */ |
| 533 | kfree(board_mtd); |
| 534 | |
| 535 | return 0; |
| 536 | } |
| 537 | |
| 538 | #ifdef CONFIG_PM |
| 539 | static int bcm_umi_nand_suspend(struct platform_device *pdev, |
| 540 | pm_message_t state) |
| 541 | { |
| 542 | printk(KERN_ERR "MTD NAND suspend is being called\n"); |
| 543 | return 0; |
| 544 | } |
| 545 | |
| 546 | static int bcm_umi_nand_resume(struct platform_device *pdev) |
| 547 | { |
| 548 | printk(KERN_ERR "MTD NAND resume is being called\n"); |
| 549 | return 0; |
| 550 | } |
| 551 | #else |
| 552 | #define bcm_umi_nand_suspend NULL |
| 553 | #define bcm_umi_nand_resume NULL |
| 554 | #endif |
| 555 | |
| 556 | static struct platform_driver nand_driver = { |
| 557 | .driver = { |
| 558 | .name = "bcm-nand", |
| 559 | .owner = THIS_MODULE, |
| 560 | }, |
| 561 | .probe = bcm_umi_nand_probe, |
| 562 | .remove = bcm_umi_nand_remove, |
| 563 | .suspend = bcm_umi_nand_suspend, |
| 564 | .resume = bcm_umi_nand_resume, |
| 565 | }; |
| 566 | |
| 567 | static int __init nand_init(void) |
| 568 | { |
| 569 | return platform_driver_register(&nand_driver); |
| 570 | } |
| 571 | |
| 572 | static void __exit nand_exit(void) |
| 573 | { |
| 574 | platform_driver_unregister(&nand_driver); |
| 575 | } |
| 576 | |
| 577 | module_init(nand_init); |
| 578 | module_exit(nand_exit); |
| 579 | |
| 580 | MODULE_LICENSE("GPL"); |
| 581 | MODULE_AUTHOR("Broadcom"); |
| 582 | MODULE_DESCRIPTION("BCM UMI MTD NAND driver"); |