David Collins | dba7baf | 2017-03-10 11:48:37 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <dt-bindings/spmi/spmi.h> |
| 14 | #include <dt-bindings/interrupt-controller/irq.h> |
| 15 | |
| 16 | &spmi_bus { |
| 17 | qcom,pm8998@0 { |
| 18 | compatible = "qcom,spmi-pmic"; |
| 19 | reg = <0x0 SPMI_USID>; |
| 20 | #address-cells = <2>; |
| 21 | #size-cells = <0>; |
| 22 | |
| 23 | pm8998_revid: qcom,revid@100 { |
| 24 | compatible = "qcom,qpnp-revid"; |
| 25 | reg = <0x100 0x100>; |
| 26 | }; |
| 27 | |
| 28 | qcom,power-on@800 { |
| 29 | compatible = "qcom,qpnp-power-on"; |
| 30 | reg = <0x800 0x100>; |
| 31 | interrupts = <0x0 0x8 0x0 IRQ_TYPE_NONE>, |
| 32 | <0x0 0x8 0x1 IRQ_TYPE_NONE>, |
| 33 | <0x0 0x8 0x4 IRQ_TYPE_NONE>, |
| 34 | <0x0 0x8 0x5 IRQ_TYPE_NONE>; |
| 35 | interrupt-names = "kpdpwr", "resin", |
| 36 | "resin-bark", "kpdpwr-resin-bark"; |
| 37 | qcom,pon-dbc-delay = <15625>; |
| 38 | qcom,system-reset; |
| 39 | qcom,store-hard-reset-reason; |
| 40 | |
| 41 | qcom,pon_1 { |
| 42 | qcom,pon-type = <0>; |
| 43 | qcom,pull-up = <1>; |
| 44 | linux,code = <116>; |
| 45 | qcom,support-reset = <1>; |
| 46 | qcom,s1-timer = <10256>; |
| 47 | qcom,s2-timer = <2000>; |
| 48 | qcom,s2-type = <1>; |
| 49 | }; |
| 50 | |
| 51 | qcom,pon_2 { |
| 52 | qcom,pon-type = <1>; |
| 53 | qcom,pull-up = <1>; |
| 54 | linux,code = <114>; |
| 55 | }; |
| 56 | |
| 57 | qcom,pon_3 { |
| 58 | qcom,pon-type = <3>; |
| 59 | qcom,support-reset = <1>; |
| 60 | qcom,pull-up = <1>; |
| 61 | qcom,s1-timer = <6720>; |
| 62 | qcom,s2-timer = <2000>; |
| 63 | qcom,s2-type = <7>; |
| 64 | qcom,use-bark; |
| 65 | }; |
| 66 | }; |
| 67 | |
| 68 | qcom,temp-alarm@2400 { |
| 69 | compatible = "qcom,qpnp-temp-alarm"; |
| 70 | reg = <0x2400 0x100>; |
| 71 | interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; |
| 72 | label = "pm8998_tz"; |
| 73 | }; |
| 74 | |
| 75 | pm8998_gpios: gpios { |
| 76 | compatible = "qcom,qpnp-pin"; |
| 77 | gpio-controller; |
| 78 | #gpio-cells = <2>; |
| 79 | #address-cells = <1>; |
| 80 | #size-cells = <1>; |
| 81 | label = "pm8998-gpio"; |
| 82 | |
| 83 | gpio@c000 { |
| 84 | reg = <0xc000 0x100>; |
| 85 | qcom,pin-num = <1>; |
| 86 | status = "disabled"; |
| 87 | }; |
| 88 | |
| 89 | gpio@c100 { |
| 90 | reg = <0xc100 0x100>; |
| 91 | qcom,pin-num = <2>; |
| 92 | status = "disabled"; |
| 93 | }; |
| 94 | |
| 95 | gpio@c200 { |
| 96 | reg = <0xc200 0x100>; |
| 97 | qcom,pin-num = <3>; |
| 98 | status = "disabled"; |
| 99 | }; |
| 100 | |
| 101 | gpio@c300 { |
| 102 | reg = <0xc300 0x100>; |
| 103 | qcom,pin-num = <4>; |
| 104 | status = "disabled"; |
| 105 | }; |
| 106 | |
| 107 | gpio@c400 { |
| 108 | reg = <0xc400 0x100>; |
| 109 | qcom,pin-num = <5>; |
| 110 | status = "disabled"; |
| 111 | }; |
| 112 | |
| 113 | gpio@c500 { |
| 114 | reg = <0xc500 0x100>; |
| 115 | qcom,pin-num = <6>; |
| 116 | status = "disabled"; |
| 117 | }; |
| 118 | |
| 119 | gpio@c600 { |
| 120 | reg = <0xc600 0x100>; |
| 121 | qcom,pin-num = <7>; |
| 122 | status = "disabled"; |
| 123 | }; |
| 124 | |
| 125 | gpio@c700 { |
| 126 | reg = <0xc700 0x100>; |
| 127 | qcom,pin-num = <8>; |
| 128 | status = "disabled"; |
| 129 | }; |
| 130 | |
| 131 | gpio@c800 { |
| 132 | reg = <0xc800 0x100>; |
| 133 | qcom,pin-num = <9>; |
| 134 | status = "disabled"; |
| 135 | }; |
| 136 | |
| 137 | gpio@c900 { |
| 138 | reg = <0xc900 0x100>; |
| 139 | qcom,pin-num = <10>; |
| 140 | status = "disabled"; |
| 141 | }; |
| 142 | |
| 143 | gpio@ca00 { |
| 144 | reg = <0xca00 0x100>; |
| 145 | qcom,pin-num = <11>; |
| 146 | status = "disabled"; |
| 147 | }; |
| 148 | |
| 149 | gpio@cb00 { |
| 150 | reg = <0xcb00 0x100>; |
| 151 | qcom,pin-num = <12>; |
| 152 | status = "disabled"; |
| 153 | }; |
| 154 | |
| 155 | gpio@cc00 { |
| 156 | reg = <0xcc00 0x100>; |
| 157 | qcom,pin-num = <13>; |
| 158 | status = "disabled"; |
| 159 | }; |
| 160 | |
| 161 | gpio@cd00 { |
| 162 | reg = <0xcd00 0x100>; |
| 163 | qcom,pin-num = <14>; |
| 164 | status = "disabled"; |
| 165 | }; |
| 166 | |
| 167 | gpio@ce00 { |
| 168 | reg = <0xce00 0x100>; |
| 169 | qcom,pin-num = <15>; |
| 170 | status = "disabled"; |
| 171 | }; |
| 172 | |
| 173 | gpio@cf00 { |
| 174 | reg = <0xcf00 0x100>; |
| 175 | qcom,pin-num = <16>; |
| 176 | status = "disabled"; |
| 177 | }; |
| 178 | |
| 179 | gpio@d000 { |
| 180 | reg = <0xd000 0x100>; |
| 181 | qcom,pin-num = <17>; |
| 182 | status = "disabled"; |
| 183 | }; |
| 184 | |
| 185 | gpio@d100 { |
| 186 | reg = <0xd100 0x100>; |
| 187 | qcom,pin-num = <18>; |
| 188 | status = "disabled"; |
| 189 | }; |
| 190 | |
| 191 | gpio@d200 { |
| 192 | reg = <0xd200 0x100>; |
| 193 | qcom,pin-num = <19>; |
| 194 | status = "disabled"; |
| 195 | }; |
| 196 | |
| 197 | gpio@d300 { |
| 198 | reg = <0xd300 0x100>; |
| 199 | qcom,pin-num = <20>; |
| 200 | status = "disabled"; |
| 201 | }; |
| 202 | |
| 203 | gpio@d400 { |
| 204 | reg = <0xd400 0x100>; |
| 205 | qcom,pin-num = <21>; |
| 206 | status = "disabled"; |
| 207 | }; |
| 208 | |
| 209 | gpio@d500 { |
| 210 | reg = <0xd500 0x100>; |
| 211 | qcom,pin-num = <22>; |
| 212 | status = "disabled"; |
| 213 | }; |
| 214 | |
| 215 | gpio@d600 { |
| 216 | reg = <0xd600 0x100>; |
| 217 | qcom,pin-num = <23>; |
| 218 | status = "disabled"; |
| 219 | }; |
| 220 | |
| 221 | gpio@d700 { |
| 222 | reg = <0xd700 0x100>; |
| 223 | qcom,pin-num = <24>; |
| 224 | status = "disabled"; |
| 225 | }; |
| 226 | |
| 227 | gpio@d800 { |
| 228 | reg = <0xd800 0x100>; |
| 229 | qcom,pin-num = <25>; |
| 230 | status = "disabled"; |
| 231 | }; |
| 232 | |
| 233 | gpio@d900 { |
| 234 | reg = <0xd900 0x100>; |
| 235 | qcom,pin-num = <26>; |
| 236 | status = "disabled"; |
| 237 | }; |
| 238 | }; |
| 239 | |
| 240 | pm8998_coincell: qcom,coincell@2800 { |
| 241 | compatible = "qcom,qpnp-coincell"; |
| 242 | reg = <0x2800 0x100>; |
| 243 | }; |
| 244 | |
| 245 | pm8998_rtc: qcom,pm8998_rtc { |
| 246 | compatible = "qcom,qpnp-rtc"; |
| 247 | #address-cells = <1>; |
| 248 | #size-cells = <1>; |
| 249 | qcom,qpnp-rtc-write = <0>; |
| 250 | qcom,qpnp-rtc-alarm-pwrup = <0>; |
| 251 | |
| 252 | qcom,pm8998_rtc_rw@6000 { |
| 253 | reg = <0x6000 0x100>; |
| 254 | }; |
| 255 | qcom,pm8998_rtc_alarm@6100 { |
| 256 | reg = <0x6100 0x100>; |
| 257 | interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; |
| 258 | }; |
| 259 | }; |
| 260 | |
| 261 | pm8998_vadc: vadc@3100 { |
| 262 | compatible = "qcom,qpnp-vadc-hc"; |
| 263 | reg = <0x3100 0x100>; |
| 264 | #address-cells = <1>; |
| 265 | #size-cells = <0>; |
| 266 | interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; |
| 267 | interrupt-names = "eoc-int-en-set"; |
| 268 | qcom,adc-bit-resolution = <15>; |
| 269 | qcom,adc-vdd-reference = <1875>; |
| 270 | |
| 271 | chan@6 { |
| 272 | label = "die_temp"; |
| 273 | reg = <6>; |
| 274 | qcom,decimation = <2>; |
| 275 | qcom,pre-div-channel-scaling = <0>; |
| 276 | qcom,calibration-type = "absolute"; |
| 277 | qcom,scale-function = <3>; |
| 278 | qcom,hw-settle-time = <0>; |
| 279 | qcom,fast-avg-setup = <0>; |
| 280 | qcom,cal-val = <0>; |
| 281 | }; |
| 282 | |
| 283 | chan@0 { |
| 284 | label = "ref_gnd"; |
| 285 | reg = <0>; |
| 286 | qcom,decimation = <2>; |
| 287 | qcom,pre-div-channel-scaling = <0>; |
| 288 | qcom,calibration-type = "absolute"; |
| 289 | qcom,scale-function = <0>; |
| 290 | qcom,hw-settle-time = <0>; |
| 291 | qcom,fast-avg-setup = <0>; |
| 292 | qcom,cal-val = <0>; |
| 293 | }; |
| 294 | |
| 295 | chan@1 { |
| 296 | label = "ref_1250v"; |
| 297 | reg = <1>; |
| 298 | qcom,decimation = <2>; |
| 299 | qcom,pre-div-channel-scaling = <0>; |
| 300 | qcom,calibration-type = "absolute"; |
| 301 | qcom,scale-function = <0>; |
| 302 | qcom,hw-settle-time = <0>; |
| 303 | qcom,fast-avg-setup = <0>; |
| 304 | qcom,cal-val = <0>; |
| 305 | }; |
| 306 | }; |
| 307 | |
| 308 | pm8998_adc_tm: vadc@3400 { |
| 309 | compatible = "qcom,qpnp-adc-tm-hc"; |
| 310 | reg = <0x3400 0x100>; |
| 311 | #address-cells = <1>; |
| 312 | #size-cells = <0>; |
| 313 | interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; |
| 314 | interrupt-names = "eoc-int-en-set"; |
| 315 | qcom,adc-bit-resolution = <15>; |
| 316 | qcom,adc-vdd-reference = <1875>; |
| 317 | qcom,adc_tm-vadc = <&pm8998_vadc>; |
| 318 | qcom,decimation = <0>; |
| 319 | qcom,fast-avg-setup = <0>; |
| 320 | }; |
| 321 | }; |
| 322 | |
| 323 | qcom,pm8998@1 { |
| 324 | compatible ="qcom,spmi-pmic"; |
| 325 | reg = <0x1 SPMI_USID>; |
| 326 | #address-cells = <2>; |
| 327 | #size-cells = <0>; |
| 328 | }; |
| 329 | }; |