Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Red Hat |
| 3 | * Author: Rob Clark <robdclark@gmail.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published by |
| 7 | * the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #include "msm_drv.h" |
| 19 | #include "msm_kms.h" |
| 20 | #include "msm_gem.h" |
| 21 | |
| 22 | struct msm_commit { |
Rob Clark | 0b776d4 | 2015-01-30 17:04:45 -0500 | [diff] [blame] | 23 | struct drm_device *dev; |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 24 | struct drm_atomic_state *state; |
| 25 | uint32_t fence; |
| 26 | struct msm_fence_cb fence_cb; |
Rob Clark | f86afec | 2014-11-25 12:41:18 -0500 | [diff] [blame] | 27 | uint32_t crtc_mask; |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 28 | }; |
| 29 | |
| 30 | static void fence_cb(struct msm_fence_cb *cb); |
| 31 | |
Rob Clark | f86afec | 2014-11-25 12:41:18 -0500 | [diff] [blame] | 32 | /* block until specified crtcs are no longer pending update, and |
| 33 | * atomically mark them as pending update |
| 34 | */ |
| 35 | static int start_atomic(struct msm_drm_private *priv, uint32_t crtc_mask) |
| 36 | { |
| 37 | int ret; |
| 38 | |
| 39 | spin_lock(&priv->pending_crtcs_event.lock); |
| 40 | ret = wait_event_interruptible_locked(priv->pending_crtcs_event, |
| 41 | !(priv->pending_crtcs & crtc_mask)); |
| 42 | if (ret == 0) { |
| 43 | DBG("start: %08x", crtc_mask); |
| 44 | priv->pending_crtcs |= crtc_mask; |
| 45 | } |
| 46 | spin_unlock(&priv->pending_crtcs_event.lock); |
| 47 | |
| 48 | return ret; |
| 49 | } |
| 50 | |
| 51 | /* clear specified crtcs (no longer pending update) |
| 52 | */ |
| 53 | static void end_atomic(struct msm_drm_private *priv, uint32_t crtc_mask) |
| 54 | { |
| 55 | spin_lock(&priv->pending_crtcs_event.lock); |
| 56 | DBG("end: %08x", crtc_mask); |
| 57 | priv->pending_crtcs &= ~crtc_mask; |
| 58 | wake_up_all_locked(&priv->pending_crtcs_event); |
| 59 | spin_unlock(&priv->pending_crtcs_event.lock); |
| 60 | } |
| 61 | |
Rob Clark | 0b776d4 | 2015-01-30 17:04:45 -0500 | [diff] [blame] | 62 | static struct msm_commit *commit_init(struct drm_atomic_state *state) |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 63 | { |
| 64 | struct msm_commit *c = kzalloc(sizeof(*c), GFP_KERNEL); |
| 65 | |
| 66 | if (!c) |
| 67 | return NULL; |
| 68 | |
Rob Clark | 0b776d4 | 2015-01-30 17:04:45 -0500 | [diff] [blame] | 69 | c->dev = state->dev; |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 70 | c->state = state; |
Rob Clark | 0b776d4 | 2015-01-30 17:04:45 -0500 | [diff] [blame] | 71 | |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 72 | /* TODO we might need a way to indicate to run the cb on a |
| 73 | * different wq so wait_for_vblanks() doesn't block retiring |
| 74 | * bo's.. |
| 75 | */ |
| 76 | INIT_FENCE_CB(&c->fence_cb, fence_cb); |
| 77 | |
| 78 | return c; |
| 79 | } |
| 80 | |
Rob Clark | 0b776d4 | 2015-01-30 17:04:45 -0500 | [diff] [blame] | 81 | static void commit_destroy(struct msm_commit *c) |
| 82 | { |
| 83 | end_atomic(c->dev->dev_private, c->crtc_mask); |
| 84 | kfree(c); |
| 85 | } |
| 86 | |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 87 | /* The (potentially) asynchronous part of the commit. At this point |
| 88 | * nothing can fail short of armageddon. |
| 89 | */ |
| 90 | static void complete_commit(struct msm_commit *c) |
| 91 | { |
| 92 | struct drm_atomic_state *state = c->state; |
| 93 | struct drm_device *dev = state->dev; |
Rob Clark | 0b776d4 | 2015-01-30 17:04:45 -0500 | [diff] [blame] | 94 | struct msm_drm_private *priv = dev->dev_private; |
| 95 | struct msm_kms *kms = priv->kms; |
| 96 | |
| 97 | kms->funcs->prepare_commit(kms, state); |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 98 | |
| 99 | drm_atomic_helper_commit_pre_planes(dev, state); |
| 100 | |
| 101 | drm_atomic_helper_commit_planes(dev, state); |
| 102 | |
| 103 | drm_atomic_helper_commit_post_planes(dev, state); |
| 104 | |
Rob Clark | f86afec | 2014-11-25 12:41:18 -0500 | [diff] [blame] | 105 | /* NOTE: _wait_for_vblanks() only waits for vblank on |
| 106 | * enabled CRTCs. So we end up faulting when disabling |
| 107 | * due to (potentially) unref'ing the outgoing fb's |
| 108 | * before the vblank when the disable has latched. |
| 109 | * |
| 110 | * But if it did wait on disabled (or newly disabled) |
| 111 | * CRTCs, that would be racy (ie. we could have missed |
| 112 | * the irq. We need some way to poll for pipe shut |
| 113 | * down. Or just live with occasionally hitting the |
| 114 | * timeout in the CRTC disable path (which really should |
| 115 | * not be critical path) |
| 116 | */ |
| 117 | |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 118 | drm_atomic_helper_wait_for_vblanks(dev, state); |
| 119 | |
| 120 | drm_atomic_helper_cleanup_planes(dev, state); |
| 121 | |
Rob Clark | 0b776d4 | 2015-01-30 17:04:45 -0500 | [diff] [blame] | 122 | kms->funcs->complete_commit(kms, state); |
| 123 | |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 124 | drm_atomic_state_free(state); |
| 125 | |
Rob Clark | 0b776d4 | 2015-01-30 17:04:45 -0500 | [diff] [blame] | 126 | commit_destroy(c); |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 127 | } |
| 128 | |
| 129 | static void fence_cb(struct msm_fence_cb *cb) |
| 130 | { |
| 131 | struct msm_commit *c = |
| 132 | container_of(cb, struct msm_commit, fence_cb); |
| 133 | complete_commit(c); |
| 134 | } |
| 135 | |
| 136 | static void add_fb(struct msm_commit *c, struct drm_framebuffer *fb) |
| 137 | { |
| 138 | struct drm_gem_object *obj = msm_framebuffer_bo(fb, 0); |
| 139 | c->fence = max(c->fence, msm_gem_fence(to_msm_bo(obj), MSM_PREP_READ)); |
| 140 | } |
| 141 | |
| 142 | |
Daniel Vetter | b4274fb | 2014-11-26 17:02:18 +0100 | [diff] [blame] | 143 | int msm_atomic_check(struct drm_device *dev, |
| 144 | struct drm_atomic_state *state) |
| 145 | { |
| 146 | int ret; |
| 147 | |
| 148 | /* |
| 149 | * msm ->atomic_check can update ->mode_changed for pixel format |
| 150 | * changes, hence must be run before we check the modeset changes. |
| 151 | */ |
| 152 | ret = drm_atomic_helper_check_planes(dev, state); |
| 153 | if (ret) |
| 154 | return ret; |
| 155 | |
| 156 | ret = drm_atomic_helper_check_modeset(dev, state); |
| 157 | if (ret) |
| 158 | return ret; |
| 159 | |
| 160 | return ret; |
| 161 | } |
| 162 | |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 163 | /** |
| 164 | * drm_atomic_helper_commit - commit validated state object |
| 165 | * @dev: DRM device |
| 166 | * @state: the driver state object |
| 167 | * @async: asynchronous commit |
| 168 | * |
| 169 | * This function commits a with drm_atomic_helper_check() pre-validated state |
| 170 | * object. This can still fail when e.g. the framebuffer reservation fails. For |
| 171 | * now this doesn't implement asynchronous commits. |
| 172 | * |
| 173 | * RETURNS |
| 174 | * Zero for success or -errno. |
| 175 | */ |
| 176 | int msm_atomic_commit(struct drm_device *dev, |
| 177 | struct drm_atomic_state *state, bool async) |
| 178 | { |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 179 | int nplanes = dev->mode_config.num_total_plane; |
Rob Clark | f86afec | 2014-11-25 12:41:18 -0500 | [diff] [blame] | 180 | int ncrtcs = dev->mode_config.num_crtc; |
Rob Clark | be7a7b8 | 2015-01-12 16:11:16 -0500 | [diff] [blame] | 181 | struct timespec timeout; |
Rob Clark | f86afec | 2014-11-25 12:41:18 -0500 | [diff] [blame] | 182 | struct msm_commit *c; |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 183 | int i, ret; |
| 184 | |
| 185 | ret = drm_atomic_helper_prepare_planes(dev, state); |
| 186 | if (ret) |
| 187 | return ret; |
| 188 | |
Rob Clark | 0b776d4 | 2015-01-30 17:04:45 -0500 | [diff] [blame] | 189 | c = commit_init(state); |
Rob Clark | f86afec | 2014-11-25 12:41:18 -0500 | [diff] [blame] | 190 | if (!c) |
| 191 | return -ENOMEM; |
| 192 | |
| 193 | /* |
| 194 | * Figure out what crtcs we have: |
| 195 | */ |
| 196 | for (i = 0; i < ncrtcs; i++) { |
| 197 | struct drm_crtc *crtc = state->crtcs[i]; |
| 198 | if (!crtc) |
| 199 | continue; |
| 200 | c->crtc_mask |= (1 << drm_crtc_index(crtc)); |
| 201 | } |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 202 | |
| 203 | /* |
| 204 | * Figure out what fence to wait for: |
| 205 | */ |
| 206 | for (i = 0; i < nplanes; i++) { |
| 207 | struct drm_plane *plane = state->planes[i]; |
| 208 | struct drm_plane_state *new_state = state->plane_states[i]; |
| 209 | |
| 210 | if (!plane) |
| 211 | continue; |
| 212 | |
Rob Clark | 3e2f29e | 2014-11-19 12:29:33 -0500 | [diff] [blame] | 213 | if ((plane->state->fb != new_state->fb) && new_state->fb) |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 214 | add_fb(c, new_state->fb); |
| 215 | } |
| 216 | |
| 217 | /* |
Rob Clark | f86afec | 2014-11-25 12:41:18 -0500 | [diff] [blame] | 218 | * Wait for pending updates on any of the same crtc's and then |
| 219 | * mark our set of crtc's as busy: |
| 220 | */ |
| 221 | ret = start_atomic(dev->dev_private, c->crtc_mask); |
Laurent Pinchart | 5b2e2b6 | 2015-02-23 00:58:03 +0200 | [diff] [blame^] | 222 | if (ret) { |
| 223 | kfree(c); |
Rob Clark | f86afec | 2014-11-25 12:41:18 -0500 | [diff] [blame] | 224 | return ret; |
Laurent Pinchart | 5b2e2b6 | 2015-02-23 00:58:03 +0200 | [diff] [blame^] | 225 | } |
Rob Clark | f86afec | 2014-11-25 12:41:18 -0500 | [diff] [blame] | 226 | |
| 227 | /* |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 228 | * This is the point of no return - everything below never fails except |
| 229 | * when the hw goes bonghits. Which means we can commit the new state on |
| 230 | * the software side now. |
| 231 | */ |
| 232 | |
| 233 | drm_atomic_helper_swap_state(dev, state); |
| 234 | |
| 235 | /* |
| 236 | * Everything below can be run asynchronously without the need to grab |
| 237 | * any modeset locks at all under one conditions: It must be guaranteed |
| 238 | * that the asynchronous work has either been cancelled (if the driver |
| 239 | * supports it, which at least requires that the framebuffers get |
| 240 | * cleaned up with drm_atomic_helper_cleanup_planes()) or completed |
| 241 | * before the new state gets committed on the software side with |
| 242 | * drm_atomic_helper_swap_state(). |
| 243 | * |
| 244 | * This scheme allows new atomic state updates to be prepared and |
| 245 | * checked in parallel to the asynchronous completion of the previous |
| 246 | * update. Which is important since compositors need to figure out the |
| 247 | * composition of the next frame right after having submitted the |
| 248 | * current layout. |
| 249 | */ |
| 250 | |
| 251 | if (async) { |
| 252 | msm_queue_fence_cb(dev, &c->fence_cb, c->fence); |
| 253 | return 0; |
| 254 | } |
| 255 | |
Rob Clark | be7a7b8 | 2015-01-12 16:11:16 -0500 | [diff] [blame] | 256 | jiffies_to_timespec(jiffies + msecs_to_jiffies(1000), &timeout); |
| 257 | |
| 258 | ret = msm_wait_fence_interruptable(dev, c->fence, &timeout); |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 259 | if (ret) { |
| 260 | WARN_ON(ret); // TODO unswap state back? or?? |
Rob Clark | 0b776d4 | 2015-01-30 17:04:45 -0500 | [diff] [blame] | 261 | commit_destroy(c); |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 262 | return ret; |
| 263 | } |
| 264 | |
| 265 | complete_commit(c); |
| 266 | |
| 267 | return 0; |
| 268 | } |