blob: 8429793a628828af72821f1315bbe28441e3c1f3 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* linux/drivers/mtd/nand/s3c2410.c
2 *
Ben Dooksa4f957f2005-06-20 12:48:25 +01003 * Copyright (c) 2004,2005 Simtec Electronics
Ben Dooksfdf2fd52005-02-18 14:46:15 +00004 * http://www.simtec.co.uk/products/SWLINUX/
5 * Ben Dooks <ben@simtec.co.uk>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 *
Ben Dooksa4f957f2005-06-20 12:48:25 +01007 * Samsung S3C2410/S3C240 NAND driver
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 *
9 * Changelog:
10 * 21-Sep-2004 BJD Initial version
11 * 23-Sep-2004 BJD Mulitple device support
12 * 28-Sep-2004 BJD Fixed ECC placement for Hardware mode
13 * 12-Oct-2004 BJD Fixed errors in use of platform data
Ben Dooks3e4ef3b2005-03-17 11:31:30 +000014 * 18-Feb-2005 BJD Fix sparse errors
15 * 14-Mar-2005 BJD Applied tglx's code reduction patch
Ben Dooksa4f957f2005-06-20 12:48:25 +010016 * 02-May-2005 BJD Fixed s3c2440 support
17 * 02-May-2005 BJD Reduced hwcontrol decode
18 * 20-Jun-2005 BJD Updated s3c2440 support, fixed timing bug
Ben Dooksfb8d82a2005-07-06 21:05:10 +010019 * 08-Jul-2005 BJD Fix OOPS when no platform data supplied
Ben Dookscfd320f2005-10-20 22:22:58 +010020 * 20-Oct-2005 BJD Fix timing calculation bug
Linus Torvalds1da177e2005-04-16 15:20:36 -070021 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000022 * $Id: s3c2410.c,v 1.20 2005/11/07 11:14:31 gleixner Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * (at your option) any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37*/
38
39#include <config/mtd/nand/s3c2410/hwecc.h>
40#include <config/mtd/nand/s3c2410/debug.h>
41
42#ifdef CONFIG_MTD_NAND_S3C2410_DEBUG
43#define DEBUG
44#endif
45
46#include <linux/module.h>
47#include <linux/types.h>
48#include <linux/init.h>
49#include <linux/kernel.h>
50#include <linux/string.h>
51#include <linux/ioport.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010052#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#include <linux/delay.h>
54#include <linux/err.h>
Tim Schmielau4e57b682005-10-30 15:03:48 -080055#include <linux/slab.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000056#include <linux/clk.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070057
58#include <linux/mtd/mtd.h>
59#include <linux/mtd/nand.h>
60#include <linux/mtd/nand_ecc.h>
61#include <linux/mtd/partitions.h>
62
63#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070064
65#include <asm/arch/regs-nand.h>
66#include <asm/arch/nand.h>
67
68#define PFX "s3c2410-nand: "
69
70#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
71static int hardware_ecc = 1;
72#else
73static int hardware_ecc = 0;
74#endif
75
76/* new oob placement block for use with hardware ecc generation
77 */
78
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020079static struct nand_ecclayout nand_hw_eccoob = {
David Woodhousee0c7d762006-05-13 18:07:53 +010080 .eccbytes = 3,
81 .eccpos = {0, 1, 2},
82 .oobfree = {{8, 8}}
Linus Torvalds1da177e2005-04-16 15:20:36 -070083};
84
85/* controller and mtd information */
86
87struct s3c2410_nand_info;
88
89struct s3c2410_nand_mtd {
90 struct mtd_info mtd;
91 struct nand_chip chip;
92 struct s3c2410_nand_set *set;
93 struct s3c2410_nand_info *info;
94 int scan_res;
95};
96
97/* overview of the s3c2410 nand state */
98
99struct s3c2410_nand_info {
100 /* mtd info */
101 struct nand_hw_control controller;
102 struct s3c2410_nand_mtd *mtds;
103 struct s3c2410_platform_nand *platform;
104
105 /* device info */
106 struct device *device;
107 struct resource *area;
108 struct clk *clk;
Ben Dooksfdf2fd52005-02-18 14:46:15 +0000109 void __iomem *regs;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110 int mtd_count;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100111
112 unsigned char is_s3c2440;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113};
114
115/* conversion functions */
116
117static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd)
118{
119 return container_of(mtd, struct s3c2410_nand_mtd, mtd);
120}
121
122static struct s3c2410_nand_info *s3c2410_nand_mtd_toinfo(struct mtd_info *mtd)
123{
124 return s3c2410_nand_mtd_toours(mtd)->info;
125}
126
Russell King3ae5eae2005-11-09 22:32:44 +0000127static struct s3c2410_nand_info *to_nand_info(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128{
Russell King3ae5eae2005-11-09 22:32:44 +0000129 return platform_get_drvdata(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130}
131
Russell King3ae5eae2005-11-09 22:32:44 +0000132static struct s3c2410_platform_nand *to_nand_plat(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133{
Russell King3ae5eae2005-11-09 22:32:44 +0000134 return dev->dev.platform_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135}
136
137/* timing calculations */
138
Ben Dookscfd320f2005-10-20 22:22:58 +0100139#define NS_IN_KHZ 1000000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140
141static int s3c2410_nand_calc_rate(int wanted, unsigned long clk, int max)
142{
143 int result;
144
Ben Dookscfd320f2005-10-20 22:22:58 +0100145 result = (wanted * clk) / NS_IN_KHZ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146 result++;
147
148 pr_debug("result %d from %ld, %d\n", result, clk, wanted);
149
150 if (result > max) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100151 printk("%d ns is too big for current clock rate %ld\n", wanted, clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 return -1;
153 }
154
155 if (result < 1)
156 result = 1;
157
158 return result;
159}
160
Ben Dookscfd320f2005-10-20 22:22:58 +0100161#define to_ns(ticks,clk) (((ticks) * NS_IN_KHZ) / (unsigned int)(clk))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162
163/* controller setup */
164
David Woodhousee0c7d762006-05-13 18:07:53 +0100165static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166{
Russell King3ae5eae2005-11-09 22:32:44 +0000167 struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 unsigned long clkrate = clk_get_rate(info->clk);
Ben Dookscfd320f2005-10-20 22:22:58 +0100169 int tacls, twrph0, twrph1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170 unsigned long cfg;
171
172 /* calculate the timing information for the controller */
173
Ben Dookscfd320f2005-10-20 22:22:58 +0100174 clkrate /= 1000; /* turn clock into kHz for ease of use */
175
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 if (plat != NULL) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100177 tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 twrph0 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8);
179 twrph1 = s3c2410_nand_calc_rate(plat->twrph1, clkrate, 8);
180 } else {
181 /* default timings */
Ben Dooksa4f957f2005-06-20 12:48:25 +0100182 tacls = 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183 twrph0 = 8;
184 twrph1 = 8;
185 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000186
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 if (tacls < 0 || twrph0 < 0 || twrph1 < 0) {
188 printk(KERN_ERR PFX "cannot get timings suitable for board\n");
189 return -EINVAL;
190 }
191
Ben Dookscfd320f2005-10-20 22:22:58 +0100192 printk(KERN_INFO PFX "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n",
David Woodhousee0c7d762006-05-13 18:07:53 +0100193 tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194
Ben Dooksa4f957f2005-06-20 12:48:25 +0100195 if (!info->is_s3c2440) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100196 cfg = S3C2410_NFCONF_EN;
197 cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
198 cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
199 cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100200 } else {
David Woodhousee0c7d762006-05-13 18:07:53 +0100201 cfg = S3C2440_NFCONF_TACLS(tacls - 1);
202 cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);
203 cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100204 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700205
206 pr_debug(PFX "NF_CONF is 0x%lx\n", cfg);
207
208 writel(cfg, info->regs + S3C2410_NFCONF);
209 return 0;
210}
211
212/* select chip */
213
214static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
215{
216 struct s3c2410_nand_info *info;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000217 struct s3c2410_nand_mtd *nmtd;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218 struct nand_chip *this = mtd->priv;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100219 void __iomem *reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220 unsigned long cur;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100221 unsigned long bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222
223 nmtd = this->priv;
224 info = nmtd->info;
225
Ben Dooksa4f957f2005-06-20 12:48:25 +0100226 bit = (info->is_s3c2440) ? S3C2440_NFCONT_nFCE : S3C2410_NFCONF_nFCE;
David Woodhousee0c7d762006-05-13 18:07:53 +0100227 reg = info->regs + ((info->is_s3c2440) ? S3C2440_NFCONT : S3C2410_NFCONF);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100228
229 cur = readl(reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230
231 if (chip == -1) {
Ben Dooksa4f957f2005-06-20 12:48:25 +0100232 cur |= bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233 } else {
Ben Dooksfb8d82a2005-07-06 21:05:10 +0100234 if (nmtd->set != NULL && chip > nmtd->set->nr_chips) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235 printk(KERN_ERR PFX "chip %d out of range\n", chip);
236 return;
237 }
238
239 if (info->platform != NULL) {
240 if (info->platform->select_chip != NULL)
David Woodhousee0c7d762006-05-13 18:07:53 +0100241 (info->platform->select_chip) (nmtd->set, chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700242 }
243
Ben Dooksa4f957f2005-06-20 12:48:25 +0100244 cur &= ~bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 }
246
Ben Dooksa4f957f2005-06-20 12:48:25 +0100247 writel(cur, reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248}
249
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000250/* command and control functions
Ben Dooksa4f957f2005-06-20 12:48:25 +0100251 *
252 * Note, these all use tglx's method of changing the IO_ADDR_W field
253 * to make the code simpler, and use the nand layer's code to issue the
254 * command and address sequences via the proper IO ports.
255 *
256*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200258static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd,
259 unsigend int ctrl)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700260{
261 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
Ben Dooks3e4ef3b2005-03-17 11:31:30 +0000262 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700263
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200264 if (cmd == NAND_CMD_NONE)
265 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200267 if (cmd & NAND_CLE)
268 writeb(cmd, info->regs + S3C2410_NFCMD);
269 else
270 writeb(cmd, info->regs + S3C2410_NFADDR);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100271}
272
273/* command and control functions */
274
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200275static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd,
276 unsigend int ctrl)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100277{
278 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
279 struct nand_chip *chip = mtd->priv;
280
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200281 if (cmd == NAND_CMD_NONE)
282 return;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100283
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200284 if (cmd & NAND_CLE)
285 writeb(cmd, info->regs + S3C2440_NFCMD);
286 else
287 writeb(cmd, info->regs + S3C2440_NFADDR);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700288}
289
Linus Torvalds1da177e2005-04-16 15:20:36 -0700290/* s3c2410_nand_devready()
291 *
292 * returns 0 if the nand is busy, 1 if it is ready
293*/
294
295static int s3c2410_nand_devready(struct mtd_info *mtd)
296{
297 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000298
Ben Dooksa4f957f2005-06-20 12:48:25 +0100299 if (info->is_s3c2440)
300 return readb(info->regs + S3C2440_NFSTAT) & S3C2440_NFSTAT_READY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301 return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY;
302}
303
304/* ECC handling functions */
305
David Woodhousee0c7d762006-05-13 18:07:53 +0100306static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307{
David Woodhousee0c7d762006-05-13 18:07:53 +0100308 pr_debug("s3c2410_nand_correct_data(%p,%p,%p,%p)\n", mtd, dat, read_ecc, calc_ecc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309
310 pr_debug("eccs: read %02x,%02x,%02x vs calc %02x,%02x,%02x\n",
David Woodhousee0c7d762006-05-13 18:07:53 +0100311 read_ecc[0], read_ecc[1], read_ecc[2], calc_ecc[0], calc_ecc[1], calc_ecc[2]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312
David Woodhousee0c7d762006-05-13 18:07:53 +0100313 if (read_ecc[0] == calc_ecc[0] && read_ecc[1] == calc_ecc[1] && read_ecc[2] == calc_ecc[2])
Linus Torvalds1da177e2005-04-16 15:20:36 -0700314 return 0;
315
316 /* we curently have no method for correcting the error */
317
318 return -1;
319}
320
Ben Dooksa4f957f2005-06-20 12:48:25 +0100321/* ECC functions
322 *
323 * These allow the s3c2410 and s3c2440 to use the controller's ECC
324 * generator block to ECC the data as it passes through]
325*/
326
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode)
328{
329 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
330 unsigned long ctrl;
331
332 ctrl = readl(info->regs + S3C2410_NFCONF);
333 ctrl |= S3C2410_NFCONF_INITECC;
334 writel(ctrl, info->regs + S3C2410_NFCONF);
335}
336
Ben Dooksa4f957f2005-06-20 12:48:25 +0100337static void s3c2440_nand_enable_hwecc(struct mtd_info *mtd, int mode)
338{
339 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
340 unsigned long ctrl;
341
342 ctrl = readl(info->regs + S3C2440_NFCONT);
343 writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT);
344}
345
David Woodhousee0c7d762006-05-13 18:07:53 +0100346static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347{
348 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
349
350 ecc_code[0] = readb(info->regs + S3C2410_NFECC + 0);
351 ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1);
352 ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2);
353
David Woodhousee0c7d762006-05-13 18:07:53 +0100354 pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355
356 return 0;
357}
358
David Woodhousee0c7d762006-05-13 18:07:53 +0100359static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100360{
361 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
362 unsigned long ecc = readl(info->regs + S3C2440_NFMECC0);
363
364 ecc_code[0] = ecc;
365 ecc_code[1] = ecc >> 8;
366 ecc_code[2] = ecc >> 16;
367
David Woodhousee0c7d762006-05-13 18:07:53 +0100368 pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100369
370 return 0;
371}
372
Ben Dooksa4f957f2005-06-20 12:48:25 +0100373/* over-ride the standard functions for a little more speed. We can
374 * use read/write block to move the data buffers to/from the controller
375*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376
377static void s3c2410_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
378{
379 struct nand_chip *this = mtd->priv;
380 readsb(this->IO_ADDR_R, buf, len);
381}
382
David Woodhousee0c7d762006-05-13 18:07:53 +0100383static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384{
385 struct nand_chip *this = mtd->priv;
386 writesb(this->IO_ADDR_W, buf, len);
387}
388
389/* device management functions */
390
Russell King3ae5eae2005-11-09 22:32:44 +0000391static int s3c2410_nand_remove(struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700392{
Russell King3ae5eae2005-11-09 22:32:44 +0000393 struct s3c2410_nand_info *info = to_nand_info(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700394
Russell King3ae5eae2005-11-09 22:32:44 +0000395 platform_set_drvdata(pdev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000397 if (info == NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700398 return 0;
399
400 /* first thing we need to do is release all our mtds
401 * and their partitions, then go through freeing the
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000402 * resources used
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403 */
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000404
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405 if (info->mtds != NULL) {
406 struct s3c2410_nand_mtd *ptr = info->mtds;
407 int mtdno;
408
409 for (mtdno = 0; mtdno < info->mtd_count; mtdno++, ptr++) {
410 pr_debug("releasing mtd %d (%p)\n", mtdno, ptr);
411 nand_release(&ptr->mtd);
412 }
413
414 kfree(info->mtds);
415 }
416
417 /* free the common resources */
418
419 if (info->clk != NULL && !IS_ERR(info->clk)) {
420 clk_disable(info->clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421 clk_put(info->clk);
422 }
423
424 if (info->regs != NULL) {
425 iounmap(info->regs);
426 info->regs = NULL;
427 }
428
429 if (info->area != NULL) {
430 release_resource(info->area);
431 kfree(info->area);
432 info->area = NULL;
433 }
434
435 kfree(info);
436
437 return 0;
438}
439
440#ifdef CONFIG_MTD_PARTITIONS
441static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
442 struct s3c2410_nand_mtd *mtd,
443 struct s3c2410_nand_set *set)
444{
445 if (set == NULL)
446 return add_mtd_device(&mtd->mtd);
447
448 if (set->nr_partitions > 0 && set->partitions != NULL) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100449 return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700450 }
451
452 return add_mtd_device(&mtd->mtd);
453}
454#else
455static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
456 struct s3c2410_nand_mtd *mtd,
457 struct s3c2410_nand_set *set)
458{
459 return add_mtd_device(&mtd->mtd);
460}
461#endif
462
463/* s3c2410_nand_init_chip
464 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000465 * init a single instance of an chip
Linus Torvalds1da177e2005-04-16 15:20:36 -0700466*/
467
468static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
469 struct s3c2410_nand_mtd *nmtd,
470 struct s3c2410_nand_set *set)
471{
472 struct nand_chip *chip = &nmtd->chip;
473
Ben Dooksfdf2fd52005-02-18 14:46:15 +0000474 chip->IO_ADDR_R = info->regs + S3C2410_NFDATA;
475 chip->IO_ADDR_W = info->regs + S3C2410_NFDATA;
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200476 chip->cmd_ctrl = s3c2410_nand_hwcontrol;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700477 chip->dev_ready = s3c2410_nand_devready;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478 chip->write_buf = s3c2410_nand_write_buf;
479 chip->read_buf = s3c2410_nand_read_buf;
480 chip->select_chip = s3c2410_nand_select_chip;
481 chip->chip_delay = 50;
482 chip->priv = nmtd;
483 chip->options = 0;
484 chip->controller = &info->controller;
485
Ben Dooksa4f957f2005-06-20 12:48:25 +0100486 if (info->is_s3c2440) {
487 chip->IO_ADDR_R = info->regs + S3C2440_NFDATA;
488 chip->IO_ADDR_W = info->regs + S3C2440_NFDATA;
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200489 chip->cmd_ctrl = s3c2440_nand_hwcontrol;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100490 }
491
Linus Torvalds1da177e2005-04-16 15:20:36 -0700492 nmtd->info = info;
493 nmtd->mtd.priv = chip;
David Woodhouse552d9202006-05-14 01:20:46 +0100494 nmtd->mtd.owner = THIS_MODULE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495 nmtd->set = set;
496
497 if (hardware_ecc) {
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200498 chip->ecc.correct = s3c2410_nand_correct_data;
499 chip->ecc.hwctl = s3c2410_nand_enable_hwecc;
500 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
501 chip->ecc.mode = NAND_ECC_HW;
502 chip->ecc.size = 512;
503 chip->ecc.bytes = 3;
Thomas Gleixner5bd34c02006-05-27 22:16:10 +0200504 chip->ecc.layout = &nand_hw_eccoob;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100505
506 if (info->is_s3c2440) {
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200507 chip->ecc.hwctl = s3c2440_nand_enable_hwecc;
508 chip->ecc.calculate = s3c2440_nand_calculate_ecc;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100509 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510 } else {
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200511 chip->ecc.mode = NAND_ECC_SOFT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700512 }
513}
514
515/* s3c2410_nand_probe
516 *
517 * called by device layer when it finds a device matching
518 * one our driver can handled. This code checks to see if
519 * it can allocate all necessary resources then calls the
520 * nand layer to look for devices
521*/
522
Russell King3ae5eae2005-11-09 22:32:44 +0000523static int s3c24xx_nand_probe(struct platform_device *pdev, int is_s3c2440)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524{
Russell King3ae5eae2005-11-09 22:32:44 +0000525 struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700526 struct s3c2410_nand_info *info;
527 struct s3c2410_nand_mtd *nmtd;
528 struct s3c2410_nand_set *sets;
529 struct resource *res;
530 int err = 0;
531 int size;
532 int nr_sets;
533 int setno;
534
Russell King3ae5eae2005-11-09 22:32:44 +0000535 pr_debug("s3c2410_nand_probe(%p)\n", pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700536
537 info = kmalloc(sizeof(*info), GFP_KERNEL);
538 if (info == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000539 dev_err(&pdev->dev, "no memory for flash info\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540 err = -ENOMEM;
541 goto exit_error;
542 }
543
544 memzero(info, sizeof(*info));
Russell King3ae5eae2005-11-09 22:32:44 +0000545 platform_set_drvdata(pdev, info);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700546
547 spin_lock_init(&info->controller.lock);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100548 init_waitqueue_head(&info->controller.wq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549
550 /* get the clock source and enable it */
551
Russell King3ae5eae2005-11-09 22:32:44 +0000552 info->clk = clk_get(&pdev->dev, "nand");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553 if (IS_ERR(info->clk)) {
Russell King3ae5eae2005-11-09 22:32:44 +0000554 dev_err(&pdev->dev, "failed to get clock");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700555 err = -ENOENT;
556 goto exit_error;
557 }
558
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559 clk_enable(info->clk);
560
561 /* allocate and map the resource */
562
Ben Dooksa4f957f2005-06-20 12:48:25 +0100563 /* currently we assume we have the one resource */
564 res = pdev->resource;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565 size = res->end - res->start + 1;
566
567 info->area = request_mem_region(res->start, size, pdev->name);
568
569 if (info->area == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000570 dev_err(&pdev->dev, "cannot reserve register region\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571 err = -ENOENT;
572 goto exit_error;
573 }
574
Russell King3ae5eae2005-11-09 22:32:44 +0000575 info->device = &pdev->dev;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100576 info->platform = plat;
577 info->regs = ioremap(res->start, size);
578 info->is_s3c2440 = is_s3c2440;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579
580 if (info->regs == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000581 dev_err(&pdev->dev, "cannot reserve register region\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582 err = -EIO;
583 goto exit_error;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000584 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700585
Russell King3ae5eae2005-11-09 22:32:44 +0000586 dev_dbg(&pdev->dev, "mapped registers at %p\n", info->regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587
588 /* initialise the hardware */
589
Russell King3ae5eae2005-11-09 22:32:44 +0000590 err = s3c2410_nand_inithw(info, pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700591 if (err != 0)
592 goto exit_error;
593
594 sets = (plat != NULL) ? plat->sets : NULL;
595 nr_sets = (plat != NULL) ? plat->nr_sets : 1;
596
597 info->mtd_count = nr_sets;
598
599 /* allocate our information */
600
601 size = nr_sets * sizeof(*info->mtds);
602 info->mtds = kmalloc(size, GFP_KERNEL);
603 if (info->mtds == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000604 dev_err(&pdev->dev, "failed to allocate mtd storage\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605 err = -ENOMEM;
606 goto exit_error;
607 }
608
609 memzero(info->mtds, size);
610
611 /* initialise all possible chips */
612
613 nmtd = info->mtds;
614
615 for (setno = 0; setno < nr_sets; setno++, nmtd++) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100616 pr_debug("initialising set %d (%p, info %p)\n", setno, nmtd, info);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000617
Linus Torvalds1da177e2005-04-16 15:20:36 -0700618 s3c2410_nand_init_chip(info, nmtd, sets);
619
David Woodhousee0c7d762006-05-13 18:07:53 +0100620 nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700621
622 if (nmtd->scan_res == 0) {
623 s3c2410_nand_add_partition(info, nmtd, sets);
624 }
625
626 if (sets != NULL)
627 sets++;
628 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000629
Linus Torvalds1da177e2005-04-16 15:20:36 -0700630 pr_debug("initialised ok\n");
631 return 0;
632
633 exit_error:
Russell King3ae5eae2005-11-09 22:32:44 +0000634 s3c2410_nand_remove(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700635
636 if (err == 0)
637 err = -EINVAL;
638 return err;
639}
640
Ben Dooksa4f957f2005-06-20 12:48:25 +0100641/* driver device registration */
642
Russell King3ae5eae2005-11-09 22:32:44 +0000643static int s3c2410_nand_probe(struct platform_device *dev)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100644{
645 return s3c24xx_nand_probe(dev, 0);
646}
647
Russell King3ae5eae2005-11-09 22:32:44 +0000648static int s3c2440_nand_probe(struct platform_device *dev)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100649{
650 return s3c24xx_nand_probe(dev, 1);
651}
652
Russell King3ae5eae2005-11-09 22:32:44 +0000653static struct platform_driver s3c2410_nand_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700654 .probe = s3c2410_nand_probe,
655 .remove = s3c2410_nand_remove,
Russell King3ae5eae2005-11-09 22:32:44 +0000656 .driver = {
657 .name = "s3c2410-nand",
658 .owner = THIS_MODULE,
659 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660};
661
Russell King3ae5eae2005-11-09 22:32:44 +0000662static struct platform_driver s3c2440_nand_driver = {
Ben Dooksa4f957f2005-06-20 12:48:25 +0100663 .probe = s3c2440_nand_probe,
664 .remove = s3c2410_nand_remove,
Russell King3ae5eae2005-11-09 22:32:44 +0000665 .driver = {
666 .name = "s3c2440-nand",
667 .owner = THIS_MODULE,
668 },
Ben Dooksa4f957f2005-06-20 12:48:25 +0100669};
670
Linus Torvalds1da177e2005-04-16 15:20:36 -0700671static int __init s3c2410_nand_init(void)
672{
Ben Dooksa4f957f2005-06-20 12:48:25 +0100673 printk("S3C24XX NAND Driver, (c) 2004 Simtec Electronics\n");
674
Russell King3ae5eae2005-11-09 22:32:44 +0000675 platform_driver_register(&s3c2440_nand_driver);
676 return platform_driver_register(&s3c2410_nand_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700677}
678
679static void __exit s3c2410_nand_exit(void)
680{
Russell King3ae5eae2005-11-09 22:32:44 +0000681 platform_driver_unregister(&s3c2440_nand_driver);
682 platform_driver_unregister(&s3c2410_nand_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700683}
684
685module_init(s3c2410_nand_init);
686module_exit(s3c2410_nand_exit);
687
688MODULE_LICENSE("GPL");
689MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
Ben Dooksa4f957f2005-06-20 12:48:25 +0100690MODULE_DESCRIPTION("S3C24XX MTD NAND driver");