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Jaecheol Leea125a172012-01-07 20:18:35 +09001/*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * EXYNOS - CPU frequency scaling support for EXYNOS series
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
Jaecheol Leea125a172012-01-07 20:18:35 +090012#include <linux/kernel.h>
13#include <linux/err.h>
14#include <linux/clk.h>
15#include <linux/io.h>
16#include <linux/slab.h>
17#include <linux/regulator/consumer.h>
18#include <linux/cpufreq.h>
Lukasz Majewskid568b6f2013-11-28 13:42:42 +010019#include <linux/platform_device.h>
Jonghwan Choibe1f7c82014-05-17 08:19:30 +090020#include <linux/of.h>
Lukasz Majewskie725d262015-01-23 13:14:20 +010021#include <linux/cpu_cooling.h>
22#include <linux/cpu.h>
Jaecheol Leea125a172012-01-07 20:18:35 +090023
Kukjin Kimc4aaa292012-12-28 16:29:10 -080024#include "exynos-cpufreq.h"
25
Jaecheol Leea125a172012-01-07 20:18:35 +090026static struct exynos_dvfs_info *exynos_info;
Lukasz Majewskie725d262015-01-23 13:14:20 +010027static struct thermal_cooling_device *cdev;
Jaecheol Leea125a172012-01-07 20:18:35 +090028static struct regulator *arm_regulator;
Jaecheol Leea125a172012-01-07 20:18:35 +090029static unsigned int locking_frequency;
Jaecheol Leea125a172012-01-07 20:18:35 +090030
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080031static int exynos_cpufreq_get_index(unsigned int freq)
Jaecheol Leea125a172012-01-07 20:18:35 +090032{
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080033 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
Stratos Karafotis041526f2014-04-25 23:15:38 +030034 struct cpufreq_frequency_table *pos;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080035
Stratos Karafotis041526f2014-04-25 23:15:38 +030036 cpufreq_for_each_entry(pos, freq_table)
37 if (pos->frequency == freq)
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080038 break;
39
Stratos Karafotis041526f2014-04-25 23:15:38 +030040 if (pos->frequency == CPUFREQ_TABLE_END)
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080041 return -EINVAL;
42
Stratos Karafotis041526f2014-04-25 23:15:38 +030043 return pos - freq_table;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080044}
45
46static int exynos_cpufreq_scale(unsigned int target_freq)
47{
Jaecheol Leea125a172012-01-07 20:18:35 +090048 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
49 unsigned int *volt_table = exynos_info->volt_table;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080050 struct cpufreq_policy *policy = cpufreq_cpu_get(0);
51 unsigned int arm_volt, safe_arm_volt = 0;
Jaecheol Leea125a172012-01-07 20:18:35 +090052 unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
Chanwoo Choie5eaa442014-04-18 11:20:33 +090053 struct device *dev = exynos_info->dev;
Viresh Kumard4019f02013-08-14 19:38:24 +053054 unsigned int old_freq;
Sachin Kamatd271d072013-01-25 10:18:09 -080055 int index, old_index;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080056 int ret = 0;
Jaecheol Leea125a172012-01-07 20:18:35 +090057
Viresh Kumard4019f02013-08-14 19:38:24 +053058 old_freq = policy->cur;
Jaecheol Leea125a172012-01-07 20:18:35 +090059
Jonghwa Lee53df1ad2012-07-20 02:54:02 +000060 /*
61 * The policy max have been changed so that we cannot get proper
62 * old_index with cpufreq_frequency_table_target(). Thus, ignore
LABBE Corentin05851232013-09-26 16:50:21 +020063 * policy and get the index from the raw frequency table.
Jonghwa Lee53df1ad2012-07-20 02:54:02 +000064 */
Viresh Kumard4019f02013-08-14 19:38:24 +053065 old_index = exynos_cpufreq_get_index(old_freq);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080066 if (old_index < 0) {
67 ret = old_index;
Jaecheol Leea125a172012-01-07 20:18:35 +090068 goto out;
69 }
70
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080071 index = exynos_cpufreq_get_index(target_freq);
72 if (index < 0) {
73 ret = index;
Jaecheol Leea125a172012-01-07 20:18:35 +090074 goto out;
75 }
76
Jaecheol Leea125a172012-01-07 20:18:35 +090077 /*
78 * ARM clock source will be changed APLL to MPLL temporary
79 * To support this level, need to control regulator for
80 * required voltage level
81 */
82 if (exynos_info->need_apll_change != NULL) {
83 if (exynos_info->need_apll_change(old_index, index) &&
84 (freq_table[index].frequency < mpll_freq_khz) &&
85 (freq_table[old_index].frequency < mpll_freq_khz))
86 safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
87 }
88 arm_volt = volt_table[index];
89
Jaecheol Leea125a172012-01-07 20:18:35 +090090 /* When the new frequency is higher than current frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053091 if ((target_freq > old_freq) && !safe_arm_volt) {
Jaecheol Leea125a172012-01-07 20:18:35 +090092 /* Firstly, voltage up to increase frequency */
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080093 ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
94 if (ret) {
Chanwoo Choie5eaa442014-04-18 11:20:33 +090095 dev_err(dev, "failed to set cpu voltage to %d\n",
96 arm_volt);
Viresh Kumard4019f02013-08-14 19:38:24 +053097 return ret;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080098 }
Jaecheol Leea125a172012-01-07 20:18:35 +090099 }
100
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800101 if (safe_arm_volt) {
102 ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
Jaecheol Leea125a172012-01-07 20:18:35 +0900103 safe_arm_volt);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800104 if (ret) {
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900105 dev_err(dev, "failed to set cpu voltage to %d\n",
106 safe_arm_volt);
Viresh Kumard4019f02013-08-14 19:38:24 +0530107 return ret;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800108 }
109 }
Jonghwan Choi857d90f2012-12-23 15:57:39 -0800110
111 exynos_info->set_freq(old_index, index);
Jaecheol Leea125a172012-01-07 20:18:35 +0900112
Jaecheol Leea125a172012-01-07 20:18:35 +0900113 /* When the new frequency is lower than current frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +0530114 if ((target_freq < old_freq) ||
115 ((target_freq > old_freq) && safe_arm_volt)) {
Jaecheol Leea125a172012-01-07 20:18:35 +0900116 /* down the voltage after frequency change */
Manish Badarkhe006454a2013-10-09 20:43:37 +0530117 ret = regulator_set_voltage(arm_regulator, arm_volt,
Jaecheol Leea125a172012-01-07 20:18:35 +0900118 arm_volt);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800119 if (ret) {
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900120 dev_err(dev, "failed to set cpu voltage to %d\n",
121 arm_volt);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800122 goto out;
123 }
Jaecheol Leea125a172012-01-07 20:18:35 +0900124 }
125
126out:
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800127 cpufreq_cpu_put(policy);
128
129 return ret;
130}
131
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530132static int exynos_target(struct cpufreq_policy *policy, unsigned int index)
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800133{
Viresh Kumard248bb82014-03-04 11:00:28 +0800134 return exynos_cpufreq_scale(exynos_info->freq_table[index].frequency);
Jaecheol Leea125a172012-01-07 20:18:35 +0900135}
136
Jaecheol Leea125a172012-01-07 20:18:35 +0900137static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
138{
Viresh Kumar652ed952014-01-09 20:38:43 +0530139 policy->clk = exynos_info->cpu_clk;
Viresh Kumard248bb82014-03-04 11:00:28 +0800140 policy->suspend_freq = locking_frequency;
Viresh Kumarb249aba2013-10-03 20:29:13 +0530141 return cpufreq_generic_init(policy, exynos_info->freq_table, 100000);
Jaecheol Leea125a172012-01-07 20:18:35 +0900142}
143
144static struct cpufreq_driver exynos_driver = {
Viresh Kumarae6b4272013-12-03 11:20:45 +0530145 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
Viresh Kumareea61812013-10-03 20:28:06 +0530146 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530147 .target_index = exynos_target,
Viresh Kumar652ed952014-01-09 20:38:43 +0530148 .get = cpufreq_generic_get,
Jaecheol Leea125a172012-01-07 20:18:35 +0900149 .init = exynos_cpufreq_cpu_init,
150 .name = "exynos_cpufreq",
Viresh Kumareea61812013-10-03 20:28:06 +0530151 .attr = cpufreq_generic_attr,
Lukasz Majewskic683c2c2013-12-20 15:24:52 +0100152#ifdef CONFIG_ARM_EXYNOS_CPU_FREQ_BOOST_SW
153 .boost_supported = true,
154#endif
Jaecheol Leea125a172012-01-07 20:18:35 +0900155#ifdef CONFIG_PM
Viresh Kumard248bb82014-03-04 11:00:28 +0800156 .suspend = cpufreq_generic_suspend,
Jaecheol Leea125a172012-01-07 20:18:35 +0900157#endif
158};
159
Lukasz Majewskid568b6f2013-11-28 13:42:42 +0100160static int exynos_cpufreq_probe(struct platform_device *pdev)
Jaecheol Leea125a172012-01-07 20:18:35 +0900161{
Lukasz Majewski0fc83922015-02-05 16:45:06 +0100162 struct device_node *cpu0;
Jaecheol Leea125a172012-01-07 20:18:35 +0900163 int ret = -EINVAL;
164
Viresh Kumard5b73cd2013-08-06 22:53:06 +0530165 exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
Jaecheol Leea125a172012-01-07 20:18:35 +0900166 if (!exynos_info)
167 return -ENOMEM;
168
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900169 exynos_info->dev = &pdev->dev;
170
Jonghwan Choibe1f7c82014-05-17 08:19:30 +0900171 if (of_machine_is_compatible("samsung,exynos4210")) {
172 exynos_info->type = EXYNOS_SOC_4210;
Jaecheol Leea125a172012-01-07 20:18:35 +0900173 ret = exynos4210_cpufreq_init(exynos_info);
Jonghwan Choibe1f7c82014-05-17 08:19:30 +0900174 } else if (of_machine_is_compatible("samsung,exynos4212")) {
175 exynos_info->type = EXYNOS_SOC_4212;
Jaecheol Leea35c5052012-03-10 02:59:22 -0800176 ret = exynos4x12_cpufreq_init(exynos_info);
Jonghwan Choibe1f7c82014-05-17 08:19:30 +0900177 } else if (of_machine_is_compatible("samsung,exynos4412")) {
178 exynos_info->type = EXYNOS_SOC_4412;
179 ret = exynos4x12_cpufreq_init(exynos_info);
180 } else if (of_machine_is_compatible("samsung,exynos5250")) {
181 exynos_info->type = EXYNOS_SOC_5250;
Jaecheol Lee562a6cb2012-03-10 03:00:02 -0800182 ret = exynos5250_cpufreq_init(exynos_info);
Jonghwan Choibe1f7c82014-05-17 08:19:30 +0900183 } else {
184 pr_err("%s: Unknown SoC type\n", __func__);
185 return -ENODEV;
186 }
Jaecheol Leea125a172012-01-07 20:18:35 +0900187
188 if (ret)
189 goto err_vdd_arm;
190
191 if (exynos_info->set_freq == NULL) {
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900192 dev_err(&pdev->dev, "No set_freq function (ERR)\n");
Jaecheol Leea125a172012-01-07 20:18:35 +0900193 goto err_vdd_arm;
194 }
195
196 arm_regulator = regulator_get(NULL, "vdd_arm");
197 if (IS_ERR(arm_regulator)) {
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900198 dev_err(&pdev->dev, "failed to get resource vdd_arm\n");
Jaecheol Leea125a172012-01-07 20:18:35 +0900199 goto err_vdd_arm;
200 }
201
Viresh Kumard248bb82014-03-04 11:00:28 +0800202 /* Done here as we want to capture boot frequency */
Viresh Kumar652ed952014-01-09 20:38:43 +0530203 locking_frequency = clk_get_rate(exynos_info->cpu_clk) / 1000;
Jonghwan Choi6e45eb12013-01-18 11:09:01 -0800204
Lukasz Majewskie725d262015-01-23 13:14:20 +0100205 ret = cpufreq_register_driver(&exynos_driver);
206 if (ret)
207 goto err_cpufreq_reg;
Jaecheol Leea125a172012-01-07 20:18:35 +0900208
Lukasz Majewski0fc83922015-02-05 16:45:06 +0100209 cpu0 = of_get_cpu_node(0, NULL);
210 if (!cpu0) {
211 pr_err("failed to find cpu0 node\n");
Lukasz Majewskie725d262015-01-23 13:14:20 +0100212 return 0;
213 }
214
Lukasz Majewski0fc83922015-02-05 16:45:06 +0100215 if (of_find_property(cpu0, "#cooling-cells", NULL)) {
216 cdev = of_cpufreq_cooling_register(cpu0,
Lukasz Majewskie725d262015-01-23 13:14:20 +0100217 cpu_present_mask);
218 if (IS_ERR(cdev))
219 pr_err("running cpufreq without cooling device: %ld\n",
220 PTR_ERR(cdev));
221 }
Lukasz Majewskie725d262015-01-23 13:14:20 +0100222
223 return 0;
224
225err_cpufreq_reg:
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900226 dev_err(&pdev->dev, "failed to register cpufreq driver\n");
Jonghwan Choi184cddd2012-12-23 15:51:40 -0800227 regulator_put(arm_regulator);
Jaecheol Leea125a172012-01-07 20:18:35 +0900228err_vdd_arm:
229 kfree(exynos_info);
Jaecheol Leea125a172012-01-07 20:18:35 +0900230 return -EINVAL;
231}
Lukasz Majewskid568b6f2013-11-28 13:42:42 +0100232
233static struct platform_driver exynos_cpufreq_platdrv = {
234 .driver = {
235 .name = "exynos-cpufreq",
Lukasz Majewskid568b6f2013-11-28 13:42:42 +0100236 },
237 .probe = exynos_cpufreq_probe,
238};
239module_platform_driver(exynos_cpufreq_platdrv);