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Mark Brownc9fbf7e2010-03-26 16:49:15 +00001/*
2 * wm8994-irq.c -- Interrupt controller support for Wolfson WM8994
3 *
4 * Copyright 2010 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
Mark Brown7c884442013-05-06 16:12:56 +010017#include <linux/gpio.h>
Mark Brownc9fbf7e2010-03-26 16:49:15 +000018#include <linux/i2c.h>
19#include <linux/irq.h>
20#include <linux/mfd/core.h>
21#include <linux/interrupt.h>
Mark Brown7c884442013-05-06 16:12:56 +010022#include <linux/irqdomain.h>
Mark Brown8ab30692011-10-25 10:19:04 +020023#include <linux/regmap.h>
Mark Brownc9fbf7e2010-03-26 16:49:15 +000024
25#include <linux/mfd/wm8994/core.h>
Mark Brownb0ab9072012-06-01 16:33:19 +010026#include <linux/mfd/wm8994/pdata.h>
Mark Brownc9fbf7e2010-03-26 16:49:15 +000027#include <linux/mfd/wm8994/registers.h>
28
29#include <linux/delay.h>
30
Krzysztof Kozlowski7ce7b262015-04-27 21:54:13 +090031static const struct regmap_irq wm8994_irqs[] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +000032 [WM8994_IRQ_TEMP_SHUT] = {
Mark Brown8ab30692011-10-25 10:19:04 +020033 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000034 .mask = WM8994_TEMP_SHUT_EINT,
35 },
36 [WM8994_IRQ_MIC1_DET] = {
Mark Brown8ab30692011-10-25 10:19:04 +020037 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000038 .mask = WM8994_MIC1_DET_EINT,
39 },
40 [WM8994_IRQ_MIC1_SHRT] = {
Mark Brown8ab30692011-10-25 10:19:04 +020041 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000042 .mask = WM8994_MIC1_SHRT_EINT,
43 },
44 [WM8994_IRQ_MIC2_DET] = {
Mark Brown8ab30692011-10-25 10:19:04 +020045 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000046 .mask = WM8994_MIC2_DET_EINT,
47 },
48 [WM8994_IRQ_MIC2_SHRT] = {
Mark Brown8ab30692011-10-25 10:19:04 +020049 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000050 .mask = WM8994_MIC2_SHRT_EINT,
51 },
52 [WM8994_IRQ_FLL1_LOCK] = {
Mark Brown8ab30692011-10-25 10:19:04 +020053 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000054 .mask = WM8994_FLL1_LOCK_EINT,
55 },
56 [WM8994_IRQ_FLL2_LOCK] = {
Mark Brown8ab30692011-10-25 10:19:04 +020057 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000058 .mask = WM8994_FLL2_LOCK_EINT,
59 },
60 [WM8994_IRQ_SRC1_LOCK] = {
Mark Brown8ab30692011-10-25 10:19:04 +020061 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000062 .mask = WM8994_SRC1_LOCK_EINT,
63 },
64 [WM8994_IRQ_SRC2_LOCK] = {
Mark Brown8ab30692011-10-25 10:19:04 +020065 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000066 .mask = WM8994_SRC2_LOCK_EINT,
67 },
68 [WM8994_IRQ_AIF1DRC1_SIG_DET] = {
Mark Brown8ab30692011-10-25 10:19:04 +020069 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000070 .mask = WM8994_AIF1DRC1_SIG_DET,
71 },
72 [WM8994_IRQ_AIF1DRC2_SIG_DET] = {
Mark Brown8ab30692011-10-25 10:19:04 +020073 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000074 .mask = WM8994_AIF1DRC2_SIG_DET_EINT,
75 },
76 [WM8994_IRQ_AIF2DRC_SIG_DET] = {
Mark Brown8ab30692011-10-25 10:19:04 +020077 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000078 .mask = WM8994_AIF2DRC_SIG_DET_EINT,
79 },
80 [WM8994_IRQ_FIFOS_ERR] = {
Mark Brown8ab30692011-10-25 10:19:04 +020081 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000082 .mask = WM8994_FIFOS_ERR_EINT,
83 },
84 [WM8994_IRQ_WSEQ_DONE] = {
Mark Brown8ab30692011-10-25 10:19:04 +020085 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000086 .mask = WM8994_WSEQ_DONE_EINT,
87 },
88 [WM8994_IRQ_DCS_DONE] = {
Mark Brown8ab30692011-10-25 10:19:04 +020089 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000090 .mask = WM8994_DCS_DONE_EINT,
91 },
92 [WM8994_IRQ_TEMP_WARN] = {
Mark Brown8ab30692011-10-25 10:19:04 +020093 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000094 .mask = WM8994_TEMP_WARN_EINT,
95 },
96 [WM8994_IRQ_GPIO(1)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +000097 .mask = WM8994_GP1_EINT,
98 },
99 [WM8994_IRQ_GPIO(2)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000100 .mask = WM8994_GP2_EINT,
101 },
102 [WM8994_IRQ_GPIO(3)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000103 .mask = WM8994_GP3_EINT,
104 },
105 [WM8994_IRQ_GPIO(4)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000106 .mask = WM8994_GP4_EINT,
107 },
108 [WM8994_IRQ_GPIO(5)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000109 .mask = WM8994_GP5_EINT,
110 },
111 [WM8994_IRQ_GPIO(6)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000112 .mask = WM8994_GP6_EINT,
113 },
114 [WM8994_IRQ_GPIO(7)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000115 .mask = WM8994_GP7_EINT,
116 },
117 [WM8994_IRQ_GPIO(8)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000118 .mask = WM8994_GP8_EINT,
119 },
120 [WM8994_IRQ_GPIO(9)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000121 .mask = WM8994_GP8_EINT,
122 },
123 [WM8994_IRQ_GPIO(10)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000124 .mask = WM8994_GP10_EINT,
125 },
126 [WM8994_IRQ_GPIO(11)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000127 .mask = WM8994_GP11_EINT,
128 },
129};
130
Krzysztof Kozlowski7ce7b262015-04-27 21:54:13 +0900131static const struct regmap_irq_chip wm8994_irq_chip = {
Mark Brown8ab30692011-10-25 10:19:04 +0200132 .name = "wm8994",
133 .irqs = wm8994_irqs,
134 .num_irqs = ARRAY_SIZE(wm8994_irqs),
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000135
Mark Brown8ab30692011-10-25 10:19:04 +0200136 .num_regs = 2,
137 .status_base = WM8994_INTERRUPT_STATUS_1,
138 .mask_base = WM8994_INTERRUPT_STATUS_1_MASK,
139 .ack_base = WM8994_INTERRUPT_STATUS_1,
Mark Brown7a976372012-07-24 15:41:53 +0100140 .runtime_pm = true,
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000141};
142
Mark Brown7c884442013-05-06 16:12:56 +0100143static void wm8994_edge_irq_enable(struct irq_data *data)
144{
145}
146
147static void wm8994_edge_irq_disable(struct irq_data *data)
148{
149}
150
151static struct irq_chip wm8994_edge_irq_chip = {
152 .name = "wm8994_edge",
153 .irq_disable = wm8994_edge_irq_disable,
154 .irq_enable = wm8994_edge_irq_enable,
155};
156
157static irqreturn_t wm8994_edge_irq(int irq, void *data)
158{
159 struct wm8994 *wm8994 = data;
160
161 while (gpio_get_value_cansleep(wm8994->pdata.irq_gpio))
162 handle_nested_irq(irq_create_mapping(wm8994->edge_irq, 0));
163
164 return IRQ_HANDLED;
165}
166
167static int wm8994_edge_irq_map(struct irq_domain *h, unsigned int virq,
168 irq_hw_number_t hw)
169{
170 struct wm8994 *wm8994 = h->host_data;
171
172 irq_set_chip_data(virq, wm8994);
173 irq_set_chip_and_handler(virq, &wm8994_edge_irq_chip, handle_edge_irq);
174 irq_set_nested_thread(virq, 1);
Mark Brown7c884442013-05-06 16:12:56 +0100175 irq_set_noprobe(virq);
Mark Brown7c884442013-05-06 16:12:56 +0100176
177 return 0;
178}
179
Krzysztof Kozlowski7ce7b262015-04-27 21:54:13 +0900180static const struct irq_domain_ops wm8994_edge_irq_ops = {
Mark Brown7c884442013-05-06 16:12:56 +0100181 .map = wm8994_edge_irq_map,
182 .xlate = irq_domain_xlate_twocell,
183};
184
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000185int wm8994_irq_init(struct wm8994 *wm8994)
186{
Mark Brown8ab30692011-10-25 10:19:04 +0200187 int ret;
Mark Brownb0ab9072012-06-01 16:33:19 +0100188 unsigned long irqflags;
Inha Songdd30acc2015-08-07 10:35:59 +0900189 struct wm8994_pdata *pdata = &wm8994->pdata;
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000190
191 if (!wm8994->irq) {
192 dev_warn(wm8994->dev,
193 "No interrupt specified, no interrupts\n");
194 wm8994->irq_base = 0;
195 return 0;
196 }
197
Mark Brownb0ab9072012-06-01 16:33:19 +0100198 /* select user or default irq flags */
199 irqflags = IRQF_TRIGGER_HIGH | IRQF_ONESHOT;
200 if (pdata->irq_flags)
201 irqflags = pdata->irq_flags;
202
Mark Brown7c884442013-05-06 16:12:56 +0100203 /* use a GPIO for edge triggered controllers */
204 if (irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
205 if (gpio_to_irq(pdata->irq_gpio) != wm8994->irq) {
206 dev_warn(wm8994->dev, "IRQ %d is not GPIO %d (%d)\n",
207 wm8994->irq, pdata->irq_gpio,
208 gpio_to_irq(pdata->irq_gpio));
209 wm8994->irq = gpio_to_irq(pdata->irq_gpio);
210 }
211
212 ret = devm_gpio_request_one(wm8994->dev, pdata->irq_gpio,
213 GPIOF_IN, "WM8994 IRQ");
214
215 if (ret != 0) {
216 dev_err(wm8994->dev, "Failed to get IRQ GPIO: %d\n",
217 ret);
218 return ret;
219 }
220
221 wm8994->edge_irq = irq_domain_add_linear(NULL, 1,
222 &wm8994_edge_irq_ops,
223 wm8994);
224
225 ret = regmap_add_irq_chip(wm8994->regmap,
226 irq_create_mapping(wm8994->edge_irq,
227 0),
228 IRQF_ONESHOT,
229 wm8994->irq_base, &wm8994_irq_chip,
230 &wm8994->irq_data);
231 if (ret != 0) {
232 dev_err(wm8994->dev, "Failed to get IRQ: %d\n",
233 ret);
234 return ret;
235 }
236
237 ret = request_threaded_irq(wm8994->irq,
238 NULL, wm8994_edge_irq,
239 irqflags,
240 "WM8994 edge", wm8994);
241 } else {
242 ret = regmap_add_irq_chip(wm8994->regmap, wm8994->irq,
243 irqflags,
244 wm8994->irq_base, &wm8994_irq_chip,
245 &wm8994->irq_data);
246 }
247
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000248 if (ret != 0) {
Mark Brown8ab30692011-10-25 10:19:04 +0200249 dev_err(wm8994->dev, "Failed to register IRQ chip: %d\n", ret);
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000250 return ret;
251 }
252
253 /* Enable top level interrupt if it was masked */
254 wm8994_reg_write(wm8994, WM8994_INTERRUPT_CONTROL, 0);
255
256 return 0;
257}
Lee Jones7821d9b2014-08-22 10:09:27 +0100258EXPORT_SYMBOL(wm8994_irq_init);
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000259
260void wm8994_irq_exit(struct wm8994 *wm8994)
261{
Mark Brown8ab30692011-10-25 10:19:04 +0200262 regmap_del_irq_chip(wm8994->irq, wm8994->irq_data);
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000263}
Lee Jones7821d9b2014-08-22 10:09:27 +0100264EXPORT_SYMBOL(wm8994_irq_exit);