blob: c69f2c4fe5204dd19fb6c6034278042d785f7a36 [file] [log] [blame]
Marcelo Tosattide957c82005-10-28 17:46:13 -07001/*
2 * m8xx_pcmcia.c - Linux PCMCIA socket driver for the mpc8xx series.
3 *
Magnus Dammcbba0de2006-12-13 15:40:18 +09004 * (C) 1999-2000 Magnus Damm <damm@opensource.se>
Marcelo Tosattide957c82005-10-28 17:46:13 -07005 * (C) 2001-2002 Montavista Software, Inc.
6 * <mlocke@mvista.com>
7 *
8 * Support for two slots by Cyclades Corporation
9 * <oliver.kurth@cyclades.de>
10 * Further fixes, v2.6 kernel port
11 * <marcelo.tosatti@cyclades.com>
Vitaly Bordug1371d3b2005-12-08 13:56:12 -020012 *
Vitaly Bordug80128ff2007-07-09 11:37:35 -070013 * Some fixes, additions (C) 2005-2007 Montavista Software, Inc.
Vitaly Bordug1371d3b2005-12-08 13:56:12 -020014 * <vbordug@ru.mvista.com>
Marcelo Tosattide957c82005-10-28 17:46:13 -070015 *
16 * "The ExCA standard specifies that socket controllers should provide
17 * two IO and five memory windows per socket, which can be independently
18 * configured and positioned in the host address space and mapped to
19 * arbitrary segments of card address space. " - David A Hinds. 1999
20 *
21 * This controller does _not_ meet the ExCA standard.
22 *
23 * m8xx pcmcia controller brief info:
24 * + 8 windows (attrib, mem, i/o)
25 * + up to two slots (SLOT_A and SLOT_B)
26 * + inputpins, outputpins, event and mask registers.
27 * - no offset register. sigh.
28 *
29 * Because of the lacking offset register we must map the whole card.
30 * We assign each memory window PCMCIA_MEM_WIN_SIZE address space.
31 * Make sure there is (PCMCIA_MEM_WIN_SIZE * PCMCIA_MEM_WIN_NO
32 * * PCMCIA_SOCKETS_NO) bytes at PCMCIA_MEM_WIN_BASE.
33 * The i/o windows are dynamically allocated at PCMCIA_IO_WIN_BASE.
34 * They are maximum 64KByte each...
35 */
36
37#include <linux/module.h>
38#include <linux/init.h>
39#include <linux/types.h>
40#include <linux/fcntl.h>
41#include <linux/string.h>
42
Marcelo Tosattide957c82005-10-28 17:46:13 -070043#include <linux/kernel.h>
44#include <linux/errno.h>
Marcelo Tosattide957c82005-10-28 17:46:13 -070045#include <linux/slab.h>
46#include <linux/timer.h>
47#include <linux/ioport.h>
48#include <linux/delay.h>
49#include <linux/interrupt.h>
Vitaly Bordug80128ff2007-07-09 11:37:35 -070050#include <linux/fsl_devices.h>
Jiri Slaby1977f032007-10-18 23:40:25 -070051#include <linux/bitops.h>
Stephen Rothwellad19dbd2008-05-23 16:31:08 +100052#include <linux/of_device.h>
53#include <linux/of_platform.h>
Marcelo Tosattide957c82005-10-28 17:46:13 -070054
Vitaly Bordug80128ff2007-07-09 11:37:35 -070055#include <asm/io.h>
Vitaly Bordug80128ff2007-07-09 11:37:35 -070056#include <asm/system.h>
57#include <asm/time.h>
Marcelo Tosattide957c82005-10-28 17:46:13 -070058#include <asm/mpc8xx.h>
59#include <asm/8xx_immap.h>
60#include <asm/irq.h>
Vitaly Bordug80128ff2007-07-09 11:37:35 -070061#include <asm/fs_pd.h>
Marcelo Tosattide957c82005-10-28 17:46:13 -070062
Marcelo Tosattide957c82005-10-28 17:46:13 -070063#include <pcmcia/cs_types.h>
64#include <pcmcia/cs.h>
65#include <pcmcia/ss.h>
66
Dominik Brodowski7d16b652008-08-02 21:02:01 +020067#ifdef CONFIG_PCMCIA_DEBUG
68static int pc_debug;
Marcelo Tosattide957c82005-10-28 17:46:13 -070069module_param(pc_debug, int, 0);
70#define dprintk(args...) printk(KERN_DEBUG "m8xx_pcmcia: " args);
71#else
72#define dprintk(args...)
73#endif
74
75#define pcmcia_info(args...) printk(KERN_INFO "m8xx_pcmcia: "args)
76#define pcmcia_error(args...) printk(KERN_ERR "m8xx_pcmcia: "args)
77
78static const char *version = "Version 0.06, Aug 2005";
79MODULE_LICENSE("Dual MPL/GPL");
80
81#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
82
83/* The RPX series use SLOT_B */
84#if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
85#define CONFIG_PCMCIA_SLOT_B
86#define CONFIG_BD_IS_MHZ
87#endif
88
89/* The ADS board use SLOT_A */
90#ifdef CONFIG_ADS
91#define CONFIG_PCMCIA_SLOT_A
92#define CONFIG_BD_IS_MHZ
93#endif
94
95/* The FADS series are a mess */
96#ifdef CONFIG_FADS
97#if defined(CONFIG_MPC860T) || defined(CONFIG_MPC860) || defined(CONFIG_MPC821)
98#define CONFIG_PCMCIA_SLOT_A
99#else
100#define CONFIG_PCMCIA_SLOT_B
101#endif
102#endif
103
Vitaly Bordug1371d3b2005-12-08 13:56:12 -0200104#if defined(CONFIG_MPC885ADS)
105#define CONFIG_PCMCIA_SLOT_A
106#define PCMCIA_GLITCHY_CD
107#endif
108
Marcelo Tosattide957c82005-10-28 17:46:13 -0700109/* Cyclades ACS uses both slots */
110#ifdef CONFIG_PRxK
111#define CONFIG_PCMCIA_SLOT_A
112#define CONFIG_PCMCIA_SLOT_B
113#endif
114
Vitaly Bordug99121c02007-07-17 04:03:37 -0700115#endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700116
117#if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B)
118
119#define PCMCIA_SOCKETS_NO 2
120/* We have only 8 windows, dualsocket support will be limited. */
121#define PCMCIA_MEM_WIN_NO 2
122#define PCMCIA_IO_WIN_NO 2
123#define PCMCIA_SLOT_MSG "SLOT_A and SLOT_B"
124
125#elif defined(CONFIG_PCMCIA_SLOT_A) || defined(CONFIG_PCMCIA_SLOT_B)
126
127#define PCMCIA_SOCKETS_NO 1
128/* full support for one slot */
129#define PCMCIA_MEM_WIN_NO 5
130#define PCMCIA_IO_WIN_NO 2
131
132/* define _slot_ to be able to optimize macros */
133
134#ifdef CONFIG_PCMCIA_SLOT_A
135#define _slot_ 0
136#define PCMCIA_SLOT_MSG "SLOT_A"
137#else
138#define _slot_ 1
139#define PCMCIA_SLOT_MSG "SLOT_B"
140#endif
141
142#else
143#error m8xx_pcmcia: Bad configuration!
144#endif
145
146/* ------------------------------------------------------------------------- */
147
Vitaly Bordug99121c02007-07-17 04:03:37 -0700148#define PCMCIA_MEM_WIN_BASE 0xe0000000 /* base address for memory window 0 */
149#define PCMCIA_MEM_WIN_SIZE 0x04000000 /* each memory window is 64 MByte */
150#define PCMCIA_IO_WIN_BASE _IO_BASE /* base address for io window 0 */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700151/* ------------------------------------------------------------------------- */
152
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700153static int pcmcia_schlvl;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700154
Ingo Molnar34af9462006-06-27 02:53:55 -0700155static DEFINE_SPINLOCK(events_lock);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700156
Marcelo Tosattide957c82005-10-28 17:46:13 -0700157#define PCMCIA_SOCKET_KEY_5V 1
158#define PCMCIA_SOCKET_KEY_LV 2
159
160/* look up table for pgcrx registers */
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700161static u32 *m8xx_pgcrx[2];
Marcelo Tosattide957c82005-10-28 17:46:13 -0700162
163/*
164 * This structure is used to address each window in the PCMCIA controller.
165 *
166 * Keep in mind that we assume that pcmcia_win[n+1] is mapped directly
167 * after pcmcia_win[n]...
168 */
169
170struct pcmcia_win {
Vitaly Bordug99121c02007-07-17 04:03:37 -0700171 u32 br;
172 u32 or;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700173};
174
175/*
176 * For some reason the hardware guys decided to make both slots share
177 * some registers.
178 *
179 * Could someone invent object oriented hardware ?
180 *
181 * The macros are used to get the right bit from the registers.
182 * SLOT_A : slot = 0
183 * SLOT_B : slot = 1
184 */
185
186#define M8XX_PCMCIA_VS1(slot) (0x80000000 >> (slot << 4))
187#define M8XX_PCMCIA_VS2(slot) (0x40000000 >> (slot << 4))
188#define M8XX_PCMCIA_VS_MASK(slot) (0xc0000000 >> (slot << 4))
189#define M8XX_PCMCIA_VS_SHIFT(slot) (30 - (slot << 4))
190
191#define M8XX_PCMCIA_WP(slot) (0x20000000 >> (slot << 4))
192#define M8XX_PCMCIA_CD2(slot) (0x10000000 >> (slot << 4))
193#define M8XX_PCMCIA_CD1(slot) (0x08000000 >> (slot << 4))
194#define M8XX_PCMCIA_BVD2(slot) (0x04000000 >> (slot << 4))
195#define M8XX_PCMCIA_BVD1(slot) (0x02000000 >> (slot << 4))
196#define M8XX_PCMCIA_RDY(slot) (0x01000000 >> (slot << 4))
197#define M8XX_PCMCIA_RDY_L(slot) (0x00800000 >> (slot << 4))
198#define M8XX_PCMCIA_RDY_H(slot) (0x00400000 >> (slot << 4))
199#define M8XX_PCMCIA_RDY_R(slot) (0x00200000 >> (slot << 4))
200#define M8XX_PCMCIA_RDY_F(slot) (0x00100000 >> (slot << 4))
201#define M8XX_PCMCIA_MASK(slot) (0xFFFF0000 >> (slot << 4))
202
203#define M8XX_PCMCIA_POR_VALID 0x00000001
204#define M8XX_PCMCIA_POR_WRPROT 0x00000002
205#define M8XX_PCMCIA_POR_ATTRMEM 0x00000010
206#define M8XX_PCMCIA_POR_IO 0x00000018
207#define M8XX_PCMCIA_POR_16BIT 0x00000040
208
209#define M8XX_PGCRX(slot) m8xx_pgcrx[slot]
210
211#define M8XX_PGCRX_CXOE 0x00000080
212#define M8XX_PGCRX_CXRESET 0x00000040
213
214/* we keep one lookup table per socket to check flags */
215
Vitaly Bordug99121c02007-07-17 04:03:37 -0700216#define PCMCIA_EVENTS_MAX 5 /* 4 max at a time + termination */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700217
218struct event_table {
219 u32 regbit;
220 u32 eventbit;
221};
222
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700223static const char driver_name[] = "m8xx-pcmcia";
224
Marcelo Tosattide957c82005-10-28 17:46:13 -0700225struct socket_info {
Vitaly Bordug99121c02007-07-17 04:03:37 -0700226 void (*handler) (void *info, u32 events);
227 void *info;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700228
229 u32 slot;
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700230 pcmconf8xx_t *pcmcia;
231 u32 bus_freq;
232 int hwirq;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700233
234 socket_state_t state;
235 struct pccard_mem_map mem_win[PCMCIA_MEM_WIN_NO];
Vitaly Bordug99121c02007-07-17 04:03:37 -0700236 struct pccard_io_map io_win[PCMCIA_IO_WIN_NO];
Marcelo Tosattide957c82005-10-28 17:46:13 -0700237 struct event_table events[PCMCIA_EVENTS_MAX];
238 struct pcmcia_socket socket;
239};
240
241static struct socket_info socket[PCMCIA_SOCKETS_NO];
242
243/*
244 * Search this table to see if the windowsize is
245 * supported...
246 */
247
248#define M8XX_SIZES_NO 32
249
Vitaly Bordug99121c02007-07-17 04:03:37 -0700250static const u32 m8xx_size_to_gray[M8XX_SIZES_NO] = {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700251 0x00000001, 0x00000002, 0x00000008, 0x00000004,
252 0x00000080, 0x00000040, 0x00000010, 0x00000020,
253 0x00008000, 0x00004000, 0x00001000, 0x00002000,
254 0x00000100, 0x00000200, 0x00000800, 0x00000400,
255
256 0x0fffffff, 0xffffffff, 0xffffffff, 0xffffffff,
257 0x01000000, 0x02000000, 0xffffffff, 0x04000000,
258 0x00010000, 0x00020000, 0x00080000, 0x00040000,
259 0x00800000, 0x00400000, 0x00100000, 0x00200000
260};
261
262/* ------------------------------------------------------------------------- */
263
David Howells7d12e782006-10-05 14:55:46 +0100264static irqreturn_t m8xx_interrupt(int irq, void *dev);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700265
Vitaly Bordug99121c02007-07-17 04:03:37 -0700266#define PCMCIA_BMT_LIMIT (15*4) /* Bus Monitor Timeout value */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700267
268/* ------------------------------------------------------------------------- */
269/* board specific stuff: */
270/* voltage_set(), hardware_enable() and hardware_disable() */
271/* ------------------------------------------------------------------------- */
272/* RPX Boards from Embedded Planet */
273
274#if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
275
276/* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
277 * SYPCR is write once only, therefore must the slowest memory be faster
278 * than the bus monitor or we will get a machine check due to the bus timeout.
279 */
280
281#define PCMCIA_BOARD_MSG "RPX CLASSIC or RPX LITE"
282
283#undef PCMCIA_BMT_LIMIT
284#define PCMCIA_BMT_LIMIT (6*8)
285
286static int voltage_set(int slot, int vcc, int vpp)
287{
288 u32 reg = 0;
289
Vitaly Bordug99121c02007-07-17 04:03:37 -0700290 switch (vcc) {
291 case 0:
292 break;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700293 case 33:
294 reg |= BCSR1_PCVCTL4;
295 break;
296 case 50:
297 reg |= BCSR1_PCVCTL5;
298 break;
299 default:
300 return 1;
301 }
302
Vitaly Bordug99121c02007-07-17 04:03:37 -0700303 switch (vpp) {
304 case 0:
305 break;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700306 case 33:
307 case 50:
Vitaly Bordug99121c02007-07-17 04:03:37 -0700308 if (vcc == vpp)
Marcelo Tosattide957c82005-10-28 17:46:13 -0700309 reg |= BCSR1_PCVCTL6;
310 else
311 return 1;
312 break;
313 case 120:
314 reg |= BCSR1_PCVCTL7;
315 default:
316 return 1;
317 }
318
Vitaly Bordug99121c02007-07-17 04:03:37 -0700319 if (!((vcc == 50) || (vcc == 0)))
Marcelo Tosattide957c82005-10-28 17:46:13 -0700320 return 1;
321
322 /* first, turn off all power */
323
Vitaly Bordug99121c02007-07-17 04:03:37 -0700324 out_be32(((u32 *) RPX_CSR_ADDR),
325 in_be32(((u32 *) RPX_CSR_ADDR)) & ~(BCSR1_PCVCTL4 |
326 BCSR1_PCVCTL5 |
327 BCSR1_PCVCTL6 |
328 BCSR1_PCVCTL7));
Marcelo Tosattide957c82005-10-28 17:46:13 -0700329
330 /* enable new powersettings */
331
Vitaly Bordug99121c02007-07-17 04:03:37 -0700332 out_be32(((u32 *) RPX_CSR_ADDR), in_be32(((u32 *) RPX_CSR_ADDR)) | reg);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700333
334 return 0;
335}
336
337#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
Vitaly Bordug99121c02007-07-17 04:03:37 -0700338#define hardware_enable(_slot_) /* No hardware to enable */
339#define hardware_disable(_slot_) /* No hardware to disable */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700340
Vitaly Bordug99121c02007-07-17 04:03:37 -0700341#endif /* CONFIG_RPXCLASSIC */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700342
343/* FADS Boards from Motorola */
344
345#if defined(CONFIG_FADS)
346
347#define PCMCIA_BOARD_MSG "FADS"
348
349static int voltage_set(int slot, int vcc, int vpp)
350{
351 u32 reg = 0;
352
Vitaly Bordug99121c02007-07-17 04:03:37 -0700353 switch (vcc) {
354 case 0:
355 break;
356 case 33:
357 reg |= BCSR1_PCCVCC0;
358 break;
359 case 50:
360 reg |= BCSR1_PCCVCC1;
361 break;
362 default:
363 return 1;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700364 }
365
Vitaly Bordug99121c02007-07-17 04:03:37 -0700366 switch (vpp) {
367 case 0:
368 break;
369 case 33:
370 case 50:
371 if (vcc == vpp)
372 reg |= BCSR1_PCCVPP1;
373 else
Marcelo Tosattide957c82005-10-28 17:46:13 -0700374 return 1;
Vitaly Bordug99121c02007-07-17 04:03:37 -0700375 break;
376 case 120:
377 if ((vcc == 33) || (vcc == 50))
378 reg |= BCSR1_PCCVPP0;
379 else
380 return 1;
381 default:
382 return 1;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700383 }
384
385 /* first, turn off all power */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700386 out_be32((u32 *) BCSR1,
387 in_be32((u32 *) BCSR1) & ~(BCSR1_PCCVCC_MASK |
388 BCSR1_PCCVPP_MASK));
Marcelo Tosattide957c82005-10-28 17:46:13 -0700389
390 /* enable new powersettings */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700391 out_be32((u32 *) BCSR1, in_be32((u32 *) BCSR1) | reg);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700392
393 return 0;
394}
395
396#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
397
398static void hardware_enable(int slot)
399{
Vitaly Bordug99121c02007-07-17 04:03:37 -0700400 out_be32((u32 *) BCSR1, in_be32((u32 *) BCSR1) & ~BCSR1_PCCEN);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700401}
402
403static void hardware_disable(int slot)
404{
Vitaly Bordug99121c02007-07-17 04:03:37 -0700405 out_be32((u32 *) BCSR1, in_be32((u32 *) BCSR1) | BCSR1_PCCEN);
Vitaly Bordug1371d3b2005-12-08 13:56:12 -0200406}
407
408#endif
409
410/* MPC885ADS Boards */
411
412#if defined(CONFIG_MPC885ADS)
413
414#define PCMCIA_BOARD_MSG "MPC885ADS"
Vitaly Bordug1371d3b2005-12-08 13:56:12 -0200415#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
416
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700417static inline void hardware_enable(int slot)
Vitaly Bordug1371d3b2005-12-08 13:56:12 -0200418{
Vitaly Bordug99121c02007-07-17 04:03:37 -0700419 m8xx_pcmcia_ops.hw_ctrl(slot, 1);
Vitaly Bordug1371d3b2005-12-08 13:56:12 -0200420}
421
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700422static inline void hardware_disable(int slot)
Vitaly Bordug1371d3b2005-12-08 13:56:12 -0200423{
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700424 m8xx_pcmcia_ops.hw_ctrl(slot, 0);
425}
Vitaly Bordug1371d3b2005-12-08 13:56:12 -0200426
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700427static inline int voltage_set(int slot, int vcc, int vpp)
428{
429 return m8xx_pcmcia_ops.voltage_set(slot, vcc, vpp);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700430}
431
432#endif
433
434/* ------------------------------------------------------------------------- */
435/* Motorola MBX860 */
436
437#if defined(CONFIG_MBX)
438
439#define PCMCIA_BOARD_MSG "MBX"
440
441static int voltage_set(int slot, int vcc, int vpp)
442{
443 u8 reg = 0;
444
Vitaly Bordug99121c02007-07-17 04:03:37 -0700445 switch (vcc) {
446 case 0:
447 break;
448 case 33:
449 reg |= CSR2_VCC_33;
450 break;
451 case 50:
452 reg |= CSR2_VCC_50;
453 break;
454 default:
455 return 1;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700456 }
457
Vitaly Bordug99121c02007-07-17 04:03:37 -0700458 switch (vpp) {
459 case 0:
460 break;
461 case 33:
462 case 50:
463 if (vcc == vpp)
464 reg |= CSR2_VPP_VCC;
465 else
Marcelo Tosattide957c82005-10-28 17:46:13 -0700466 return 1;
Vitaly Bordug99121c02007-07-17 04:03:37 -0700467 break;
468 case 120:
469 if ((vcc == 33) || (vcc == 50))
470 reg |= CSR2_VPP_12;
471 else
472 return 1;
473 default:
474 return 1;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700475 }
476
477 /* first, turn off all power */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700478 out_8((u8 *) MBX_CSR2_ADDR,
479 in_8((u8 *) MBX_CSR2_ADDR) & ~(CSR2_VCC_MASK | CSR2_VPP_MASK));
Marcelo Tosattide957c82005-10-28 17:46:13 -0700480
481 /* enable new powersettings */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700482 out_8((u8 *) MBX_CSR2_ADDR, in_8((u8 *) MBX_CSR2_ADDR) | reg);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700483
484 return 0;
485}
486
487#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
Vitaly Bordug99121c02007-07-17 04:03:37 -0700488#define hardware_enable(_slot_) /* No hardware to enable */
489#define hardware_disable(_slot_) /* No hardware to disable */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700490
Vitaly Bordug99121c02007-07-17 04:03:37 -0700491#endif /* CONFIG_MBX */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700492
493#if defined(CONFIG_PRxK)
494#include <asm/cpld.h>
495extern volatile fpga_pc_regs *fpga_pc;
496
497#define PCMCIA_BOARD_MSG "MPC855T"
498
499static int voltage_set(int slot, int vcc, int vpp)
500{
501 u8 reg = 0;
502 u8 regread;
503 cpld_regs *ccpld = get_cpld();
504
Vitaly Bordug99121c02007-07-17 04:03:37 -0700505 switch (vcc) {
506 case 0:
507 break;
508 case 33:
509 reg |= PCMCIA_VCC_33;
510 break;
511 case 50:
512 reg |= PCMCIA_VCC_50;
513 break;
514 default:
515 return 1;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700516 }
517
Vitaly Bordug99121c02007-07-17 04:03:37 -0700518 switch (vpp) {
519 case 0:
520 break;
521 case 33:
522 case 50:
523 if (vcc == vpp)
524 reg |= PCMCIA_VPP_VCC;
525 else
Marcelo Tosattide957c82005-10-28 17:46:13 -0700526 return 1;
Vitaly Bordug99121c02007-07-17 04:03:37 -0700527 break;
528 case 120:
529 if ((vcc == 33) || (vcc == 50))
530 reg |= PCMCIA_VPP_12;
531 else
532 return 1;
533 default:
534 return 1;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700535 }
536
537 reg = reg >> (slot << 2);
538 regread = in_8(&ccpld->fpga_pc_ctl);
Vitaly Bordug99121c02007-07-17 04:03:37 -0700539 if (reg !=
540 (regread & ((PCMCIA_VCC_MASK | PCMCIA_VPP_MASK) >> (slot << 2)))) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700541 /* enable new powersettings */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700542 regread =
543 regread & ~((PCMCIA_VCC_MASK | PCMCIA_VPP_MASK) >>
544 (slot << 2));
Marcelo Tosattide957c82005-10-28 17:46:13 -0700545 out_8(&ccpld->fpga_pc_ctl, reg | regread);
546 msleep(100);
547 }
548
549 return 0;
550}
551
552#define socket_get(_slot_) PCMCIA_SOCKET_KEY_LV
Vitaly Bordug99121c02007-07-17 04:03:37 -0700553#define hardware_enable(_slot_) /* No hardware to enable */
554#define hardware_disable(_slot_) /* No hardware to disable */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700555
Vitaly Bordug99121c02007-07-17 04:03:37 -0700556#endif /* CONFIG_PRxK */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700557
Marcelo Tosattide957c82005-10-28 17:46:13 -0700558static u32 pending_events[PCMCIA_SOCKETS_NO];
Ingo Molnar34af9462006-06-27 02:53:55 -0700559static DEFINE_SPINLOCK(pending_event_lock);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700560
David Howells7d12e782006-10-05 14:55:46 +0100561static irqreturn_t m8xx_interrupt(int irq, void *dev)
Marcelo Tosattide957c82005-10-28 17:46:13 -0700562{
563 struct socket_info *s;
564 struct event_table *e;
565 unsigned int i, events, pscr, pipr, per;
Vitaly Bordug99121c02007-07-17 04:03:37 -0700566 pcmconf8xx_t *pcmcia = socket[0].pcmcia;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700567
568 dprintk("Interrupt!\n");
569 /* get interrupt sources */
570
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700571 pscr = in_be32(&pcmcia->pcmc_pscr);
572 pipr = in_be32(&pcmcia->pcmc_pipr);
573 per = in_be32(&pcmcia->pcmc_per);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700574
Vitaly Bordug99121c02007-07-17 04:03:37 -0700575 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700576 s = &socket[i];
577 e = &s->events[0];
578 events = 0;
579
Vitaly Bordug99121c02007-07-17 04:03:37 -0700580 while (e->regbit) {
581 if (pscr & e->regbit)
Marcelo Tosattide957c82005-10-28 17:46:13 -0700582 events |= e->eventbit;
583
Vitaly Bordug99121c02007-07-17 04:03:37 -0700584 e++;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700585 }
586
587 /*
588 * report only if both card detect signals are the same
589 * not too nice done,
590 * we depend on that CD2 is the bit to the left of CD1...
591 */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700592 if (events & SS_DETECT)
593 if (((pipr & M8XX_PCMCIA_CD2(i)) >> 1) ^
594 (pipr & M8XX_PCMCIA_CD1(i))) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700595 events &= ~SS_DETECT;
596 }
Marcelo Tosattide957c82005-10-28 17:46:13 -0700597#ifdef PCMCIA_GLITCHY_CD
598 /*
599 * I've experienced CD problems with my ADS board.
600 * We make an extra check to see if there was a
601 * real change of Card detection.
602 */
603
Vitaly Bordug99121c02007-07-17 04:03:37 -0700604 if ((events & SS_DETECT) &&
605 ((pipr &
606 (M8XX_PCMCIA_CD2(i) | M8XX_PCMCIA_CD1(i))) == 0) &&
607 (s->state.Vcc | s->state.Vpp)) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700608 events &= ~SS_DETECT;
609 /*printk( "CD glitch workaround - CD = 0x%08x!\n",
Vitaly Bordug99121c02007-07-17 04:03:37 -0700610 (pipr & (M8XX_PCMCIA_CD2(i)
611 | M8XX_PCMCIA_CD1(i)))); */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700612 }
613#endif
614
615 /* call the handler */
616
617 dprintk("slot %u: events = 0x%02x, pscr = 0x%08x, "
Vitaly Bordug99121c02007-07-17 04:03:37 -0700618 "pipr = 0x%08x\n", i, events, pscr, pipr);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700619
Vitaly Bordug99121c02007-07-17 04:03:37 -0700620 if (events) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700621 spin_lock(&pending_event_lock);
622 pending_events[i] |= events;
623 spin_unlock(&pending_event_lock);
624 /*
625 * Turn off RDY_L bits in the PER mask on
626 * CD interrupt receival.
627 *
628 * They can generate bad interrupts on the
629 * ACS4,8,16,32. - marcelo
630 */
631 per &= ~M8XX_PCMCIA_RDY_L(0);
632 per &= ~M8XX_PCMCIA_RDY_L(1);
633
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700634 out_be32(&pcmcia->pcmc_per, per);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700635
636 if (events)
637 pcmcia_parse_events(&socket[i].socket, events);
638 }
639 }
640
641 /* clear the interrupt sources */
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700642 out_be32(&pcmcia->pcmc_pscr, pscr);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700643
644 dprintk("Interrupt done.\n");
645
646 return IRQ_HANDLED;
647}
648
649static u32 m8xx_get_graycode(u32 size)
650{
651 u32 k;
652
Vitaly Bordug99121c02007-07-17 04:03:37 -0700653 for (k = 0; k < M8XX_SIZES_NO; k++)
654 if (m8xx_size_to_gray[k] == size)
Marcelo Tosattide957c82005-10-28 17:46:13 -0700655 break;
656
Vitaly Bordug99121c02007-07-17 04:03:37 -0700657 if ((k == M8XX_SIZES_NO) || (m8xx_size_to_gray[k] == -1))
Marcelo Tosattide957c82005-10-28 17:46:13 -0700658 k = -1;
659
660 return k;
661}
662
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700663static u32 m8xx_get_speed(u32 ns, u32 is_io, u32 bus_freq)
Marcelo Tosattide957c82005-10-28 17:46:13 -0700664{
665 u32 reg, clocks, psst, psl, psht;
666
Vitaly Bordug99121c02007-07-17 04:03:37 -0700667 if (!ns) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700668
669 /*
670 * We get called with IO maps setup to 0ns
671 * if not specified by the user.
672 * They should be 255ns.
673 */
674
Vitaly Bordug99121c02007-07-17 04:03:37 -0700675 if (is_io)
Marcelo Tosattide957c82005-10-28 17:46:13 -0700676 ns = 255;
677 else
Vitaly Bordug99121c02007-07-17 04:03:37 -0700678 ns = 100; /* fast memory if 0 */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700679 }
680
681 /*
682 * In PSST, PSL, PSHT fields we tell the controller
683 * timing parameters in CLKOUT clock cycles.
684 * CLKOUT is the same as GCLK2_50.
685 */
686
687/* how we want to adjust the timing - in percent */
688
Vitaly Bordug99121c02007-07-17 04:03:37 -0700689#define ADJ 180 /* 80 % longer accesstime - to be sure */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700690
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700691 clocks = ((bus_freq / 1000) * ns) / 1000;
Vitaly Bordug99121c02007-07-17 04:03:37 -0700692 clocks = (clocks * ADJ) / (100 * 1000);
693 if (clocks >= PCMCIA_BMT_LIMIT) {
694 printk("Max access time limit reached\n");
695 clocks = PCMCIA_BMT_LIMIT - 1;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700696 }
697
Vitaly Bordug99121c02007-07-17 04:03:37 -0700698 psst = clocks / 7; /* setup time */
699 psht = clocks / 7; /* hold time */
700 psl = (clocks * 5) / 7; /* strobe length */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700701
702 psst += clocks - (psst + psht + psl);
703
Vitaly Bordug99121c02007-07-17 04:03:37 -0700704 reg = psst << 12;
705 reg |= psl << 7;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700706 reg |= psht << 16;
707
708 return reg;
709}
710
711static int m8xx_get_status(struct pcmcia_socket *sock, unsigned int *value)
712{
713 int lsock = container_of(sock, struct socket_info, socket)->slot;
714 struct socket_info *s = &socket[lsock];
715 unsigned int pipr, reg;
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700716 pcmconf8xx_t *pcmcia = s->pcmcia;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700717
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700718 pipr = in_be32(&pcmcia->pcmc_pipr);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700719
Vitaly Bordug99121c02007-07-17 04:03:37 -0700720 *value = ((pipr & (M8XX_PCMCIA_CD1(lsock)
721 | M8XX_PCMCIA_CD2(lsock))) == 0) ? SS_DETECT : 0;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700722 *value |= (pipr & M8XX_PCMCIA_WP(lsock)) ? SS_WRPROT : 0;
723
724 if (s->state.flags & SS_IOCARD)
725 *value |= (pipr & M8XX_PCMCIA_BVD1(lsock)) ? SS_STSCHG : 0;
726 else {
727 *value |= (pipr & M8XX_PCMCIA_RDY(lsock)) ? SS_READY : 0;
728 *value |= (pipr & M8XX_PCMCIA_BVD1(lsock)) ? SS_BATDEAD : 0;
729 *value |= (pipr & M8XX_PCMCIA_BVD2(lsock)) ? SS_BATWARN : 0;
730 }
731
732 if (s->state.Vcc | s->state.Vpp)
733 *value |= SS_POWERON;
734
735 /*
736 * Voltage detection:
737 * This driver only supports 16-Bit pc-cards.
738 * Cardbus is not handled here.
739 *
740 * To determine what voltage to use we must read the VS1 and VS2 pin.
741 * Depending on what socket type is present,
742 * different combinations mean different things.
743 *
744 * Card Key Socket Key VS1 VS2 Card Vcc for CIS parse
745 *
746 * 5V 5V, LV* NC NC 5V only 5V (if available)
747 *
748 * 5V 5V, LV* GND NC 5 or 3.3V as low as possible
749 *
750 * 5V 5V, LV* GND GND 5, 3.3, x.xV as low as possible
751 *
752 * LV* 5V - - shall not fit into socket
753 *
754 * LV* LV* GND NC 3.3V only 3.3V
755 *
756 * LV* LV* NC GND x.xV x.xV (if avail.)
757 *
758 * LV* LV* GND GND 3.3 or x.xV as low as possible
759 *
760 * *LV means Low Voltage
761 *
762 *
763 * That gives us the following table:
764 *
765 * Socket VS1 VS2 Voltage
766 *
767 * 5V NC NC 5V
768 * 5V NC GND none (should not be possible)
769 * 5V GND NC >= 3.3V
770 * 5V GND GND >= x.xV
771 *
772 * LV NC NC 5V (if available)
773 * LV NC GND x.xV (if available)
774 * LV GND NC 3.3V
775 * LV GND GND >= x.xV
776 *
777 * So, how do I determine if I have a 5V or a LV
778 * socket on my board? Look at the socket!
779 *
780 *
781 * Socket with 5V key:
782 * ++--------------------------------------------+
783 * || |
784 * || ||
785 * || ||
786 * | |
787 * +---------------------------------------------+
788 *
789 * Socket with LV key:
790 * ++--------------------------------------------+
791 * || |
792 * | ||
793 * | ||
794 * | |
795 * +---------------------------------------------+
796 *
797 *
798 * With other words - LV only cards does not fit
799 * into the 5V socket!
800 */
801
802 /* read out VS1 and VS2 */
803
804 reg = (pipr & M8XX_PCMCIA_VS_MASK(lsock))
Vitaly Bordug99121c02007-07-17 04:03:37 -0700805 >> M8XX_PCMCIA_VS_SHIFT(lsock);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700806
Vitaly Bordug99121c02007-07-17 04:03:37 -0700807 if (socket_get(lsock) == PCMCIA_SOCKET_KEY_LV) {
808 switch (reg) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700809 case 1:
810 *value |= SS_3VCARD;
Vitaly Bordug99121c02007-07-17 04:03:37 -0700811 break; /* GND, NC - 3.3V only */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700812 case 2:
813 *value |= SS_XVCARD;
Vitaly Bordug99121c02007-07-17 04:03:37 -0700814 break; /* NC. GND - x.xV only */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700815 };
816 }
817
818 dprintk("GetStatus(%d) = %#2.2x\n", lsock, *value);
819 return 0;
820}
821
Vitaly Bordug99121c02007-07-17 04:03:37 -0700822static int m8xx_set_socket(struct pcmcia_socket *sock, socket_state_t * state)
Marcelo Tosattide957c82005-10-28 17:46:13 -0700823{
824 int lsock = container_of(sock, struct socket_info, socket)->slot;
825 struct socket_info *s = &socket[lsock];
826 struct event_table *e;
827 unsigned int reg;
828 unsigned long flags;
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700829 pcmconf8xx_t *pcmcia = socket[0].pcmcia;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700830
Vitaly Bordug99121c02007-07-17 04:03:37 -0700831 dprintk("SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
832 "io_irq %d, csc_mask %#2.2x)\n", lsock, state->flags,
833 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700834
835 /* First, set voltage - bail out if invalid */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700836 if (voltage_set(lsock, state->Vcc, state->Vpp))
Marcelo Tosattide957c82005-10-28 17:46:13 -0700837 return -EINVAL;
838
839 /* Take care of reset... */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700840 if (state->flags & SS_RESET)
841 out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) | M8XX_PGCRX_CXRESET); /* active high */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700842 else
Vitaly Bordug99121c02007-07-17 04:03:37 -0700843 out_be32(M8XX_PGCRX(lsock),
844 in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXRESET);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700845
846 /* ... and output enable. */
847
848 /* The CxOE signal is connected to a 74541 on the ADS.
849 I guess most other boards used the ADS as a reference.
850 I tried to control the CxOE signal with SS_OUTPUT_ENA,
851 but the reset signal seems connected via the 541.
852 If the CxOE is left high are some signals tristated and
Joe Perchesf26fc4e2008-02-03 17:26:02 +0200853 no pullups are present -> the cards act weird.
Marcelo Tosattide957c82005-10-28 17:46:13 -0700854 So right now the buffers are enabled if the power is on. */
855
Vitaly Bordug99121c02007-07-17 04:03:37 -0700856 if (state->Vcc || state->Vpp)
857 out_be32(M8XX_PGCRX(lsock), in_be32(M8XX_PGCRX(lsock)) & ~M8XX_PGCRX_CXOE); /* active low */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700858 else
Vitaly Bordug99121c02007-07-17 04:03:37 -0700859 out_be32(M8XX_PGCRX(lsock),
860 in_be32(M8XX_PGCRX(lsock)) | M8XX_PGCRX_CXOE);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700861
862 /*
863 * We'd better turn off interrupts before
864 * we mess with the events-table..
865 */
866
867 spin_lock_irqsave(&events_lock, flags);
868
869 /*
870 * Play around with the interrupt mask to be able to
871 * give the events the generic pcmcia driver wants us to.
872 */
873
874 e = &s->events[0];
875 reg = 0;
876
Vitaly Bordug99121c02007-07-17 04:03:37 -0700877 if (state->csc_mask & SS_DETECT) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700878 e->eventbit = SS_DETECT;
879 reg |= e->regbit = (M8XX_PCMCIA_CD2(lsock)
880 | M8XX_PCMCIA_CD1(lsock));
881 e++;
882 }
Vitaly Bordug99121c02007-07-17 04:03:37 -0700883 if (state->flags & SS_IOCARD) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700884 /*
885 * I/O card
886 */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700887 if (state->csc_mask & SS_STSCHG) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700888 e->eventbit = SS_STSCHG;
889 reg |= e->regbit = M8XX_PCMCIA_BVD1(lsock);
890 e++;
891 }
892 /*
893 * If io_irq is non-zero we should enable irq.
894 */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700895 if (state->io_irq) {
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700896 out_be32(M8XX_PGCRX(lsock),
Vitaly Bordug99121c02007-07-17 04:03:37 -0700897 in_be32(M8XX_PGCRX(lsock)) |
898 mk_int_int_mask(s->hwirq) << 24);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700899 /*
900 * Strange thing here:
901 * The manual does not tell us which interrupt
902 * the sources generate.
903 * Anyhow, I found out that RDY_L generates IREQLVL.
904 *
905 * We use level triggerd interrupts, and they don't
906 * have to be cleared in PSCR in the interrupt handler.
907 */
908 reg |= M8XX_PCMCIA_RDY_L(lsock);
Vitaly Bordug99121c02007-07-17 04:03:37 -0700909 } else
910 out_be32(M8XX_PGCRX(lsock),
911 in_be32(M8XX_PGCRX(lsock)) & 0x00ffffff);
912 } else {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700913 /*
914 * Memory card
915 */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700916 if (state->csc_mask & SS_BATDEAD) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700917 e->eventbit = SS_BATDEAD;
918 reg |= e->regbit = M8XX_PCMCIA_BVD1(lsock);
919 e++;
920 }
Vitaly Bordug99121c02007-07-17 04:03:37 -0700921 if (state->csc_mask & SS_BATWARN) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700922 e->eventbit = SS_BATWARN;
923 reg |= e->regbit = M8XX_PCMCIA_BVD2(lsock);
924 e++;
925 }
926 /* What should I trigger on - low/high,raise,fall? */
Vitaly Bordug99121c02007-07-17 04:03:37 -0700927 if (state->csc_mask & SS_READY) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700928 e->eventbit = SS_READY;
Vitaly Bordug99121c02007-07-17 04:03:37 -0700929 reg |= e->regbit = 0; //??
Marcelo Tosattide957c82005-10-28 17:46:13 -0700930 e++;
931 }
932 }
933
Vitaly Bordug99121c02007-07-17 04:03:37 -0700934 e->regbit = 0; /* terminate list */
Marcelo Tosattide957c82005-10-28 17:46:13 -0700935
936 /*
937 * Clear the status changed .
938 * Port A and Port B share the same port.
939 * Writing ones will clear the bits.
940 */
941
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700942 out_be32(&pcmcia->pcmc_pscr, reg);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700943
944 /*
945 * Write the mask.
946 * Port A and Port B share the same port.
947 * Need for read-modify-write.
948 * Ones will enable the interrupt.
949 */
950
Vitaly Bordug99121c02007-07-17 04:03:37 -0700951 reg |=
952 in_be32(&pcmcia->
953 pcmc_per) & (M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1));
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700954 out_be32(&pcmcia->pcmc_per, reg);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700955
956 spin_unlock_irqrestore(&events_lock, flags);
957
958 /* copy the struct and modify the copy */
959
960 s->state = *state;
961
962 return 0;
963}
964
965static int m8xx_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
966{
967 int lsock = container_of(sock, struct socket_info, socket)->slot;
968
969 struct socket_info *s = &socket[lsock];
970 struct pcmcia_win *w;
971 unsigned int reg, winnr;
Vitaly Bordug80128ff2007-07-09 11:37:35 -0700972 pcmconf8xx_t *pcmcia = s->pcmcia;
973
Marcelo Tosattide957c82005-10-28 17:46:13 -0700974#define M8XX_SIZE (io->stop - io->start + 1)
975#define M8XX_BASE (PCMCIA_IO_WIN_BASE + io->start)
976
Vitaly Bordug99121c02007-07-17 04:03:37 -0700977 dprintk("SetIOMap(%d, %d, %#2.2x, %d ns, "
978 "%#4.4x-%#4.4x)\n", lsock, io->map, io->flags,
979 io->speed, io->start, io->stop);
Marcelo Tosattide957c82005-10-28 17:46:13 -0700980
981 if ((io->map >= PCMCIA_IO_WIN_NO) || (io->start > 0xffff)
982 || (io->stop > 0xffff) || (io->stop < io->start))
983 return -EINVAL;
984
Vitaly Bordug99121c02007-07-17 04:03:37 -0700985 if ((reg = m8xx_get_graycode(M8XX_SIZE)) == -1)
Marcelo Tosattide957c82005-10-28 17:46:13 -0700986 return -EINVAL;
987
Vitaly Bordug99121c02007-07-17 04:03:37 -0700988 if (io->flags & MAP_ACTIVE) {
Marcelo Tosattide957c82005-10-28 17:46:13 -0700989
Vitaly Bordug99121c02007-07-17 04:03:37 -0700990 dprintk("io->flags & MAP_ACTIVE\n");
Marcelo Tosattide957c82005-10-28 17:46:13 -0700991
992 winnr = (PCMCIA_MEM_WIN_NO * PCMCIA_SOCKETS_NO)
Vitaly Bordug99121c02007-07-17 04:03:37 -0700993 + (lsock * PCMCIA_IO_WIN_NO) + io->map;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700994
995 /* setup registers */
996
Vitaly Bordug99121c02007-07-17 04:03:37 -0700997 w = (void *)&pcmcia->pcmc_pbr0;
Marcelo Tosattide957c82005-10-28 17:46:13 -0700998 w += winnr;
999
Vitaly Bordug99121c02007-07-17 04:03:37 -07001000 out_be32(&w->or, 0); /* turn off window first */
Marcelo Tosattide957c82005-10-28 17:46:13 -07001001 out_be32(&w->br, M8XX_BASE);
1002
1003 reg <<= 27;
Vitaly Bordug99121c02007-07-17 04:03:37 -07001004 reg |= M8XX_PCMCIA_POR_IO | (lsock << 2);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001005
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001006 reg |= m8xx_get_speed(io->speed, 1, s->bus_freq);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001007
Vitaly Bordug99121c02007-07-17 04:03:37 -07001008 if (io->flags & MAP_WRPROT)
Marcelo Tosattide957c82005-10-28 17:46:13 -07001009 reg |= M8XX_PCMCIA_POR_WRPROT;
1010
Vitaly Bordug99121c02007-07-17 04:03:37 -07001011 /*if(io->flags & (MAP_16BIT | MAP_AUTOSZ)) */
1012 if (io->flags & MAP_16BIT)
Marcelo Tosattide957c82005-10-28 17:46:13 -07001013 reg |= M8XX_PCMCIA_POR_16BIT;
1014
Vitaly Bordug99121c02007-07-17 04:03:37 -07001015 if (io->flags & MAP_ACTIVE)
Marcelo Tosattide957c82005-10-28 17:46:13 -07001016 reg |= M8XX_PCMCIA_POR_VALID;
1017
1018 out_be32(&w->or, reg);
1019
1020 dprintk("Socket %u: Mapped io window %u at %#8.8x, "
Vitaly Bordug99121c02007-07-17 04:03:37 -07001021 "OR = %#8.8x.\n", lsock, io->map, w->br, w->or);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001022 } else {
1023 /* shutdown IO window */
1024 winnr = (PCMCIA_MEM_WIN_NO * PCMCIA_SOCKETS_NO)
Vitaly Bordug99121c02007-07-17 04:03:37 -07001025 + (lsock * PCMCIA_IO_WIN_NO) + io->map;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001026
1027 /* setup registers */
1028
Vitaly Bordug99121c02007-07-17 04:03:37 -07001029 w = (void *)&pcmcia->pcmc_pbr0;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001030 w += winnr;
1031
Vitaly Bordug99121c02007-07-17 04:03:37 -07001032 out_be32(&w->or, 0); /* turn off window */
1033 out_be32(&w->br, 0); /* turn off base address */
Marcelo Tosattide957c82005-10-28 17:46:13 -07001034
1035 dprintk("Socket %u: Unmapped io window %u at %#8.8x, "
1036 "OR = %#8.8x.\n", lsock, io->map, w->br, w->or);
1037 }
1038
1039 /* copy the struct and modify the copy */
1040 s->io_win[io->map] = *io;
Vitaly Bordug99121c02007-07-17 04:03:37 -07001041 s->io_win[io->map].flags &= (MAP_WRPROT | MAP_16BIT | MAP_ACTIVE);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001042 dprintk("SetIOMap exit\n");
1043
1044 return 0;
1045}
1046
Vitaly Bordug99121c02007-07-17 04:03:37 -07001047static int m8xx_set_mem_map(struct pcmcia_socket *sock,
1048 struct pccard_mem_map *mem)
Marcelo Tosattide957c82005-10-28 17:46:13 -07001049{
1050 int lsock = container_of(sock, struct socket_info, socket)->slot;
1051 struct socket_info *s = &socket[lsock];
1052 struct pcmcia_win *w;
1053 struct pccard_mem_map *old;
1054 unsigned int reg, winnr;
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001055 pcmconf8xx_t *pcmcia = s->pcmcia;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001056
Vitaly Bordug99121c02007-07-17 04:03:37 -07001057 dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, "
1058 "%#5.5lx, %#5.5x)\n", lsock, mem->map, mem->flags,
1059 mem->speed, mem->static_start, mem->card_start);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001060
1061 if ((mem->map >= PCMCIA_MEM_WIN_NO)
Vitaly Bordug99121c02007-07-17 04:03:37 -07001062// || ((mem->s) >= PCMCIA_MEM_WIN_SIZE)
Marcelo Tosattide957c82005-10-28 17:46:13 -07001063 || (mem->card_start >= 0x04000000)
Vitaly Bordug99121c02007-07-17 04:03:37 -07001064 || (mem->static_start & 0xfff) /* 4KByte resolution */
1065 ||(mem->card_start & 0xfff))
Marcelo Tosattide957c82005-10-28 17:46:13 -07001066 return -EINVAL;
1067
Vitaly Bordug99121c02007-07-17 04:03:37 -07001068 if ((reg = m8xx_get_graycode(PCMCIA_MEM_WIN_SIZE)) == -1) {
1069 printk("Cannot set size to 0x%08x.\n", PCMCIA_MEM_WIN_SIZE);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001070 return -EINVAL;
1071 }
1072 reg <<= 27;
1073
1074 winnr = (lsock * PCMCIA_MEM_WIN_NO) + mem->map;
1075
1076 /* Setup the window in the pcmcia controller */
1077
Vitaly Bordug99121c02007-07-17 04:03:37 -07001078 w = (void *)&pcmcia->pcmc_pbr0;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001079 w += winnr;
1080
1081 reg |= lsock << 2;
1082
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001083 reg |= m8xx_get_speed(mem->speed, 0, s->bus_freq);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001084
Vitaly Bordug99121c02007-07-17 04:03:37 -07001085 if (mem->flags & MAP_ATTRIB)
1086 reg |= M8XX_PCMCIA_POR_ATTRMEM;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001087
Vitaly Bordug99121c02007-07-17 04:03:37 -07001088 if (mem->flags & MAP_WRPROT)
Marcelo Tosattide957c82005-10-28 17:46:13 -07001089 reg |= M8XX_PCMCIA_POR_WRPROT;
1090
Vitaly Bordug99121c02007-07-17 04:03:37 -07001091 if (mem->flags & MAP_16BIT)
Marcelo Tosattide957c82005-10-28 17:46:13 -07001092 reg |= M8XX_PCMCIA_POR_16BIT;
1093
Vitaly Bordug99121c02007-07-17 04:03:37 -07001094 if (mem->flags & MAP_ACTIVE)
Marcelo Tosattide957c82005-10-28 17:46:13 -07001095 reg |= M8XX_PCMCIA_POR_VALID;
1096
1097 out_be32(&w->or, reg);
1098
1099 dprintk("Socket %u: Mapped memory window %u at %#8.8x, "
Vitaly Bordug99121c02007-07-17 04:03:37 -07001100 "OR = %#8.8x.\n", lsock, mem->map, w->br, w->or);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001101
Vitaly Bordug99121c02007-07-17 04:03:37 -07001102 if (mem->flags & MAP_ACTIVE) {
Marcelo Tosattide957c82005-10-28 17:46:13 -07001103 /* get the new base address */
1104 mem->static_start = PCMCIA_MEM_WIN_BASE +
Vitaly Bordug99121c02007-07-17 04:03:37 -07001105 (PCMCIA_MEM_WIN_SIZE * winnr)
1106 + mem->card_start;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001107 }
1108
1109 dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, "
Vitaly Bordug99121c02007-07-17 04:03:37 -07001110 "%#5.5lx, %#5.5x)\n", lsock, mem->map, mem->flags,
1111 mem->speed, mem->static_start, mem->card_start);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001112
1113 /* copy the struct and modify the copy */
1114
1115 old = &s->mem_win[mem->map];
1116
1117 *old = *mem;
Vitaly Bordug99121c02007-07-17 04:03:37 -07001118 old->flags &= (MAP_ATTRIB | MAP_WRPROT | MAP_16BIT | MAP_ACTIVE);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001119
1120 return 0;
1121}
1122
1123static int m8xx_sock_init(struct pcmcia_socket *sock)
1124{
1125 int i;
1126 pccard_io_map io = { 0, 0, 0, 0, 1 };
1127 pccard_mem_map mem = { 0, 0, 0, 0, 0, 0 };
1128
Vitaly Bordug99121c02007-07-17 04:03:37 -07001129 dprintk("sock_init(%d)\n", s);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001130
1131 m8xx_set_socket(sock, &dead_socket);
1132 for (i = 0; i < PCMCIA_IO_WIN_NO; i++) {
1133 io.map = i;
1134 m8xx_set_io_map(sock, &io);
1135 }
1136 for (i = 0; i < PCMCIA_MEM_WIN_NO; i++) {
1137 mem.map = i;
1138 m8xx_set_mem_map(sock, &mem);
1139 }
1140
1141 return 0;
1142
1143}
1144
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001145static int m8xx_sock_suspend(struct pcmcia_socket *sock)
Marcelo Tosattide957c82005-10-28 17:46:13 -07001146{
1147 return m8xx_set_socket(sock, &dead_socket);
1148}
1149
1150static struct pccard_operations m8xx_services = {
Vitaly Bordug99121c02007-07-17 04:03:37 -07001151 .init = m8xx_sock_init,
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001152 .suspend = m8xx_sock_suspend,
Marcelo Tosattide957c82005-10-28 17:46:13 -07001153 .get_status = m8xx_get_status,
Marcelo Tosattide957c82005-10-28 17:46:13 -07001154 .set_socket = m8xx_set_socket,
1155 .set_io_map = m8xx_set_io_map,
1156 .set_mem_map = m8xx_set_mem_map,
1157};
1158
Vitaly Bordug99121c02007-07-17 04:03:37 -07001159static int __init m8xx_probe(struct of_device *ofdev,
1160 const struct of_device_id *match)
Marcelo Tosattide957c82005-10-28 17:46:13 -07001161{
1162 struct pcmcia_win *w;
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001163 unsigned int i, m, hwirq;
1164 pcmconf8xx_t *pcmcia;
1165 int status;
1166 struct device_node *np = ofdev->node;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001167
1168 pcmcia_info("%s\n", version);
1169
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001170 pcmcia = of_iomap(np, 0);
Vitaly Bordug99121c02007-07-17 04:03:37 -07001171 if (pcmcia == NULL)
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001172 return -EINVAL;
1173
1174 pcmcia_schlvl = irq_of_parse_and_map(np, 0);
Vitaly Bordug99121c02007-07-17 04:03:37 -07001175 hwirq = irq_map[pcmcia_schlvl].hwirq;
Julia Lawall5a1c3e1a2008-02-04 22:27:44 -08001176 if (pcmcia_schlvl < 0) {
1177 iounmap(pcmcia);
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001178 return -EINVAL;
Julia Lawall5a1c3e1a2008-02-04 22:27:44 -08001179 }
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001180
1181 m8xx_pgcrx[0] = &pcmcia->pcmc_pgcra;
1182 m8xx_pgcrx[1] = &pcmcia->pcmc_pgcrb;
1183
Marcelo Tosattide957c82005-10-28 17:46:13 -07001184 pcmcia_info(PCMCIA_BOARD_MSG " using " PCMCIA_SLOT_MSG
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001185 " with IRQ %u (%d). \n", pcmcia_schlvl, hwirq);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001186
1187 /* Configure Status change interrupt */
1188
Vitaly Bordug99121c02007-07-17 04:03:37 -07001189 if (request_irq(pcmcia_schlvl, m8xx_interrupt, IRQF_SHARED,
1190 driver_name, socket)) {
Marcelo Tosattide957c82005-10-28 17:46:13 -07001191 pcmcia_error("Cannot allocate IRQ %u for SCHLVL!\n",
1192 pcmcia_schlvl);
Julia Lawall5a1c3e1a2008-02-04 22:27:44 -08001193 iounmap(pcmcia);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001194 return -1;
1195 }
1196
Vitaly Bordug99121c02007-07-17 04:03:37 -07001197 w = (void *)&pcmcia->pcmc_pbr0;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001198
Vitaly Bordug99121c02007-07-17 04:03:37 -07001199 out_be32(&pcmcia->pcmc_pscr, M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1));
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001200 clrbits32(&pcmcia->pcmc_per, M8XX_PCMCIA_MASK(0) | M8XX_PCMCIA_MASK(1));
Marcelo Tosattide957c82005-10-28 17:46:13 -07001201
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001202 /* connect interrupt and disable CxOE */
Marcelo Tosattide957c82005-10-28 17:46:13 -07001203
Vitaly Bordug99121c02007-07-17 04:03:37 -07001204 out_be32(M8XX_PGCRX(0),
1205 M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16));
1206 out_be32(M8XX_PGCRX(1),
1207 M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16));
Marcelo Tosattide957c82005-10-28 17:46:13 -07001208
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001209 /* intialize the fixed memory windows */
Marcelo Tosattide957c82005-10-28 17:46:13 -07001210
Vitaly Bordug99121c02007-07-17 04:03:37 -07001211 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001212 for (m = 0; m < PCMCIA_MEM_WIN_NO; m++) {
Marcelo Tosattide957c82005-10-28 17:46:13 -07001213 out_be32(&w->br, PCMCIA_MEM_WIN_BASE +
Vitaly Bordug99121c02007-07-17 04:03:37 -07001214 (PCMCIA_MEM_WIN_SIZE
1215 * (m + i * PCMCIA_MEM_WIN_NO)));
Marcelo Tosattide957c82005-10-28 17:46:13 -07001216
Vitaly Bordug99121c02007-07-17 04:03:37 -07001217 out_be32(&w->or, 0); /* set to not valid */
Marcelo Tosattide957c82005-10-28 17:46:13 -07001218
1219 w++;
1220 }
1221 }
1222
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001223 /* turn off voltage */
Marcelo Tosattide957c82005-10-28 17:46:13 -07001224 voltage_set(0, 0, 0);
1225 voltage_set(1, 0, 0);
1226
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001227 /* Enable external hardware */
Marcelo Tosattide957c82005-10-28 17:46:13 -07001228 hardware_enable(0);
1229 hardware_enable(1);
1230
Vitaly Bordug99121c02007-07-17 04:03:37 -07001231 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
Marcelo Tosattide957c82005-10-28 17:46:13 -07001232 socket[i].slot = i;
1233 socket[i].socket.owner = THIS_MODULE;
Vitaly Bordug99121c02007-07-17 04:03:37 -07001234 socket[i].socket.features =
1235 SS_CAP_PCCARD | SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001236 socket[i].socket.irq_mask = 0x000;
1237 socket[i].socket.map_size = 0x1000;
1238 socket[i].socket.io_offset = 0;
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001239 socket[i].socket.pci_irq = pcmcia_schlvl;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001240 socket[i].socket.ops = &m8xx_services;
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001241 socket[i].socket.resource_ops = &pccard_nonstatic_ops;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001242 socket[i].socket.cb_dev = NULL;
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001243 socket[i].socket.dev.parent = &ofdev->dev;
1244 socket[i].pcmcia = pcmcia;
1245 socket[i].bus_freq = ppc_proc_freq;
1246 socket[i].hwirq = hwirq;
1247
Marcelo Tosattide957c82005-10-28 17:46:13 -07001248 }
1249
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001250 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
1251 status = pcmcia_register_socket(&socket[i].socket);
1252 if (status < 0)
1253 pcmcia_error("Socket register failed\n");
1254 }
Marcelo Tosattide957c82005-10-28 17:46:13 -07001255
1256 return 0;
1257}
1258
Vitaly Bordug99121c02007-07-17 04:03:37 -07001259static int m8xx_remove(struct of_device *ofdev)
Marcelo Tosattide957c82005-10-28 17:46:13 -07001260{
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001261 u32 m, i;
1262 struct pcmcia_win *w;
1263 pcmconf8xx_t *pcmcia = socket[0].pcmcia;
Marcelo Tosattide957c82005-10-28 17:46:13 -07001264
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001265 for (i = 0; i < PCMCIA_SOCKETS_NO; i++) {
Vitaly Bordug99121c02007-07-17 04:03:37 -07001266 w = (void *)&pcmcia->pcmc_pbr0;
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001267
1268 out_be32(&pcmcia->pcmc_pscr, M8XX_PCMCIA_MASK(i));
1269 out_be32(&pcmcia->pcmc_per,
Vitaly Bordug99121c02007-07-17 04:03:37 -07001270 in_be32(&pcmcia->pcmc_per) & ~M8XX_PCMCIA_MASK(i));
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001271
1272 /* turn off interrupt and disable CxOE */
1273 out_be32(M8XX_PGCRX(i), M8XX_PGCRX_CXOE);
1274
1275 /* turn off memory windows */
1276 for (m = 0; m < PCMCIA_MEM_WIN_NO; m++) {
Vitaly Bordug99121c02007-07-17 04:03:37 -07001277 out_be32(&w->or, 0); /* set to not valid */
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001278 w++;
1279 }
1280
1281 /* turn off voltage */
1282 voltage_set(i, 0, 0);
1283
1284 /* disable external hardware */
1285 hardware_disable(i);
1286 }
Marcelo Tosattide957c82005-10-28 17:46:13 -07001287 for (i = 0; i < PCMCIA_SOCKETS_NO; i++)
1288 pcmcia_unregister_socket(&socket[i].socket);
Julia Lawall5a1c3e1a2008-02-04 22:27:44 -08001289 iounmap(pcmcia);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001290
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001291 free_irq(pcmcia_schlvl, NULL);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001292
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001293 return 0;
1294}
1295
1296#ifdef CONFIG_PM
1297static int m8xx_suspend(struct platform_device *pdev, pm_message_t state)
1298{
Rafael J. Wysocki827b4642009-09-29 00:10:41 +02001299 return pcmcia_socket_dev_suspend(&pdev->dev);
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001300}
1301
1302static int m8xx_resume(struct platform_device *pdev)
1303{
1304 return pcmcia_socket_dev_resume(&pdev->dev);
1305}
1306#else
1307#define m8xx_suspend NULL
1308#define m8xx_resume NULL
1309#endif
1310
1311static struct of_device_id m8xx_pcmcia_match[] = {
1312 {
Vitaly Bordug99121c02007-07-17 04:03:37 -07001313 .type = "pcmcia",
1314 .compatible = "fsl,pq-pcmcia",
1315 },
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001316 {},
1317};
1318
1319MODULE_DEVICE_TABLE(of, m8xx_pcmcia_match);
1320
1321static struct of_platform_driver m8xx_pcmcia_driver = {
Stephen Rothwell8bf8df72007-07-22 00:23:03 +10001322 .name = driver_name,
Vitaly Bordug99121c02007-07-17 04:03:37 -07001323 .match_table = m8xx_pcmcia_match,
1324 .probe = m8xx_probe,
1325 .remove = m8xx_remove,
1326 .suspend = m8xx_suspend,
1327 .resume = m8xx_resume,
Vitaly Bordug80128ff2007-07-09 11:37:35 -07001328};
1329
1330static int __init m8xx_init(void)
1331{
1332 return of_register_platform_driver(&m8xx_pcmcia_driver);
1333}
1334
1335static void __exit m8xx_exit(void)
1336{
1337 of_unregister_platform_driver(&m8xx_pcmcia_driver);
Marcelo Tosattide957c82005-10-28 17:46:13 -07001338}
1339
1340module_init(m8xx_init);
1341module_exit(m8xx_exit);