Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Based on arch/arm/include/asm/ptrace.h |
| 3 | * |
| 4 | * Copyright (C) 1996-2003 Russell King |
| 5 | * Copyright (C) 2012 ARM Ltd. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | #ifndef __ASM_PTRACE_H |
| 20 | #define __ASM_PTRACE_H |
| 21 | |
David Howells | 4262a72 | 2012-10-11 11:05:13 +0100 | [diff] [blame] | 22 | #include <uapi/asm/ptrace.h> |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 23 | |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 24 | /* AArch32-specific ptrace requests */ |
Will Deacon | 27aa55c | 2012-09-27 11:38:12 +0100 | [diff] [blame] | 25 | #define COMPAT_PTRACE_GETREGS 12 |
| 26 | #define COMPAT_PTRACE_SETREGS 13 |
| 27 | #define COMPAT_PTRACE_GET_THREAD_AREA 22 |
| 28 | #define COMPAT_PTRACE_SET_SYSCALL 23 |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 29 | #define COMPAT_PTRACE_GETVFPREGS 27 |
| 30 | #define COMPAT_PTRACE_SETVFPREGS 28 |
Will Deacon | 27aa55c | 2012-09-27 11:38:12 +0100 | [diff] [blame] | 31 | #define COMPAT_PTRACE_GETHBPREGS 29 |
| 32 | #define COMPAT_PTRACE_SETHBPREGS 30 |
Marc Zyngier | 9ec218b | 2012-10-04 16:28:52 +0100 | [diff] [blame] | 33 | |
| 34 | /* AArch32 CPSR bits */ |
| 35 | #define COMPAT_PSR_MODE_MASK 0x0000001f |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 36 | #define COMPAT_PSR_MODE_USR 0x00000010 |
Marc Zyngier | 9ec218b | 2012-10-04 16:28:52 +0100 | [diff] [blame] | 37 | #define COMPAT_PSR_MODE_FIQ 0x00000011 |
| 38 | #define COMPAT_PSR_MODE_IRQ 0x00000012 |
| 39 | #define COMPAT_PSR_MODE_SVC 0x00000013 |
| 40 | #define COMPAT_PSR_MODE_ABT 0x00000017 |
| 41 | #define COMPAT_PSR_MODE_HYP 0x0000001a |
| 42 | #define COMPAT_PSR_MODE_UND 0x0000001b |
| 43 | #define COMPAT_PSR_MODE_SYS 0x0000001f |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 44 | #define COMPAT_PSR_T_BIT 0x00000020 |
Will Deacon | a795a38 | 2013-10-11 14:52:12 +0100 | [diff] [blame] | 45 | #define COMPAT_PSR_E_BIT 0x00000200 |
Marc Zyngier | 10a3cc2 | 2013-01-23 16:59:32 +0000 | [diff] [blame] | 46 | #define COMPAT_PSR_F_BIT 0x00000040 |
| 47 | #define COMPAT_PSR_I_BIT 0x00000080 |
| 48 | #define COMPAT_PSR_A_BIT 0x00000100 |
| 49 | #define COMPAT_PSR_E_BIT 0x00000200 |
| 50 | #define COMPAT_PSR_J_BIT 0x01000000 |
| 51 | #define COMPAT_PSR_Q_BIT 0x08000000 |
| 52 | #define COMPAT_PSR_V_BIT 0x10000000 |
| 53 | #define COMPAT_PSR_C_BIT 0x20000000 |
| 54 | #define COMPAT_PSR_Z_BIT 0x40000000 |
| 55 | #define COMPAT_PSR_N_BIT 0x80000000 |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 56 | #define COMPAT_PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */ |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 57 | /* |
| 58 | * These are 'magic' values for PTRACE_PEEKUSR that return info about where a |
| 59 | * process is located in memory. |
| 60 | */ |
Catalin Marinas | 7606c37 | 2012-10-10 15:50:03 +0100 | [diff] [blame] | 61 | #define COMPAT_PT_TEXT_ADDR 0x10000 |
| 62 | #define COMPAT_PT_DATA_ADDR 0x10004 |
| 63 | #define COMPAT_PT_TEXT_END_ADDR 0x10008 |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 64 | #ifndef __ASSEMBLY__ |
| 65 | |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 66 | /* sizeof(struct user) for AArch32 */ |
| 67 | #define COMPAT_USER_SZ 296 |
Marc Zyngier | 88483ec | 2012-10-03 15:54:09 +0100 | [diff] [blame] | 68 | |
| 69 | /* Architecturally defined mapping between AArch32 and AArch64 registers */ |
| 70 | #define compat_usr(x) regs[(x)] |
Jean Pihet | 2ee0d7f | 2014-02-03 19:18:27 +0100 | [diff] [blame] | 71 | #define compat_fp regs[11] |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 72 | #define compat_sp regs[13] |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 73 | #define compat_lr regs[14] |
Marc Zyngier | 88483ec | 2012-10-03 15:54:09 +0100 | [diff] [blame] | 74 | #define compat_sp_hyp regs[15] |
| 75 | #define compat_sp_irq regs[16] |
| 76 | #define compat_lr_irq regs[17] |
| 77 | #define compat_sp_svc regs[18] |
| 78 | #define compat_lr_svc regs[19] |
| 79 | #define compat_sp_abt regs[20] |
| 80 | #define compat_lr_abt regs[21] |
| 81 | #define compat_sp_und regs[22] |
| 82 | #define compat_lr_und regs[23] |
| 83 | #define compat_r8_fiq regs[24] |
| 84 | #define compat_r9_fiq regs[25] |
| 85 | #define compat_r10_fiq regs[26] |
| 86 | #define compat_r11_fiq regs[27] |
| 87 | #define compat_r12_fiq regs[28] |
| 88 | #define compat_sp_fiq regs[29] |
| 89 | #define compat_lr_fiq regs[30] |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 90 | |
| 91 | /* |
| 92 | * This struct defines the way the registers are stored on the stack during an |
| 93 | * exception. Note that sizeof(struct pt_regs) has to be a multiple of 16 (for |
| 94 | * stack alignment). struct user_pt_regs must form a prefix of struct pt_regs. |
| 95 | */ |
| 96 | struct pt_regs { |
| 97 | union { |
| 98 | struct user_pt_regs user_regs; |
| 99 | struct { |
| 100 | u64 regs[31]; |
| 101 | u64 sp; |
| 102 | u64 pc; |
| 103 | u64 pstate; |
| 104 | }; |
| 105 | }; |
| 106 | u64 orig_x0; |
| 107 | u64 syscallno; |
| 108 | }; |
| 109 | |
| 110 | #define arch_has_single_step() (1) |
| 111 | |
| 112 | #ifdef CONFIG_COMPAT |
| 113 | #define compat_thumb_mode(regs) \ |
| 114 | (((regs)->pstate & COMPAT_PSR_T_BIT)) |
| 115 | #else |
| 116 | #define compat_thumb_mode(regs) (0) |
| 117 | #endif |
| 118 | |
| 119 | #define user_mode(regs) \ |
| 120 | (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t) |
| 121 | |
| 122 | #define compat_user_mode(regs) \ |
| 123 | (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \ |
| 124 | (PSR_MODE32_BIT | PSR_MODE_EL0t)) |
| 125 | |
| 126 | #define processor_mode(regs) \ |
| 127 | ((regs)->pstate & PSR_MODE_MASK) |
| 128 | |
| 129 | #define interrupts_enabled(regs) \ |
| 130 | (!((regs)->pstate & PSR_I_BIT)) |
| 131 | |
| 132 | #define fast_interrupts_enabled(regs) \ |
| 133 | (!((regs)->pstate & PSR_F_BIT)) |
| 134 | |
| 135 | #define user_stack_pointer(regs) \ |
Jean Pihet | 5f888a1 | 2014-02-03 19:18:29 +0100 | [diff] [blame^] | 136 | (!compat_user_mode(regs)) ? ((regs)->sp) : ((regs)->compat_sp) |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 137 | |
| 138 | /* |
| 139 | * Are the current registers suitable for user mode? (used to maintain |
| 140 | * security in signal handlers) |
| 141 | */ |
| 142 | static inline int valid_user_regs(struct user_pt_regs *regs) |
| 143 | { |
| 144 | if (user_mode(regs) && (regs->pstate & PSR_I_BIT) == 0) { |
| 145 | regs->pstate &= ~(PSR_F_BIT | PSR_A_BIT); |
| 146 | |
| 147 | /* The T bit is reserved for AArch64 */ |
| 148 | if (!(regs->pstate & PSR_MODE32_BIT)) |
| 149 | regs->pstate &= ~COMPAT_PSR_T_BIT; |
| 150 | |
| 151 | return 1; |
| 152 | } |
| 153 | |
| 154 | /* |
| 155 | * Force PSR to something logical... |
| 156 | */ |
| 157 | regs->pstate &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | \ |
| 158 | COMPAT_PSR_T_BIT | PSR_MODE32_BIT; |
| 159 | |
| 160 | if (!(regs->pstate & PSR_MODE32_BIT)) { |
| 161 | regs->pstate &= ~COMPAT_PSR_T_BIT; |
| 162 | regs->pstate |= PSR_MODE_EL0t; |
| 163 | } |
| 164 | |
| 165 | return 0; |
| 166 | } |
| 167 | |
Vijaya Kumar K | 58dcc20 | 2014-01-28 16:50:21 +0530 | [diff] [blame] | 168 | #define instruction_pointer(regs) ((unsigned long)(regs)->pc) |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 169 | |
| 170 | #ifdef CONFIG_SMP |
| 171 | extern unsigned long profile_pc(struct pt_regs *regs); |
| 172 | #else |
| 173 | #define profile_pc(regs) instruction_pointer(regs) |
| 174 | #endif |
| 175 | |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 176 | #endif /* __ASSEMBLY__ */ |
Catalin Marinas | 60ffc30 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 177 | #endif |